JPH0722315A - Method for manufacturing semiconductor film - Google Patents

Method for manufacturing semiconductor film

Info

Publication number
JPH0722315A
JPH0722315A JP6893591A JP6893591A JPH0722315A JP H0722315 A JPH0722315 A JP H0722315A JP 6893591 A JP6893591 A JP 6893591A JP 6893591 A JP6893591 A JP 6893591A JP H0722315 A JPH0722315 A JP H0722315A
Authority
JP
Japan
Prior art keywords
single crystal
substrate
film
semiconductor film
amorphous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6893591A
Other languages
Japanese (ja)
Inventor
Konen Doi
功年 土居
Junichi Konishi
淳一 小西
Masakazu Kumikawa
雅一 汲川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP6893591A priority Critical patent/JPH0722315A/en
Publication of JPH0722315A publication Critical patent/JPH0722315A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a single crystalline semiconductor film in the controlled crystal orientation at an arbitrary position even on an amorphous insulator such as a glass substrate, etc. CONSTITUTION:An amorphous silicon film 2 is deposited on a glass substrate 1, on the other hand, protrusions 4 are formed on the parts of the surface of a single crystal silicon substrate 3. Next, the flat surfaces of the single crystal silicon substrate 3 are brought into contact with the amorphous silicon film 2 to be overlapped with one another and then the surface of the amorphous silicon film 2 and the flat surfaces of the protrusions 4 closely adhering to one another are heated at 550 deg.C for about ten hours in nitrogen atmosphere. Through this heat treatment, the crystallinity of the single crystal silicon substrate 3 can be transferred to the regions of the amorphous silicon film 2 closely adhering to the protrusions 4 of the single crystal substrate 3 thereby enabling a single crystal silicon film 5 leaving it intact in solid state to be formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電子回路を形成するため
に、絶縁下地上に形成された単結晶半導体膜、いわゆる
SOI(Silicon on Insulator)構造と称される単結晶シ
リコン膜の製造方法に関するものである。本発明方法に
より製造される単結晶シリコン膜は太陽電池、アクティ
ブマトリックス型液晶ディスプレー装置、光センサ、高
速デバイス、高集積LSI、高耐圧デバイス、耐放射線
デバイス、三次元集積回路など多くの分野に利用するこ
とができる。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a single crystal semiconductor film formed on an insulating base, that is, a so-called SOI (Silicon on Insulator) structure, for forming an electronic circuit. It is a thing. The single crystal silicon film produced by the method of the present invention is used in many fields such as solar cells, active matrix type liquid crystal display devices, optical sensors, high speed devices, highly integrated LSIs, high breakdown voltage devices, radiation resistant devices, and three-dimensional integrated circuits. can do.

【0002】[0002]

【従来の技術】SOI構造形成技術には、再結晶化法、
横方向固相成長法、エピタキシャル成長法、絶縁層埋込
み法、張り合せ法などがある。SOI構造形成技術の全
般的な説明は「SOI構造形成技術」(産業図書株式会
社発行、昭和62年)に詳しく述べられている。横方向
固相成長法では、シリコン基板の一部をシリコン酸化膜
で被い、その上から非晶質シリコン膜を堆積し、600
℃程度の低温アニールを行なう。非晶質シリコン膜のう
ちシリコン基板と直接接触している部分ではシリコン基
板がシード(種)となり、まず縦方向に固相状態でエピ
タキシャル成長し、続いてシリコン酸化膜上を横方向に
固相状態でエピタキシャル成長する。結果としてシリコ
ン酸化膜上に単結晶シリコン膜が存在するSOI構造が
得られる。横方向固相成長法は、SOI構造が600℃
程度の低温で実現できるため、下層に形成された半導体
装置への熱的影響が少ないこと、非晶質シリコン膜をC
VD法により堆積すれば、従来の製造方法をそのまま適
用することができ、量産性を有すること、多層のSOI
構造も同一のシード部から同時に成長できること、など
の利点を備えている。
2. Description of the Related Art The SOI structure forming technique includes a recrystallization method,
There are a lateral solid phase growth method, an epitaxial growth method, an insulating layer embedding method, a laminating method and the like. A general description of the SOI structure forming technology is described in detail in "SOI Structure Forming Technology" (published by Sangyo Tosho Co., Ltd., 1987). In the lateral solid phase growth method, a part of the silicon substrate is covered with a silicon oxide film, and an amorphous silicon film is deposited on the silicon oxide film.
Perform low temperature annealing at about ℃. In the portion of the amorphous silicon film that is in direct contact with the silicon substrate, the silicon substrate serves as a seed, and epitaxial growth is first performed in the solid phase in the vertical direction, and then in the solid state in the horizontal direction on the silicon oxide film. To grow epitaxially. As a result, an SOI structure in which a single crystal silicon film exists on the silicon oxide film is obtained. The lateral solid phase growth method has an SOI structure of 600 ° C.
Since it can be achieved at a low temperature, the thermal effect on the semiconductor device formed in the lower layer is small.
If it is deposited by the VD method, the conventional manufacturing method can be applied as it is, it has mass productivity, and it has a multi-layered SOI.
The structure also has advantages such as being able to grow simultaneously from the same seed portion.

【0003】太陽光を電気エネルギーに直接換える太陽
電池は、1976年にアメリカRCA社のカールソン氏
によって発明され、非晶質シリコンを用いた太陽電池が
開発された(米国特許第4064521号参照)。太陽
電池では、太陽光エネルギーの電力への変換効率は非晶
質系より単結晶系の方が高く、信頼性も高い。しかし、
単結晶基板が高価であるために非晶質系が主流を占めて
いる。
A solar cell that directly converts sunlight into electric energy was invented in 1976 by Mr. Carlson of the American RCA Corporation, and a solar cell using amorphous silicon was developed (see US Pat. No. 4,064,521). In a solar cell, the conversion efficiency of solar energy into electric power is higher in a single crystal system than in an amorphous system, and the reliability is also high. But,
Amorphous systems predominate because single-crystal substrates are expensive.

【0004】液晶ディスプレイ用の非晶質シリコン薄膜
トランジスタは、半導体膜、ソース・ドレイン電極及び
ゲート電極からなる。半導体膜として実用レベルにある
ものは非晶質シリコンと多結晶シリコンである。一般に
非晶質シリコンは、太陽電池の作成プロセスと同様に、
SiH4を原料ガスとするプラズマCVD法で作成され
ている。
An amorphous silicon thin film transistor for a liquid crystal display comprises a semiconductor film, source / drain electrodes and a gate electrode. Amorphous silicon and polycrystalline silicon are practical semiconductor layers. Generally, amorphous silicon is similar to the process of making a solar cell.
It is formed by a plasma CVD method using SiH 4 as a source gas.

【0005】[0005]

【発明が解決しようとする課題】非晶質シリコン太陽電
池の大きな問題点に信頼性がある。太陽光エネルギーの
電力への初期の変換効率が、使用によって初年度で約1
0%、それ以降は毎年1〜2%程度低下する。その原因
はまだ特定されていないが、半導体膜中に含まれるO,
Nなどの不純物や半導体膜中に存在するSiH2の存在
が考えられている。この原因に対する考え方によって非
晶質シリコン膜の製造方法には幾つかの工夫がなされて
いる。1つの方法では、半導体膜中の不純物を減らすこ
とによって信頼性が改善できるとして超高真空成膜装置
を使用して1/109Pa程度の到達真空度で非晶質シ
リコン膜などを形成している。また、他の考えでは電子
と正孔が再結合する際に発生するエネルギーによってダ
ングリング・ボンドが発生することにより特性が劣化す
ると考えられ、それらの再結合を防止するために多層構
造が採用されている。何れにしても、非晶質シリコン太
陽電池の変換効率の劣化の問題は、使用環境に制約が加
わり、その信頼性向上のためには多層化や半導体膜の高
品質化が必要となり、このことが製造プロセスを複雑に
し、コスト上昇を招いている。
A major problem of amorphous silicon solar cells is reliability. The initial conversion efficiency of solar energy into electric power is about 1 in the first year depending on use.
It decreases by 0%, and thereafter decreases by 1-2% every year. The cause has not been identified yet, but O contained in the semiconductor film,
Impurities such as N and the presence of SiH 2 existing in the semiconductor film are considered. Some ideas have been made in the method of manufacturing an amorphous silicon film based on the idea of this cause. According to one method, the reliability can be improved by reducing impurities in the semiconductor film, and an ultra-high vacuum film forming apparatus is used to form an amorphous silicon film or the like at an ultimate vacuum of about 1/10 9 Pa. ing. Another idea is that energy generated when electrons and holes are recombined causes a dangling bond to deteriorate the characteristics, and a multilayer structure is adopted to prevent these recombination. ing. In any case, the problem of deterioration of conversion efficiency of amorphous silicon solar cells imposes restrictions on the environment in which they are used, and in order to improve their reliability, multilayering and high quality semiconductor films are required. However, the manufacturing process is complicated and the cost is increased.

【0006】多結晶シリコンを用いた太陽電池もある
が、多結晶系太陽電池の課題は、如何に単結晶系太陽電
池の変換効率に近づけるかにある。多結晶には本質的な
問題として粒界が多数存在する。粒界は電子や正孔の移
動を阻害する。また電子と正孔が再結合する場にもな
る。電子の移動方向に粒界を作らないようにする必要が
ある。この問題に対しては、結晶粒を十分大きくして粒
界面積を減少させる方法が用いられている。
Although there are solar cells using polycrystalline silicon, the problem of polycrystalline solar cells lies in how to approach the conversion efficiency of single crystalline solar cells. Polycrystals have many grain boundaries as an essential problem. Grain boundaries hinder the movement of electrons and holes. It also serves as a place where electrons and holes recombine. It is necessary not to create grain boundaries in the electron movement direction. To solve this problem, a method of increasing the size of crystal grains to reduce the grain boundary area is used.

【0007】液晶ディスプレイ用の非晶質シリコン薄膜
トランジスタにおいても、非晶質シリコン太陽電池と同
様に、信頼性に大きな問題がある。代表的なものとし
て、ゲートバイアス印加によるしきい値電圧シフトがあ
る。しきい値電圧は薄膜トランジスタのドレイン電流が
急激に立ち上がるゲート電圧で、半導体とゲート金属と
の仕事関数の差、半導体の内部のフェルミ準位、半導体
とゲート絶縁膜との界面の固定電荷及びゲート絶縁膜と
ゲート電極との界面の固定電荷によって決定される。初
期を含めて短時間の信頼性はゲート絶縁膜であるSiN
xで決まり、長期的には非晶質シリコン膜の膜質が関与
している可能性がある。太陽電池や液晶ディスプレイを
単結晶シリコン膜を用いて安価に製造することができれ
ば、それに超したことはない。
An amorphous silicon thin film transistor for a liquid crystal display also has a great reliability problem, like an amorphous silicon solar cell. As a typical one, there is a threshold voltage shift by applying a gate bias. The threshold voltage is a gate voltage at which the drain current of a thin film transistor rises sharply. The difference in work function between the semiconductor and the gate metal, the Fermi level inside the semiconductor, the fixed charge at the interface between the semiconductor and the gate insulating film, and the gate insulation. It is determined by the fixed charge at the interface between the film and the gate electrode. The reliability for a short time including the initial stage is SiN which is the gate insulating film.
It depends on x, and the film quality of the amorphous silicon film may be involved in the long term. If solar cells and liquid crystal displays can be manufactured at low cost using single-crystal silicon films, there is nothing better than that.

【0008】単結晶シリコン膜を製造する方法のうち、
横方向固相成長法では単結晶化できる領域はシード部分
から10μm程度の小さい範囲である。このことは、シ
ード部分から縦方向に単結晶成長した後、横方向へ固相
成長できる距離には限界があり、その距離が10μm程
度ということである。そのため、大面積のSOI構造を
形成することはできない。また、成長させた単結晶シリ
コン膜に活性素子を形成する場合、その活性素子とシー
ドとなった単結晶基板露出部との距離には制約があるた
め、設計上の自由度が低い。
Among the methods for producing a single crystal silicon film,
In the lateral solid phase growth method, the single crystallizable region is a small range of about 10 μm from the seed portion. This means that there is a limit to the distance at which solid phase growth can be performed in the horizontal direction after single crystal growth in the vertical direction from the seed portion, and the distance is about 10 μm. Therefore, a large area SOI structure cannot be formed. Further, when an active element is formed on the grown single crystal silicon film, there is a restriction on the distance between the active element and the exposed portion of the single crystal substrate used as the seed, and therefore the degree of freedom in design is low.

【0009】また、横方向固相成長法では単結晶化させ
ようとする半導体膜の下の絶縁膜を支持している基板が
シードとなるため、横方向固相成長法は基板が単結晶基
板の場合にしか適用することができない。例えば基板が
ガラスなどの非晶質基板である場合には横方向固相成長
法は適用することができない。本発明はガラス基板など
の非晶質絶縁体基板上でも結晶方位の制御された単結晶
半導体膜を任意の位置に、任意の大きさに形成する方法
を提供することを目的とするものである。
In the lateral solid phase epitaxy method, the substrate supporting the insulating film under the semiconductor film to be single crystallized serves as a seed. Therefore, in the lateral solid phase epitaxy method, the substrate is a single crystal substrate. Can only be applied in case of. For example, when the substrate is an amorphous substrate such as glass, the lateral solid phase growth method cannot be applied. It is an object of the present invention to provide a method for forming a single crystal semiconductor film whose crystal orientation is controlled on an amorphous insulator substrate such as a glass substrate at an arbitrary position and in an arbitrary size. .

【0010】[0010]

【課題を解決するための手段】本発明では、表面に非晶
質又は多結晶の半導体膜をもつ基板表面に、前記半導体
膜と同じ物質からなり、前記半導体膜の単結晶しようと
する領域に対応する領域に表面が平坦な凸部をもつ単結
晶基板のその凸部をシード材料として密着させながら熱
処理を施して前記半導体膜のうち前記単結晶基板の凸部
と密着している領域を固相状態で単結晶化させ、その後
にシード材料を単結晶化した半導体膜から分離させる。
前記シード材料は前記非晶質又は多結晶の半導体膜をも
つ基板とは別物質として用意された単結晶片である。
According to the present invention, a substrate surface having an amorphous or polycrystalline semiconductor film on the surface thereof is formed on a region of the semiconductor film, which is made of the same material as the semiconductor film and is intended to be a single crystal. A heat treatment is performed while closely adhering the convex portion of the single crystal substrate having a convex portion having a flat surface in the corresponding region as a seed material to solidify the region of the semiconductor film that is in close contact with the convex portion of the single crystal substrate. It is single-crystallized in a phase state, and then the seed material is separated from the single-crystallized semiconductor film.
The seed material is a single crystal piece prepared as a substance different from the substrate having the amorphous or polycrystalline semiconductor film.

【0011】[0011]

【実施例】一実施例を図1に示す。 (A)ガラス基板1上にLPCVD法により非晶質シリ
コン膜2を5000〜10000Åの厚さ、例えば約5
000Åの厚さに堆積させる。非晶質シリコン膜2を堆
積させるLPCVD法では、例えばSiH4を原料ガス
として用いる。非晶質シリコン膜2の膜質の均質性を向
上させるために、原料ガスとしてSiH4に代えてSi2
6を用い、低温で形成してもよい。ガラス基板1とは
別に、単結晶シリコン基板3の表面の一部に写真製版と
エッチングにより凹部を決定して凸部4を形成する。凹
部の深さは数1000Å〜数μmであり、例えば約1μ
mとする。凸部4の表面は元の単結晶シリコン基板3の
表面であり、平坦面である。
EXAMPLE One example is shown in FIG. (A) An amorphous silicon film 2 having a thickness of 5000 to 10000Å, for example, about 5 is formed on a glass substrate 1 by LPCVD.
Deposit to a thickness of 000Å. In the LPCVD method for depositing the amorphous silicon film 2, SiH 4 is used as a source gas, for example. In order to improve the homogeneity of the film quality of the amorphous silicon film 2, Si 2 is used as the source gas instead of SiH 4.
It may be formed at a low temperature by using H 6 . Separately from the glass substrate 1, a concave portion is determined by photolithography and etching on a part of the surface of the single crystal silicon substrate 3 to form a convex portion 4. The depth of the recess is several thousand Å to several μm, for example, about 1 μm.
m. The surface of the convex portion 4 is the surface of the original single crystal silicon substrate 3 and is a flat surface.

【0012】(B)ガラス基板1上の非晶質シリコン膜
2の表面の自然酸化膜と、単結晶シリコン基板3の凸部
4の表面に形成されている自然酸化膜をフッ酸溶液で除
去して清浄にした後、単結晶シリコン基板3の凸部4の
平坦面が基板1上の非晶質シリコン膜2上に重なるよう
に接触させる。そして、ガラス基板1と単結晶シリコン
基板3の間に電源装置6から高電圧を印加し、静電圧着
法により非晶質シリコン膜2の表面と単結晶シリコン基
板3の凸部4の平坦面とを密着させながら、窒素雰囲気
中で500〜600℃、例えば550℃で10時間程度
加熱する。静電圧着法により電源装置6から印加する電
圧は例えば0.5〜1.5KVとする。
(B) The native oxide film on the surface of the amorphous silicon film 2 on the glass substrate 1 and the native oxide film formed on the surface of the convex portion 4 of the single crystal silicon substrate 3 are removed with a hydrofluoric acid solution. After that, the single crystal silicon substrate 3 is brought into contact with the single crystal silicon substrate 3 so that the flat surface of the convex portion 4 overlaps the amorphous silicon film 2 on the substrate 1. Then, a high voltage is applied from the power supply device 6 between the glass substrate 1 and the single crystal silicon substrate 3, and the surface of the amorphous silicon film 2 and the flat surface of the convex portion 4 of the single crystal silicon substrate 3 are formed by electrostatic pressure bonding. While closely contacting with each other, heating is performed in a nitrogen atmosphere at 500 to 600 ° C., for example, 550 ° C. for about 10 hours. The voltage applied from the power supply device 6 by the electrostatic pressure bonding method is, for example, 0.5 to 1.5 KV.

【0013】この熱処理により単結晶シリコン基板3の
凸部4と密着している非晶質シリコン膜2の領域に単結
晶シリコン基板3の結晶性が転写され、固相状態のまま
で単結晶シリコン膜5が形成される。熱処理の後、単結
晶シリコン基板3をガラス基板1から分離する。ガラス
基板1上のシリコン膜で単結晶化されていない部分(非
晶質のままの部分)をエッチングにより除去する。この
ときのエッチング液としては例えばフッ酸と硝酸を適当
な割合で混合した溶液を用いることができる。この溶液
で処理すると、単結晶化シリコン膜5は殆んどエッチン
グされずに残り、非晶質シリコン膜が除去される。
By this heat treatment, the crystallinity of the single crystal silicon substrate 3 is transferred to the region of the amorphous silicon film 2 that is in close contact with the convex portion 4 of the single crystal silicon substrate 3, and the single crystal silicon remains in the solid state. The film 5 is formed. After the heat treatment, the single crystal silicon substrate 3 is separated from the glass substrate 1. A portion of the silicon film on the glass substrate 1 which is not single-crystallized (a portion which remains amorphous) is removed by etching. As the etching liquid at this time, for example, a solution in which hydrofluoric acid and nitric acid are mixed at an appropriate ratio can be used. When treated with this solution, the single crystallized silicon film 5 remains without being etched, and the amorphous silicon film is removed.

【0014】このように、非晶質シリコン膜2のうち単
結晶シリコン基板3の凸部4が密着した部分のみが単結
晶化されることとなる。したがって、単結晶シリコン基
板3の所望の位置に所望の大きさの凸部を形成すること
により、その位置と大きさに対応した単結晶シリコン膜
5を得ることができる。
As described above, only the portion of the amorphous silicon film 2 to which the convex portion 4 of the single crystal silicon substrate 3 adheres is single crystallized. Therefore, by forming a convex portion having a desired size at a desired position on the single crystal silicon substrate 3, the single crystal silicon film 5 corresponding to the position and the size can be obtained.

【0015】シード材料となる単結晶基板としては実施
例の単結晶シリコン基板3に代えて、他の単結晶体、例
えばサファイア基板、SOS(シリコン・オン・サファ
イア)基板、アルカリ土類金属フッ化物(CaF2,S
rF2,BaF2など)を用いることもできる。単結晶化
しようとする非晶質又は多結晶のシリコン膜を形成する
基板は、実施例のガラス基板に限らず、シリコン基板上
にシリコン酸化膜を形成したもの、ガラス基板上にシリ
コン酸化膜若しくはシリコン酸化膜とシリコン窒化膜の
多層膜などの絶縁膜を形成したものであってもよい。実
施例においては、非晶質シリコン膜2上に単結晶シリコ
ン基板3の凸部4を密着させる方法として、静電圧着法
を用いているが、他の方法として例えば荷重をかけて圧
着させる方法や、真空中で2つの基板を密着させる方法
などを用いることもできる。単結晶化しようとする半導
体膜として実施例では非晶質シリコン膜を用いている
が、多結晶シリコン膜を用いてもよい。本発明はさらに
他の種々の変形を施すことができる。
As a single crystal substrate used as a seed material, instead of the single crystal silicon substrate 3 of the embodiment, another single crystal body such as a sapphire substrate, an SOS (silicon on sapphire) substrate, an alkaline earth metal fluoride is used. (CaF 2 , S
rF 2 , BaF 2, etc.) can also be used. The substrate on which the amorphous or polycrystalline silicon film to be single-crystallized is not limited to the glass substrate of the embodiment, but a silicon substrate on which a silicon oxide film is formed, a glass substrate on which a silicon oxide film or a silicon oxide film is formed. An insulating film such as a multilayer film of a silicon oxide film and a silicon nitride film may be formed. In the embodiment, the electrostatic pressure bonding method is used as a method for bringing the convex portion 4 of the single crystal silicon substrate 3 into close contact with the amorphous silicon film 2, but as another method, for example, a method of applying a load to perform pressure bonding. Alternatively, a method of bringing the two substrates into close contact with each other in a vacuum can be used. Although an amorphous silicon film is used as the semiconductor film to be monocrystallized in the embodiment, a polycrystalline silicon film may be used. The present invention can be variously modified.

【0016】[0016]

【発明の効果】本発明では結晶成長のシードとなる結晶
を外部から密着させて結晶成長させるので、ガラス基板
などの非晶質な基板上でも結晶方位の制御された単結晶
薄膜を形成することができる。シードとなる単結晶基板
の凸部を形成する位置や凸部のパターンにより、得られ
る単結晶半導体膜の位置やパターンを任意に形成するこ
とができ、設計上の自由度が大きくなる。
According to the present invention, a crystal that serves as a seed for crystal growth is brought into close contact with the crystal from the outside, and thus a single crystal thin film having a controlled crystal orientation is formed even on an amorphous substrate such as a glass substrate. You can The position and pattern of the single crystal semiconductor film to be obtained can be arbitrarily formed depending on the position and the pattern of the convex part of the single crystal substrate to be the seed, which increases the degree of freedom in design.

【0017】外部からシード(種結晶)を接触させるた
め、従来のようにシード領域を形成する必要がないの
で、集積回路の高集積化を図ることができる。実施例の
ように部分的に単結晶シリコン膜を形成し、単結晶化し
ない領域をエッチングで除去することにより、フォトグ
ラフィー工程を経ずに島状パターンを形成することがで
き、製造工程を短縮化することができる。本発明の方法
は手法が単純であり、複雑なプロセスを必要としないの
で歩留まりが向上する。
Since the seed (seed crystal) is brought into contact with the outside, it is not necessary to form a seed region as in the conventional case, and therefore, the integrated circuit can be highly integrated. By partially forming a single crystal silicon film as in the example and removing the region that is not single crystallized by etching, an island pattern can be formed without going through the photography step, and the manufacturing process can be shortened. Can be converted. The method of the present invention has a simple method and does not require a complicated process, so that the yield is improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】一実施例を示す工程断面図である。FIG. 1 is a process sectional view showing an example.

【符号の説明】[Explanation of symbols]

1 ガラス基板 2 非晶質シリコン膜 3 単結晶シリコン基板 4 凸部 5 形成された単結晶シリコン膜 6 電源装置 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Amorphous silicon film 3 Single crystal silicon substrate 4 Convex portion 5 Formed single crystal silicon film 6 Power supply device

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 表面に非晶質又は多結晶の半導体膜をも
つ基板表面に、前記半導体膜と同じ物質からなり、前記
半導体膜の単結晶しようとする領域に対応する領域に表
面が平坦な凸部をもつ単結晶基板のその凸部をシード材
料として密着させながら熱処理を施して前記半導体膜の
うち前記単結晶基板の凸部と密着している領域を固相状
態で単結晶化させ、その後にシード材料を単結晶化した
半導体膜から分離させる半導体膜の製造方法。
1. A substrate surface having an amorphous or polycrystalline semiconductor film on the surface, made of the same material as the semiconductor film, and having a flat surface in a region corresponding to a region of the semiconductor film to be single-crystallized. A heat treatment is performed while closely adhering the convex portion of the single crystal substrate having the convex portion as a seed material to single crystallize a region of the semiconductor film in close contact with the convex portion of the single crystal substrate in a solid state, Then, a method for manufacturing a semiconductor film, in which the seed material is separated from the single crystallized semiconductor film.
【請求項2】 前記シード材料は前記非晶質又は多結晶
の半導体膜をもつ基板とは別物質として用意された単結
晶片である請求項1に記載の半導体膜の製造方法。
2. The method for producing a semiconductor film according to claim 1, wherein the seed material is a single crystal piece prepared as a substance different from the substrate having the amorphous or polycrystalline semiconductor film.
JP6893591A 1991-03-08 1991-03-08 Method for manufacturing semiconductor film Pending JPH0722315A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6893591A JPH0722315A (en) 1991-03-08 1991-03-08 Method for manufacturing semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6893591A JPH0722315A (en) 1991-03-08 1991-03-08 Method for manufacturing semiconductor film

Publications (1)

Publication Number Publication Date
JPH0722315A true JPH0722315A (en) 1995-01-24

Family

ID=13388021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6893591A Pending JPH0722315A (en) 1991-03-08 1991-03-08 Method for manufacturing semiconductor film

Country Status (1)

Country Link
JP (1) JPH0722315A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8357879B2 (en) 2007-11-30 2013-01-22 Samsung Electronics Co., Ltd. Micro-heaters, micro-heater arrays, methods for manufacturing the same and electronic devices using the same
US8369696B2 (en) 2008-06-10 2013-02-05 Samsung Electronics Co., Ltd. Micro-heaters, methods for manufacturing the same, and methods for forming patterns using the micro-heaters
US8409934B2 (en) 2007-07-16 2013-04-02 Samsung Electronics Co., Ltd. Methods for forming materials using micro-heaters and electronic devices including such materials
US8415593B2 (en) 2008-05-23 2013-04-09 Samsung Electronics Co., Ltd. Micro-heaters and methods of manufacturing the same
US8445333B2 (en) 2007-01-10 2013-05-21 Samsung Electronics Co., Ltd Method of forming polysilicon, thin film transistor using the polysilicon, and method of fabricating the thin film transistor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8445333B2 (en) 2007-01-10 2013-05-21 Samsung Electronics Co., Ltd Method of forming polysilicon, thin film transistor using the polysilicon, and method of fabricating the thin film transistor
US9136353B2 (en) 2007-01-10 2015-09-15 Samsung Electronics Co., Ltd. Polysilicon-based thin film transistor
US8409934B2 (en) 2007-07-16 2013-04-02 Samsung Electronics Co., Ltd. Methods for forming materials using micro-heaters and electronic devices including such materials
US8673693B2 (en) 2007-07-16 2014-03-18 Samsung Electronics Co., Ltd. Methods for forming materials using micro-heaters and electronic devices including such materials
US8357879B2 (en) 2007-11-30 2013-01-22 Samsung Electronics Co., Ltd. Micro-heaters, micro-heater arrays, methods for manufacturing the same and electronic devices using the same
US8415593B2 (en) 2008-05-23 2013-04-09 Samsung Electronics Co., Ltd. Micro-heaters and methods of manufacturing the same
US8369696B2 (en) 2008-06-10 2013-02-05 Samsung Electronics Co., Ltd. Micro-heaters, methods for manufacturing the same, and methods for forming patterns using the micro-heaters

Similar Documents

Publication Publication Date Title
JP2608548B2 (en) Method for manufacturing semiconductor device
US4139401A (en) Method of producing electrically isolated semiconductor devices on common crystalline substrate
JP2917392B2 (en) Method for manufacturing semiconductor device
JP2505736B2 (en) Method for manufacturing semiconductor device
JPS59169121A (en) Method of producing semiconductor device
JPS59161014A (en) Crystallization of semiconductor thin film
EP0449589A1 (en) Method of producing a SOI structure
JPH113860A (en) Manufacture of thin film transistor
Jastrzebski Silicon on insulators: Different approaches-A review
JPH02191320A (en) Crystal product and its manufacture
JPH0722315A (en) Method for manufacturing semiconductor film
JP2917388B2 (en) Method for manufacturing semiconductor device
JP2000150835A (en) Manufacture of non-single crystal silicon thin-film
JPS60152018A (en) Manufacture of semiconductor thin film crystal layer
JPH04280623A (en) Manufacture of semiconductor film
JP2707654B2 (en) Method for manufacturing thin film transistor
JP2720473B2 (en) Thin film transistor and method of manufacturing the same
JP2867402B2 (en) Method for manufacturing semiconductor device
JPH0294415A (en) Formation of substrate
JPS5856316A (en) Manufacture of semiconductor device
JPH0284772A (en) Manufacture of semiconductor device
JPH02238617A (en) Crystal growth of semiconductor thin film
JPH04373171A (en) Forming method of semiconductor crystal article
JPH01187873A (en) Manufacture of semiconductor device
JPH04267518A (en) Manufacture of semiconductor thin film element