JPH07211863A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to control a resistance value at a specified value by measuring the resistance of a resistor element, and introducing hydrogen into the resistor element. CONSTITUTION:A silicon oxide film 2 is formed by thermal oxidation on a semiconductor substrate 1. Boron is introduced into polycrystalline silion as impurities by an ion implanting method. Photoresist corresponding to the region of a resistor element 3 is formed on the polycrystalline silicon. Then, anisotropic etching of the polycrystalline silicon is performed, and the resistor element 3 comprising the polycrystalline silicon is formed. Therafter, a layer insulating film 4 is formed on the resistor element 3, Anisotropic etching is performed for the element, and a continuity hole is formed. A final protecting film 6 is further formed, and an opening for a bonding pad is formed. At this time, heat treatment is performed in hydrogen atmosphere at the temperature of 400 deg.C. Hydrogen is introduced into the resistor element 3 through the final protecting film 6 and the layer insulating film 4. Thus, the resistor element 3 having the specified resistance value is obtained. Therefore, the resistance value of the resistor element can be controlled after the formation of the wirings or the formation of the final protecting film.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a high resistance element having a highly accurate resistance value.

[0002]

2. Description of the Related Art With the increase in density and speed of semiconductor devices, impurities have been introduced into polycrystalline silicon formed on an insulating film such as a silicon oxide film in place of diffusion resistance formed in a conventional semiconductor substrate. The use of resistance elements formed by increasing the number is increasing.

[0003]

The resistance element using polycrystalline silicon is characterized in that it has no voltage dependence and that a resistance element having a small area and a high resistance value can be formed.

However, in the conventional method of forming by the chemical vapor deposition method (hereinafter referred to as the CVD method), the crystal grains of the formed polycrystalline silicon vary, or the heat treatment for activating the introduced impurities causes There is a problem that the resistance value of the resistance element varies.

Therefore, the resistance element made of polycrystalline silicon has a problem that the reproducibility of resistance value and controllability are lacking.

An object of the present invention is to solve the above problems and provide a method of manufacturing a semiconductor device capable of controlling the resistance value of a resistance element to a predetermined value.

[0007]

In order to achieve the above object, a semiconductor device manufacturing method of the present invention employs the following steps.

A method of manufacturing a semiconductor device according to the present invention comprises a step of forming polycrystalline silicon on a semiconductor substrate and introducing an impurity into the polycrystalline silicon, a step of patterning a resistance element by photoetching thereafter, and an impurity introduced. And a step of forming an interlayer insulating film on the resistance element and patterning the connection hole by photoetching, and further forming wiring, and a step of forming a final protective film and patterning the bonding pad by photoetching. Then, the method further comprises the steps of measuring the resistance value of the resistance element, and then introducing hydrogen into the resistance element to control the resistance value of the resistance element to a predetermined value.

A method of manufacturing a semiconductor device according to the present invention comprises a step of forming amorphous silicon on a semiconductor substrate and introducing impurities into the amorphous silicon, a step of patterning a resistance element by photoetching thereafter, and a heat treatment. A step of activating the impurities introduced at the same time as changing the amorphous silicon into polycrystalline silicon, forming an interlayer insulating film on the resistance element, patterning the connection hole by photoetching, and further forming a wiring, A step of forming a final protective film and patterning the bonding pad by photoetching, a step of measuring the resistance value of the resistance element after that, and a step of introducing hydrogen into the resistance element and controlling the resistance value to a predetermined value after that. It is characterized by having.

[0010]

According to the manufacturing method of the present invention, the resistance element is formed in advance so that the resistance value becomes higher than the predetermined value.

After that, hydrogen is introduced into the formed resistance element, and the carrier trapped by the dangling bond at the grain boundary interface of polycrystalline silicon is replaced with hydrogen to become a free carrier. As a result, the resistance value of the resistance element can be reduced.

Therefore, the resistance value can be controlled by the amount of hydrogen introduced into the resistance element. Furthermore, hydrogen has a large diffusion coefficient, and even when aluminum or an aluminum alloy is used for the wiring, hydrogen can be sufficiently introduced into the resistance element through the upper final protective film at a temperature equal to or lower than the melting point of the wiring. Therefore, it is possible to control the resistance value after the wiring is formed.

[0013]

EXAMPLE An example of the method for manufacturing a semiconductor device of the present invention will be described below with reference to FIG. CV below
An example in which the present invention is applied to the resistance element formed of polycrystalline silicon formed on the silicon oxide film by the D method and the resistance value is controlled will be described.

First, as shown in FIG. 1, a silicon oxide film 2 is formed on a semiconductor substrate 1 by thermal oxidation.

Then, using a reduced pressure vapor phase reaction growth apparatus,
Polycrystalline silicon is formed with a thickness of 400 nm on the silicon oxide film 2 at a temperature of 620 ° C. using monosilane gas as a source gas. The resistance element 3 is formed on this polycrystalline silicon.

After that, boron is used as an impurity by an ion implantation method with an implantation energy of 40 keV and 5.
An ion implantation amount of 5 × 10 ¹³ cm ⁻² is introduced into polycrystalline silicon.

After that, a photoresist (not shown) is formed on the polycrystalline silicon, exposed by using a photomask, and developed to form a photoresist having a pattern corresponding to the resistance element 3 region.

After that, reactive ion etching (hereinafter referred to as R
Polycrystalline silicon is anisotropically etched by using an apparatus (described as IE) to form a resistance element 3 made of polycrystalline silicon.

After that, in order to activate the impurities introduced into the resistance element 3, a heat treatment is performed for 30 minutes in a nitrogen atmosphere at a temperature of 1000.degree.

After that, an interlayer insulating film 4 is formed on the resistance element 3 with a film thickness of 600 nm by using a normal pressure vapor phase reaction growth apparatus using monosilane gas and phosphine as source gases.

Then, a conductive hole for conduction is patterned in the interlayer insulating film 4 by a photoresist (not shown), and then a RIE device is formed by using a mixed gas of carbon tetrafluoride and trifluorohydrocarbon as a mask. Is used to anisotropically etch the interlayer insulating film 4 to form a conductive hole.

Subsequently, aluminum, which is a wiring material, is deposited on the interlayer insulating film 4 by a sputtering method to a film thickness of 1 μm.
m.

Subsequently, after patterning the wiring material with a photoresist, aluminum is anisotropically etched using chlorine gas with the photoresist as a mask using a RIE device to form the wiring 5.

After that, as the final protective film 6, a phosphorus glass film is formed to a thickness of 500 nm on the wiring 5 using monosilane and phosphine as source gases by an atmospheric pressure vapor phase reaction growth apparatus.
It is formed with a film thickness of.

After that, the bonding pad is patterned with a photoresist, and then anisotropic etching is performed with a mixed gas of carbon tetrafluoride and trifluorohydrocarbon using the photoresist as a mask by using an RIE device to form a bonding pad (see FIG. Open (not shown).

After that, the resistance value of the resistance element 3 is measured by a tester. Then, obtain the ratio with a predetermined resistance value,
At the temperature of 400 ° C shown in Fig. 2, the hydrogen flow rate is 9 liters /
The processing time of hydrogen annealing is determined from the graph of the annealing time and the resistance change in a hydrogen atmosphere, where

For example, when the predetermined resistance value is 80 kΩ / □, if the measured resistance value is 100 kΩ / □, the ratio to the predetermined resistance value is 0.8, so the hydrogen annealing treatment time is 30 minutes. Is.

Although the higher the annealing temperature is, the more hydrogen is diffused and the treatment can be performed in a short time, in order to prevent the silicon of the semiconductor substrate 1 from diffusing into the aluminum of the wiring 5 and increasing the junction leakage current. Annealing is performed at a temperature of 400 ° C.

Based on the above results, heat treatment is performed in a hydrogen atmosphere at a temperature of 400 ° C., hydrogen is introduced into the resistance element 3 through the final protective film 6 and the interlayer insulating film 4, and a predetermined resistance is obtained. A resistance element 3 having a value is obtained.

Although the resistance element using polycrystalline silicon formed by the reduced pressure vapor phase reaction growth apparatus has been described in the above embodiment, the resistance element is formed as polycrystalline silicon by forming amorphous silicon and subsequent heat treatment. The same control can be performed in the case of forming.

Next, an embodiment will be described in which amorphous silicon, for example, amorphous silicon is formed and then polycrystalline silicon is formed by heat treatment.

First, the silicon oxide film 2 is formed on the semiconductor substrate 1 by a thermal oxidation process.

Then, using a reduced pressure vapor phase reaction growth apparatus,
Amorphous silicon made of amorphous silicon is formed in a thickness of 400 nm on the silicon oxide film 2 at a temperature of 570 ° C. using monosilane gas as a source gas.

After that, boron is introduced as an impurity into the amorphous silicon by the ion implantation method.

After that, a photoresist (not shown) is formed on the amorphous silicon, exposed by using a photomask, and developed to form a photoresist having a pattern corresponding to the resistance element 3 region.

After that, anisotropic etching of amorphous silicon is performed by using a RIE device with a photoresist as a mask using sulfur hexafluoride gas to form a resistance element 3 made of amorphous silicon.

Then, heat treatment is performed for 30 minutes in a nitrogen atmosphere at a temperature of 1000 ° C. in order to change the amorphous silicon into polycrystalline silicon. During this heat treatment, the amorphous silicon can be changed into polycrystalline silicon and at the same time, the impurities introduced into the resistance element 3 can be activated. The manufacturing process after the above heat treatment is the same as the process described in the previous embodiment, and will be omitted.

In the embodiment described above, the resistance value of the resistance element 3 is measured after the opening of the bonding pad for conduction, and then hydrogen annealing is performed at a temperature of 400 ° C. to control the resistance value. However, after forming the wiring 5, the resistance value of the resistance element is measured, and hydrogen is introduced into the interlayer insulating film 4 by an annealing treatment in a hydrogen atmosphere or an ion implantation treatment, and after the final protective film 6 is formed, the temperature is changed. Annealing may be performed in a nitrogen atmosphere at 400 ° C.

By performing the above processing, hydrogen diffuses from the interlayer insulating film 4 into the resistance element 3, so that the resistance element 3
It is possible to control the resistance value of.

Further, as the final protective film 6, a film containing hydrogen at a high concentration, for example, a silicon nitride film is formed by using a plasma gas phase reaction growth apparatus with ammonia gas and monosilane gas as source gases, and then a nitrogen atmosphere at a temperature of 400 ° C. The resistance value of the resistance element can be similarly controlled by performing the annealing inside.

[0041]

As is apparent from the above description, by using the manufacturing method of the present invention, the resistance value of the resistance element formed of polycrystalline silicon is set to a predetermined value after the wiring is formed or after the final protective film is formed. Can be controlled. As a result, it is possible to form a resistance element having good reproducibility and controllability of the resistance value.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a graph showing changes in the hydrogen annealing time and the resistance value when the temperature of the semiconductor device manufacturing method in the example of the present invention is 400 ° C. and the hydrogen flow rate is 9 liters / minute.

[Explanation of symbols]

 1 semiconductor substrate 2 silicon oxide film 3 resistive element 4 interlayer insulating film 5 wiring 6 final protective film

Claims (11)

[Claims] 1. A step of forming polycrystalline silicon on a semiconductor substrate and introducing an impurity into the polycrystalline silicon, a step of patterning a resistance element by photoetching thereafter, a step of activating the introduced impurity, and a resistance The step of forming an interlayer insulating film on the element, patterning the connection holes by photoetching, further forming the wiring, the step of forming the final protective film and patterning the bonding pad by photoetching, and then the resistance value of the resistance element A method of manufacturing a semiconductor device, comprising: a step of measuring; and a step of subsequently introducing hydrogen into the resistance element to control the resistance value of the resistance element to a predetermined value. 2. A step of forming amorphous silicon on a semiconductor substrate, introducing impurities into the amorphous silicon, a step of patterning a resistance element by photoetching after that, and a heat treatment to perform the amorphous silicon. And the step of activating the impurities introduced at the same time as polycrystalline silicon,
The process of forming an interlayer insulating film on the resistance element and patterning the connection holes by photo-etching, further forming the wiring, the step of forming the final protective film and patterning the bonding pad by photo-etching, and then the resistance value of the resistance element. And a step of subsequently introducing hydrogen into the resistance element to control the resistance value to a predetermined value. 3. A step of forming polycrystalline silicon on a semiconductor substrate and introducing an impurity into the polycrystalline silicon, a step of patterning a resistance element by photoetching thereafter, a step of activating the introduced impurity, and a resistance step. A step of forming an interlayer insulating film on the element, patterning the connection holes by photoetching, further forming wiring, a step of measuring the resistance value of the resistive element after that, forming a final protective film and forming a bonding pad by photoetching. A method of manufacturing a semiconductor device, comprising: a step of patterning, and then a step of introducing hydrogen into the resistance element to control the resistance value of the resistance element to a predetermined value. 4. A step of forming amorphous silicon on a semiconductor substrate, introducing impurities into the amorphous silicon, a step of patterning a resistance element by photoetching thereafter, and a heat treatment to remove the amorphous silicon. A step of activating the impurities introduced at the same time as the polycrystalline silicon, a step of forming an interlayer insulating film on the resistance element, patterning the connection hole by photoetching, and further forming a wiring,
After that, a step of measuring the resistance value of the resistance element, a step of forming a final protective film and patterning the bonding pad by photoetching, and then introducing hydrogen into the resistance element and controlling the resistance value to a predetermined value. A method of manufacturing a semiconductor device, comprising: 5. The method of introducing hydrogen into the resistance element is a treatment in a hydrogen atmosphere.
2. The method for manufacturing a semiconductor device according to 2, 3, or 4. 6. The method of introducing hydrogen into the resistance element is a treatment of introducing hydrogen into the resistance element from a final protective film containing hydrogen, according to claim 1, 2, 3, or 4. Manufacturing method of semiconductor device. 7. The final protective film is a phosphorus glass film or a silicon nitride film,
3. The method for manufacturing a semiconductor device according to 3 or 4. 8. A step of forming polycrystalline silicon on a semiconductor substrate and introducing impurities into the polycrystalline silicon, a step of patterning a resistance element by photoetching thereafter, a step of activating the introduced impurities, and a resistance step. A step of forming an interlayer insulating film on the element, introducing hydrogen into the interlayer insulating film, and patterning the connection hole by photoetching,
A step of further forming a wiring, a step of forming a final protective film and patterning a bonding pad by photoetching, and a step of thereafter measuring a resistance value of the resistance element,
And then introducing hydrogen into the resistance element to control the resistance value of the resistance element to a predetermined value. 9. A step of forming amorphous silicon on a semiconductor substrate, introducing impurities into the amorphous silicon, a step of patterning a resistance element by photoetching thereafter, and a heat treatment to remove the amorphous silicon. A step of activating the impurities introduced at the same time as forming the polycrystalline silicon, a step of forming an interlayer insulating film on the resistance element and introducing hydrogen into the interlayer insulating film, a connection hole is patterned by photoetching, and wiring is further formed. The step of forming, the step of forming the final protective film and patterning the bonding pad by photo-etching, the step of measuring the resistance value of the resistance element after that, and then introducing hydrogen into the resistance element to set the resistance value to a predetermined value. A method of manufacturing a semiconductor device, comprising: controlling. 10. A step of forming polycrystalline silicon on a semiconductor substrate and introducing impurities into the polycrystalline silicon, a step of patterning a resistance element by photoetching thereafter, a step of activating the introduced impurities, and a resistance step. A step of forming an interlayer insulating film on the element, introducing hydrogen into the interlayer insulating film, and patterning the connection hole by photoetching,
A step of further forming a wiring, a step of thereafter measuring the resistance value of the resistance element, a step of forming a final protective film and patterning the bonding pad by photoetching,
And then introducing hydrogen into the resistance element to control the resistance value of the resistance element to a predetermined value. 11. A step of forming amorphous silicon on a semiconductor substrate and introducing impurities into the amorphous silicon, a step of patterning a resistance element by photoetching thereafter, and a heat treatment to remove the amorphous silicon. A step of activating the impurities introduced at the same time as forming the crystalline silicon, a step of forming an interlayer insulating film on the resistance element and introducing hydrogen into the interlayer insulating film, a connection hole is patterned by photoetching, and a wiring is further formed. Step, then measuring the resistance value of the resistance element, forming a final protective film and patterning the bonding pad by photoetching, and then introducing hydrogen into the resistance element and controlling the resistance value to a predetermined value. A method of manufacturing a semiconductor device, comprising: