JPH0883917A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH0883917A
JPH0883917A JP21983094A JP21983094A JPH0883917A JP H0883917 A JPH0883917 A JP H0883917A JP 21983094 A JP21983094 A JP 21983094A JP 21983094 A JP21983094 A JP 21983094A JP H0883917 A JPH0883917 A JP H0883917A
Authority
JP
Japan
Prior art keywords
concentration impurity
impurity layer
film
conductivity type
silicon film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21983094A
Other languages
Japanese (ja)
Inventor
Katsuhiko Nishiwaki
克彦 西脇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP21983094A priority Critical patent/JPH0883917A/en
Publication of JPH0883917A publication Critical patent/JPH0883917A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To reduce crystal grain boundaries and to decrease the leakage current of the boundaries by providing a first conductivity type high concentration impurity layer, a first conductivity type low concentration impurity layer, and a second conductivity type high concentration impurity layer, forming the first conductivity type low concentration impurity layer of a polycrystalline silicon film and containing halogen in the first conductivity type low concentration impurity layer. CONSTITUTION: An insulating film 13 made of a silicon dioxide film is provided on a semiconductor substrate 11, and a polycrystalline silicon film 17 for crystallizing an amorphous silicon film is provided on the film 13. A first conductivity type low concentration impurity layer 19 containing fluorine is provided on the film 17. Further, a first conductivity type high concentration impurity layer 21 and a second conductivity type high concentration impurity layer 23 are provided on the film 17. Thus, the grain size of the film 17 is increased to reduce the number of the grains. Further, a dangling bond existing in the boundary is terminated to be stabilized, thereby reducing a leakage current. As a result, excellent diode characteristics are obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の構造に関
し、とくに半導体基板上の絶縁膜を介して設けるダイオ
ードの構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor device, and more particularly to a structure of a diode provided on a semiconductor substrate via an insulating film.

【0002】[0002]

【従来の技術】従来の半導体基板上の絶縁膜を介して設
ける多結晶シリコン膜からなるダイオードの構造を、図
5の断面図を用いて説明する。
2. Description of the Related Art The structure of a conventional diode made of a polycrystalline silicon film provided via an insulating film on a semiconductor substrate will be described with reference to the sectional view of FIG.

【0003】図5に示すように、半導体基板11上に絶
縁膜13を設ける。この絶縁膜13上に多結晶シリコン
膜25を設ける。
As shown in FIG. 5, an insulating film 13 is provided on the semiconductor substrate 11. A polycrystalline silicon film 25 is provided on this insulating film 13.

【0004】さらに多結晶シリコン膜25に第1導電型
の高濃度不純物層21と、第2導電型の高濃度不純物層
23とを設けることによりダイオードを有する半導体装
置を形成する。
Further, a polycrystalline silicon film 25 is provided with a high-concentration impurity layer 21 of the first conductivity type and a high-concentration impurity layer 23 of the second conductivity type to form a semiconductor device having a diode.

【0005】[0005]

【発明が解決しようとする課題】この図5を用いて説明
したダイオードにおいては、第1導電型の高濃度不純物
層21と第2導電型の高濃度不純物層23との境界領域
でのリーク電流が大きくなり、充分なダイオード特性が
得られない。
In the diode described with reference to FIG. 5, the leakage current in the boundary region between the high-concentration impurity layer 21 of the first conductivity type and the high-concentration impurity layer 23 of the second conductivity type. Becomes large, and sufficient diode characteristics cannot be obtained.

【0006】この原因は従来の半導体装置では、多結晶
シリコン膜25を用いているため、多結晶シリコン膜2
5の膜形成時において安定な結晶が形成されている。こ
の安定な結晶構造を有する多結晶シリコン膜25に熱処
理を加えても、結晶成長しにくく、結晶粒界が多数存在
する。
This is because the conventional semiconductor device uses the polycrystalline silicon film 25.
A stable crystal was formed during the formation of the film of No. 5. Even if a heat treatment is applied to the polycrystalline silicon film 25 having this stable crystal structure, it is difficult for the crystal to grow and there are many crystal grain boundaries.

【0007】さらに第1導電型の高濃度不純物層21と
第2導電型の高濃度不純物層23との境界において、こ
の結晶粒界が多数存在するため結晶粒界を介したリーク
電流が多量に発生し、ダイオード特性を示さない。
Further, at the boundary between the first-conductivity-type high-concentration impurity layer 21 and the second-conductivity-type high-concentration impurity layer 23, a large number of these crystal grain boundaries exist, so that a large amount of leak current flows through the crystal grain boundaries. Occurs and does not exhibit diode characteristics.

【0008】本発明の目的は、上記の課題を解決して、
リーク電流を低減した良好なダイオード特性を有する半
導体装置の構造を提供することである。
The object of the present invention is to solve the above problems,
It is an object of the present invention to provide a structure of a semiconductor device having excellent diode characteristics with reduced leakage current.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するため
に、本発明の半導体装置は、下記記載の手段を採用す
る。
In order to achieve the above object, the semiconductor device of the present invention employs the following means.

【0010】本発明の半導体装置は、半導体基板上に酸
化シリコン膜からなる絶縁膜を介して設ける第1導電型
の高濃度不純物層と第1導電型の低濃度不純物層と第2
導電型の高濃度不純物層とを備え、第1導電型の低濃度
不純物層は多結晶化シリコン膜からなりハロゲンを含む
ことを特徴とする。
In the semiconductor device of the present invention, a first-conductivity-type high-concentration impurity layer, a first-conductivity-type low-concentration impurity layer, and a second-conductivity-type low-concentration impurity layer which are provided on a semiconductor substrate via an insulating film made of a silicon oxide film.
A high-concentration impurity layer of a conductive type is provided, and the low-concentration impurity layer of the first conductive type is made of a polycrystalline silicon film and contains halogen.

【0011】本発明の半導体装置は、半導体基板上に酸
化シリコン膜からなる絶縁膜を介して設ける第1導電型
の高濃度不純物層と第1導電型の低濃度不純物層と第2
導電型の高濃度不純物層とを備え、第1導電型の低濃度
不純物層は多結晶化シリコン膜からなりフッ素を含むこ
とを特徴とする。
In the semiconductor device of the present invention, a first-conductivity-type high-concentration impurity layer, a first-conductivity-type low-concentration impurity layer, and a second-conductivity-type low-concentration impurity layer which are provided on a semiconductor substrate via an insulating film made of a silicon oxide film.
A high-concentration impurity layer of a conductive type is provided, and the low-concentration impurity layer of the first conductive type is made of a polycrystalline silicon film and contains fluorine.

【0012】[0012]

【作用】本発明の半導体装置は、アモルファスシリコン
膜を結晶化した多結晶化シリコン膜を第1導電型の低濃
度不純物層として用いている。このため従来の多結晶シ
リコン膜の結晶粒径と比較して、本発明の第1導電型の
低濃度不純物層は3倍程度大結晶化しており、結晶粒界
数を低減することができる。
In the semiconductor device of the present invention, the polycrystalline silicon film obtained by crystallizing the amorphous silicon film is used as the low concentration impurity layer of the first conductivity type. Therefore, the first-conductivity-type low-concentration impurity layer of the present invention is approximately three times as large as the crystal grain size of the conventional polycrystalline silicon film, and the number of crystal grain boundaries can be reduced.

【0013】さらに、この多結晶化シリコン膜中にフッ
素を導入することにより、結晶粒界に存在するダングリ
ングボンドを、このフッ素により終端し安定化させる。
これらのことにより、結晶粒界でのリーク電流を低減す
ることができる。その結果、リーク電流を低減すること
が可能となり、特性が良好なダイオード特性を得ること
ができる。
Further, by introducing fluorine into the polycrystalline silicon film, dangling bonds existing at the crystal grain boundaries are terminated and stabilized by the fluorine.
With these, the leak current at the crystal grain boundary can be reduced. As a result, it becomes possible to reduce the leakage current, and it is possible to obtain a diode characteristic with good characteristics.

【0014】[0014]

【実施例】以下図面を用いて本発明の実施例における半
導体装置を説明する。図3の断面図を用いて本発明の半
導体装置の構造を説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings. The structure of the semiconductor device of the present invention will be described with reference to the sectional view of FIG.

【0015】図3に示すように、半導体基板11に二酸
化シリコン膜からなる絶縁膜13を設け、絶縁膜13上
にアモルファスシリコン膜を結晶化する多結晶化シリコ
ン膜17を設ける。
As shown in FIG. 3, an insulating film 13 made of a silicon dioxide film is provided on a semiconductor substrate 11, and a polycrystalline silicon film 17 for crystallizing an amorphous silicon film is provided on the insulating film 13.

【0016】そして、多結晶化シリコン膜17にフッ素
を含む第1導電型の低濃度不純物層19を設ける。さら
に、多結晶化シリコン膜17に第1導電型の高濃度不純
物層21と第2導電型の高濃度不純物層23を設けるこ
とによりダイオードを有する半導体装置とする。
Then, a first conductivity type low concentration impurity layer 19 containing fluorine is provided on the polycrystalline silicon film 17. Further, by providing the high-concentration impurity layer 21 of the first conductivity type and the high-concentration impurity layer 23 of the second conductivity type in the polycrystalline silicon film 17, a semiconductor device having a diode is obtained.

【0017】図3に示すように、本発明の半導体装置
は、アモルファスシリコン膜15を結晶化した多結晶化
シリコン膜17を用いている。このため図5に示す従来
の多結晶シリコン膜25の結晶粒径と比較して、本発明
の多結晶化シリコン膜17の結晶粒径は3倍程度大結晶
化しており、結晶粒界数の低減ができる。
As shown in FIG. 3, the semiconductor device of the present invention uses a polycrystalline silicon film 17 obtained by crystallizing the amorphous silicon film 15. Therefore, as compared with the crystal grain size of the conventional polycrystalline silicon film 25 shown in FIG. 5, the crystal grain size of the polycrystalline silicon film 17 of the present invention is approximately three times as large as the crystal grain size of the conventional polycrystalline silicon film 25. Can be reduced.

【0018】さらに、この多結晶化シリコン膜17中に
フッ素を導入することにより、結晶粒界に存在するダン
グリングボンドをこのフッ素により終端し安定化させ
る。これらのことにより、結晶粒界でのリーク電流を低
減することができる。
Further, by introducing fluorine into the polycrystalline silicon film 17, dangling bonds existing at the crystal grain boundaries are terminated by the fluorine and stabilized. With these, the leak current at the crystal grain boundary can be reduced.

【0019】その結果、本発明のダイオードにおいて
は、リーク電流を低減した良好なダイオード特性を得る
ことが可能となる。
As a result, in the diode of the present invention, it is possible to obtain good diode characteristics with reduced leakage current.

【0020】つぎにこの図3に示す半導体装置の構造を
形成するための製造方法を、図1から図3の断面図を用
いて簡単に説明する。
Next, a manufacturing method for forming the structure of the semiconductor device shown in FIG. 3 will be briefly described with reference to the sectional views of FIGS.

【0021】まず図1に示すように、半導体基板11を
温度1000℃で酸化処理して、二酸化シリコン膜から
なる絶縁膜13を形成する。
First, as shown in FIG. 1, the semiconductor substrate 11 is oxidized at a temperature of 1000 ° C. to form an insulating film 13 made of a silicon dioxide film.

【0022】その後、温度540℃でモノシランを反応
ガスとして用いる化学気相成長法により、膜厚が450
nmのアモルファスシリコン膜15を形成する。
After that, a film thickness of 450 is obtained by a chemical vapor deposition method using monosilane as a reaction gas at a temperature of 540 ° C.
An amorphous silicon film 15 having a thickness of nm is formed.

【0023】その後、図2に示すように、アモルファス
シリコン膜15を窒素雰囲気中で、温度1000℃、時
間30分の条件で結晶化を行なことにより多結晶化シリ
コン膜17を形成する。
Thereafter, as shown in FIG. 2, the amorphous silicon film 15 is crystallized in a nitrogen atmosphere at a temperature of 1000 ° C. for a time of 30 minutes to form a polycrystalline silicon film 17.

【0024】このアモルファスシリコン膜15を結晶化
処理して形成した多結晶化シリコン膜17に、二フッ化
ボロン(BF2 )を1×1013atoms/cm-2程度
のイオン注入量でイオン注入法により導入し、第1導電
型の低濃度不純物層19を形成する。
The polycrystalline silicon film 17 formed by crystallizing the amorphous silicon film 15 is ion-implanted with boron difluoride (BF2) at an ion implantation amount of about 1 × 10 13 atoms / cm -2. To introduce the low-concentration impurity layer 19 of the first conductivity type.

【0025】その後、窒素雰囲気中で、温度1000
℃、時間30分の条件で熱処理を行なうことにより結晶
粒界にフッ素を拡散させる。
Then, in a nitrogen atmosphere, a temperature of 1000
Fluorine is diffused into the crystal grain boundaries by heat treatment under the conditions of 30 ° C. and 30 minutes.

【0026】つづいて図3に示すように、多結晶化シリ
コン膜17の上に感光性樹脂(図示せず)を回転塗布法
により全面に形成し、所定のフォトマスクを用いて感
光、現像処理を行ない、感光性樹脂をダイオードを形成
する島状にパターニングする。
Subsequently, as shown in FIG. 3, a photosensitive resin (not shown) is formed on the entire surface of the polycrystalline silicon film 17 by a spin coating method, and exposed to light and developed using a predetermined photomask. Then, the photosensitive resin is patterned into islands forming a diode.

【0027】この多結晶化シリコン膜17のエッチング
は、反応性イオンエッチング装置を用い、エッチングガ
スとして六フッ化硫黄と酸素との混合ガスを用いて行な
う。その後、エッチングマスクに用いた感光性樹脂を除
去する。
The polycrystalline silicon film 17 is etched by using a reactive ion etching apparatus and a mixed gas of sulfur hexafluoride and oxygen as an etching gas. Then, the photosensitive resin used for the etching mask is removed.

【0028】つづいて多結晶化シリコン膜17上に感光
性樹脂(図示せず)を回転塗布法により全面に形成す
る。その後、所定のフォトマスクを用いて感光、現像処
理を行ない、感光性樹脂を第1導電型の高濃度不純物層
21の形成領域が開口するようにパターニングする。
Subsequently, a photosensitive resin (not shown) is formed on the entire surface of the polycrystalline silicon film 17 by a spin coating method. Then, a predetermined photomask is used to perform exposure and development, and the photosensitive resin is patterned so that the formation region of the high-concentration impurity layer 21 of the first conductivity type is opened.

【0029】その後、第1導電型の高濃度不純物層21
を形成するためイオン注入法によりボロンをイオン注入
量として、3×1015atoms/cm-2程度の条件で
行なう。その後、イオン注入に用いた感光性樹脂を除去
する。
After that, the high-concentration impurity layer 21 of the first conductivity type is formed.
In order to form the film, boron is ion-implanted by the ion-implantation method under the condition of about 3 × 10 15 atoms / cm −2 . Then, the photosensitive resin used for ion implantation is removed.

【0030】つづいて多結晶化シリコン膜17上に感光
性樹脂(図示せず)を回転塗布法により全面に形成す
る。その後、所定のフォトマスクを用いて感光、現像処
理を行ない、感光性樹脂を第2導電型の高濃度不純物層
23の形成領域が開口するようにパターニングする。
Subsequently, a photosensitive resin (not shown) is formed on the entire surface of the polycrystalline silicon film 17 by a spin coating method. After that, exposure and development processing is performed using a predetermined photomask, and the photosensitive resin is patterned so that the formation region of the second conductivity type high concentration impurity layer 23 is opened.

【0031】その後、第2導電型の高濃度不純物層23
を形成するためのイオン注入法によりリンをイオン注入
量として、3×1015atoms/cm-2程度の条件で
行なう。その後、イオン注入に用いた感光性樹脂を除去
する。
After that, the second-conductivity-type high-concentration impurity layer 23 is formed.
By using an ion implantation method for forming Pd with phosphorus as an ion implantation amount of about 3 × 10 15 atoms / cm −2 . Then, the photosensitive resin used for ion implantation is removed.

【0032】その後の工程は図示しないが、リンとボロ
ンとを含む酸化シリコン膜からなる層間絶縁膜を化学気
相成長法により形成し、さらに感光性樹脂をエッチング
マスクに用いて層間絶縁膜にコンタクトホールを形成
し、さらにシリコンと銅とを含むアルミニウムからなる
配線材料をスパッタリング法により形成し、感光性樹脂
をエッチングマスクに用いて配線材料をエッチングして
配線を形成して、ダイオードを有する半導体装置を得る
ことができる。
Although not shown in the subsequent steps, an interlayer insulating film made of a silicon oxide film containing phosphorus and boron is formed by a chemical vapor deposition method, and a photosensitive resin is used as an etching mask to contact the interlayer insulating film. A semiconductor device having a diode, in which a hole is formed, a wiring material made of aluminum containing silicon and copper is formed by a sputtering method, and the wiring material is etched by using a photosensitive resin as an etching mask to form a wiring. Can be obtained.

【0033】以上の実施例の説明では、第1導電型の低
濃度不純物層19にフッ素を導入する実施例で説明した
が、フッ素以外に塩素や臭素やヨウ素などのハロゲンを
導入してもよい。
In the above description of the examples, the example in which fluorine is introduced into the low concentration impurity layer 19 of the first conductivity type has been explained, but halogen such as chlorine, bromine or iodine may be introduced in addition to fluorine. .

【0034】[0034]

【発明の効果】以上の説明から明らかなように、本発明
の半導体装置の構造と製造方法とにおいて、アモルファ
スシリコン膜を結晶化した多結晶化シリコン膜を用い、
さらにこの多結晶化シリコン膜にフッ素の結晶粒界への
導入により、結晶粒界数の低減と結晶粒界で発生するリ
ーク電流の低減が可能となる。
As is clear from the above description, in the structure and manufacturing method of the semiconductor device of the present invention, a polycrystalline silicon film obtained by crystallizing an amorphous silicon film is used,
Furthermore, by introducing fluorine into the crystal grain boundaries in this polycrystalline silicon film, it is possible to reduce the number of crystal grain boundaries and the leakage current generated at the crystal grain boundaries.

【0035】本発明の半導体装置と従来の半導体装置の
ダイオード特性を図4のグラフに示す。本発明の特性を
実線27に示し、従来の特性を破線29に示す。図4に
示すように、従来と比較して本発明の半導体装置は良好
なダイオード特性が得られ、また、逆バイアス印加時の
リーク電流が1/100程度となる。この結果、従来の
半導体装置より、良好な特性を有するダイオードを有す
る半導体装置を得ることができる。
The diode characteristics of the semiconductor device of the present invention and the conventional semiconductor device are shown in the graph of FIG. The characteristic of the present invention is shown by the solid line 27, and the characteristic of the prior art is shown by the broken line 29. As shown in FIG. 4, the semiconductor device of the present invention has good diode characteristics as compared with the conventional one, and the leakage current when reverse bias is applied is about 1/100. As a result, it is possible to obtain a semiconductor device having a diode having better characteristics than the conventional semiconductor device.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例における半導体装置を示す断面
図である。
FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention.

【図2】本発明の実施例における半導体装置を示す断面
図である。
FIG. 2 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

【図3】本発明の実施例における半導体装置を示す断面
図である。
FIG. 3 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

【図4】本発明と従来例における半導体装置のダイオー
ド特性を対比して示すグラフである。
FIG. 4 is a graph showing the diode characteristics of the semiconductor device of the present invention and a conventional example in comparison.

【図5】従来例における半導体装置を示す断面図であ
る。
FIG. 5 is a cross-sectional view showing a semiconductor device in a conventional example.

【符号の説明】[Explanation of symbols]

11 半導体基板 13 絶縁膜 17 多結晶化シリコン膜 19 第1導電型の低濃度不純物層 21 第1導電型の高濃度不純物層 23 第2導電型の高濃度不純物層 Reference Signs List 11 semiconductor substrate 13 insulating film 17 polycrystal silicon film 19 first conductivity type low concentration impurity layer 21 first conductivity type high concentration impurity layer 23 second conductivity type high concentration impurity layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上に酸化シリコン膜からなる
絶縁膜を介して設ける第1導電型の高濃度不純物層と第
1導電型の低濃度不純物層と第2導電型の高濃度不純物
層とを備え、第1導電型の低濃度不純物層は多結晶化シ
リコン膜からなりハロゲンを含むことを特徴とする半導
体装置。
1. A first-conductivity-type high-concentration impurity layer, a first-conductivity-type low-concentration impurity layer, and a second-conductivity-type high-concentration impurity layer which are provided on a semiconductor substrate with an insulating film made of a silicon oxide film interposed therebetween. And a first conductivity type low-concentration impurity layer made of a polycrystalline silicon film containing halogen.
【請求項2】 半導体基板上に酸化シリコン膜からなる
絶縁膜を介して設ける第1導電型の高濃度不純物層と第
1導電型の低濃度不純物層と第2導電型の高濃度不純物
層とを備え、第1導電型の低濃度不純物層は多結晶化シ
リコン膜からなりフッ素を含むことを特徴とする半導体
装置。
2. A first-conductivity-type high-concentration impurity layer, a first-conductivity-type low-concentration impurity layer, and a second-conductivity-type high-concentration impurity layer which are provided on a semiconductor substrate through an insulating film made of a silicon oxide film. And a low-concentration impurity layer of the first conductivity type is made of a polycrystalline silicon film and contains fluorine.
JP21983094A 1994-09-14 1994-09-14 Semiconductor device Pending JPH0883917A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21983094A JPH0883917A (en) 1994-09-14 1994-09-14 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21983094A JPH0883917A (en) 1994-09-14 1994-09-14 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0883917A true JPH0883917A (en) 1996-03-26

Family

ID=16741718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21983094A Pending JPH0883917A (en) 1994-09-14 1994-09-14 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0883917A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8114722B2 (en) 2007-08-24 2012-02-14 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8114722B2 (en) 2007-08-24 2012-02-14 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device

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