JPH02187035A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To avoid a channeling phenomenon and form source and drain regions which are free from defective crystals by performing impurity ion implantation for the formation of the source and drain regions by using a gate electrode as a mask after making the whole surface of a single crystal substrate amorphous. CONSTITUTION:A gate SiO2 film 9 and a field SiO2 film 10 are formed on an n-type single crystal Si substrate 8 and an amorphous region 11 is formed on the surface of the substrate 8 by performing ion implantation of Si<+>. Then a gate poly Si electrode 12 is formed by performing patterning after growing a poly Si film at the temperature of a room with an optical CVD process. Then ion implantation ot BF is performed in the region 11 by using the electrode 12 as a mask. Further non-crystallized region is recrystallized by treating its region with heat; besides, its recrystallization makes impurities active and makes it possible to form p-type impurity regions 14 in source and drain regions. The source and drain regions which are free from detective crystals are thus formed without producing channeling phenomena.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method of manufacturing a semiconductor device, and more specifically, to a method of forming shallow source/drain regions of a field effect transistor, and controlling the depth by avoiding channeling phenomenon. The first invention aims to form a source/drain region that exhibits p-n junction characteristics with good properties (shallow formation, low leakage current, and no crystal defects). a step of ion-implanting an electrically inert element into the substrate through the gate insulating film to make the surface of the substrate amorphous; and a step of not destroying the amorphous nature of the substrate surface. A step of forming a gate electrode film by a low-temperature growth method and patterning the gate electrode film, and implanting impurity ions of a conductivity type opposite to that of the substrate using the patterned gate electrode film as a mask to form a source/drain layer. and a step of forming a region, and the second invention is a step of ion-implanting an element that is electrically inactive within the substrate into the surface of a semiconductor single crystal substrate to make the surface of the substrate amorphous. A step of forming a gate insulating film and a gate electrode film by a low-temperature growth method that does not destroy the amorphous nature of the substrate surface, and buttering the gate electrode film, and masking the patterned gate electrode film. The method includes a step of implanting impurity ions of a conductivity type opposite to that of the substrate to form source/drain regions.

(Industrial Application Field) The present invention relates to a method for manufacturing a semiconductor device,
More specifically, the present invention relates to a method of forming shallow source/drain regions of a field effect transistor.

In recent years, with the demand for miniaturization and higher speed of semiconductor devices, the source and drain are becoming closer together. For this reason,
A short channel effect, such as a decrease in the dark voltage of a transistor, occurs, impeding the proper operation of a semiconductor integrated circuit.

Therefore, it is required to form shallow source/drain regions, and for this purpose, it is necessary to lower the implantation energy of impurity ions for forming the source/drain and implant them shallowly.

However, in the case of impurity ions such as boron (B) with a small ionic radius, channeling phenomenon easily occurs.
The depth of implantation cannot be sufficiently suppressed simply by lowering the implantation energy.

[Conventional technology]

FIGS. 3(a) to 3(c) are diagrams illustrating a conventional method of manufacturing a semiconductor device that suppresses the channeling phenomenon and enables shallow ion implantation.

First, as shown in the same figure (a), an SiO□ film 2 and a field SiO! ll! form 3.

Next, as shown in cb) of the same figure, after forming a gate poly 5ill electrode 4, S is formed using the gate poly Si electrode 4 as a mask.
i'' is ion-implanted into the surface of the n-type single crystal Si substrate 1.

As a result, the crystallinity is destroyed and an amorphous region 5 is formed on the surface of the single crystal substrate l into which the S10 ions have been implanted.

Next, as shown in the same figure (C), using the gate poly S1 electrode 4 as a mask, BF! "Ion implantation. At this time, BF
Since the region into which the g'' ions are implanted is almost the same as the amorphous region 5, the channeling phenomenon of implanted ions due to crystallinity is avoided, and predetermined shallow ion implantation becomes possible.

After that, heat treatment is performed to activate the Bpt' ions and to recrystallize the amorphous region 5.
) As shown in p-type impurity 6 (source/drain region)
is formed.

In this manner, according to the conventional example, after forming the amorphous region 5, impurity ions (BF!') are implanted into the region, thereby avoiding channeling phenomenon and forming a predetermined shallow impurity region (source drain region).

[Problem to be solved by the invention]

However, according to the conventional semiconductor device manufacturing method, even if the amorphous region 5 is recrystallized by heat treatment, crystal defects 7 remain as shown in FIG. 4. This is considered to be because the progress rate of recrystallization of the amorphous region 5 differs depending on the crystal plane orientation, resulting in lattice mismatch and defects.

As shown in the figure, this crystal defect 7 is generated at the source/drain end and serves as a recombination center for electron-hole pairs, resulting in a p-n junction with a large leakage current, deteriorating the performance of the transistor.

The present invention was created in view of the problems of the conventional example, and it avoids the channeling phenomenon and forms a shallow channel with good controllability, and also provides a source/drain that exhibits p-n junction characteristics without crystal defects. An object of the present invention is to provide a method for manufacturing a semiconductor device that enables the formation of regions.

[Means to solve the problem]

The above-mentioned problem involves the process of forming a gate insulating film on a semiconductor single crystal substrate, and the step of ion-implanting an electrically inactive element within the substrate through the gate insulating film to make the surface of the substrate amorphous. forming a gate electrode film by a low-temperature growth method that does not destroy the amorphous nature of the substrate surface, and patterning the gate electrode film; and using the patterned gate electrode film as a mask, the substrate A method for manufacturing a semiconductor device according to the first aspect of the present invention, which is characterized in that it includes a step of implanting impurity ions of a conductivity type opposite to that of the semiconductor device to form source/drain formation regions; A process for making the surface of a crystalline substrate amorphous by ion-implanting an electrically inactive element within the substrate, and a low-temperature growth method that does not destroy the amorphous nature of the substrate surface. A step of forming an insulating film and a gate electrode film and patterning the gate electrode film, and implanting impurity ions of a conductivity type opposite to that of the substrate using the patterned gate electrode film as a mask to form source/drain regions. This is achieved by the method for manufacturing a semiconductor device according to the second aspect of the present invention, which is characterized in that it includes a step of forming a semiconductor device.

[Effect]

According to the first and second aspects of the present invention, after the entire surface of a semiconductor single crystal substrate is made amorphous regardless of the channel formation region and the source/drain formation region of the transistor, the gate electrode is used as a mask to form the source/drain. impurity ions are implanted. This enables shallow impurity ion implantation while avoiding the channeling phenomenon.

Then, when heat treatment is performed in a later step, recrystallization progresses uniformly from the bottom of the amorphous region toward the substrate surface. Crystal defects do not occur due to speed differences.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1A to 1E are diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

First, as shown in the same figure (a), an n-type single crystal Si substrate 8
10 nm thick gate sto, li! 9 and film thickness 5
00 nm field 5iQ-Wilo is formed.

Next, as shown in the same figure (b), Si1 was heated to 40 keV,
Ion implantation is performed under conditions of 2×10 cm − to form an amorphous region 11 with a depth of about 0.1 μm on the surface of the substrate 8 .

Next, as shown in FIG. 4C, a poly-Si film having a thickness of 0.2 μm is grown at room temperature using the photo-CVD method, and then patterned to form a gate poly 5f1t@12. Since the polySI film is formed at this time using a photo-CVD method at room temperature, recrystallization of the amorphous region 11 formed in the previous step does not proceed.

Next, as shown in the same figure (d), a gate poly-Si electrode 1 is formed.
2 as a mask, boron fluoride ion (BFg”
) is ion-implanted under the conditions of 40 keν and 2×10"cm-", the BF,° is implanted into the amorphous region 11, so that the ions are implanted to a depth of 0.1 without causing a channeling phenomenon.
It becomes possible to form a shallow impurity implanted region 13 on the order of μm.

Next, PTA (Rapid
When the thermal treatment is performed, the amorphous region is recrystallized and the implanted impurity is activated, forming a P-type impurity region 14 as a source/drain. Note that recrystallization at this time is uniformly recrystallized from the bottom of the amorphous region 11 toward the substrate surface, so that crystal defects due to differences in the direction of recrystallization as in the conventional method are eliminated. Does not occur. Therefore, there is almost no leakage current in the p-n junction formed between the source/drain and the substrate, and a transistor with good electrical characteristics and a shallow junction can be obtained.

FIGS. 2(a) to 2(c) are diagrams illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

In this case, unlike the first case, first, si'' is applied directly to the surface of the single crystal Si substrate 15 at 40 keV and 2×101
Ion implantation is performed under the condition of "cm-". As a result, the surface of the substrate 15 other than the area covered with the field StO and the film 16 is coated with a depth of 0.1 μm as shown in FIG.
An amorphous region 17 of about 100% is formed.

Next, as shown in the same figure (b), a 10 nm thick SiOJ! After depositing J 18 and further growing a poly S1 film with a thickness of 0.2 μm at room temperature using the photo-CVD method, the gate poly S1 electrode 19 is formed by patterning. At this time, the formation of the gate SiO
recrystallization does not proceed.

Next, as shown in the same figure (c), a gate poly-Si electrode 1 is formed.
9 as a mask, BFt is 40keV, 2X4Q1Sc
When ion implantation is performed under the conditions of BF!'', the BF!'' is implanted into the amorphous region 17, so that a shallow impurity implantation region 20 with a depth of about 0.1 μm can be formed without causing a channeling phenomenon. It becomes possible.

Next, RT A (Rapid
Ther+mal^nneallng) recrystallizes the amorphous region and activates the implanted impurity to form sources and drains. At this time, recrystallization proceeds uniformly from the bottom of the amorphous region 11 toward the substrate surface, so that crystal defects do not occur due to differences in the direction of recrystallization as in the conventional case.

In addition, in the embodiment of the second invention, unlike the embodiment of the first invention, the formation of the SiOg film and the formation of the gate electrode are performed in the step of making the substrate surface amorphous and the impurity ions for forming the source and drain. Since this is performed between the injection process and the implantation process, it is necessary to form not only the gate electrode but also the gate SIOTML at a low temperature using a photo-CVD method or the like.

In addition, in the example, Si'' was used to make the substrate surface amorphous, but other ions are not limited to this as long as they are electrically inactive within the substrate. In the case of Sr, Ge (germanium) may be used.Also, although photo-CVD was used to form the gate poly 5ill and gate 5i02 films, recrystallization of the amorphous region does not proceed and the temperature is below about 600°C. Other low temperature growth methods such as ECR (Elect-ron Cyclotron
Re5onance) plasma CVD method or the like may be used.

〔Effect of the invention〕

As explained above, according to the present invention, after the entire surface of a single crystal substrate is made amorphous, impurity ions for forming the source and drain are implanted using the gate electrode as a mask, thereby preventing the channeling phenomenon of the impurity ions. In addition to allowing shallow injection with good controllability, recrystallization of the amorphous region can be
It can proceed uniformly from the bottom of the amorphous region toward the substrate surface.

This prevents the formation of crystal defects at the p-n junction of the source and drain and reduces leakage current, making it possible to improve transistor characteristics with shallow sources and drains and suppressed short channel effects. It becomes possible to create transistors.

[Brief explanation of the drawing]

FIGS. 1(a) to (e) are explanatory diagrams of an embodiment of a method for manufacturing a semiconductor device according to the first invention, and FIGS. 2(a) to (c) are illustrations of a method for manufacturing a semiconductor device according to the second invention. FIGS. 3A to 3C are explanatory diagrams of a conventional semiconductor device, and FIG. 4 is a diagram illustrating problems in the conventional example. (Explanation of symbols) 1.8.15...Single crystal S+ substrate, 2.9.18...Gate SiO□ film, 3.10.16
...Field 5i02 film, 4.12.19...Gate poly-Si electrode, 5.11. IT... Amorphous region, 6.14... P-type impurity region, 7... Crystal defect, 13°20... Impurity implantation region.

Claims (2)

[Claims] (1) Forming a gate insulating film on a semiconductor single crystal substrate, and ion-implanting an electrically inactive element into the substrate through the gate insulating film to make the surface of the substrate amorphous. forming a gate electrode film by a low-temperature growth method that does not destroy the amorphous nature of the substrate surface, and patterning the gate electrode film; and controlling the conductivity of the substrate using the patterned gate electrode film as a mask. 1. A method for manufacturing a semiconductor device, comprising the step of implanting impurity ions of a conductivity type opposite to the type to form source/drain regions. (2) A step of ion-implanting an electrically inactive element within the substrate into the surface of a semiconductor single crystal substrate to make the surface of the substrate amorphous, and a low temperature that does not destroy the amorphous nature of the substrate surface. A step of forming a gate insulating film and a gate electrode film by a growth method and patterning the gate electrode film, and implanting impurity ions of a conductivity type opposite to that of the substrate using the patterned gate electrode film as a mask. A method of manufacturing a semiconductor device, comprising the step of forming source/drain regions.