JPH07202376A - Circuit board having resistor - Google Patents
Circuit board having resistorInfo
- Publication number
- JPH07202376A JPH07202376A JP5351302A JP35130293A JPH07202376A JP H07202376 A JPH07202376 A JP H07202376A JP 5351302 A JP5351302 A JP 5351302A JP 35130293 A JP35130293 A JP 35130293A JP H07202376 A JPH07202376 A JP H07202376A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- circuit board
- substrate
- resistors
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、基板の絶縁表面上に対
向して形成された一対の導体からなる電極にわたって膜
状の抵抗体が形成された回路基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board in which a film-shaped resistor is formed over electrodes composed of a pair of conductors formed so as to face each other on an insulating surface of the board.
【０００２】[0002]
【従来の技術】回路基板は、基板の絶縁表面上に導体ペ
ースト、抵抗ペースト、オーバーコート用の絶縁ペース
ト等を順次印刷し、焼付け、さらに基板の縁にクリップ
リード等を取り付けることにより製造される。このよう
な回路基板上に形成される膜状の抵抗体は、導体ペース
トの印刷、焼成工程で形成された一対の電極にわたっ
て、酸化ルテニウムペーストやカーボンペースト等を印
刷し、焼成する、いわゆる厚膜法、或は、酸化ルテニウ
ムやカーボンをスパッタリングする、いわゆる薄膜法等
により形成される。何れの方法でも、抵抗体を予め所定
の抵抗値より小さ目の抵抗値になるよう形成しておき、
その後レーザトリミング等の手段で抵抗値を調整するよ
うにしている。2. Description of the Related Art A circuit board is manufactured by sequentially printing a conductor paste, a resistance paste, an insulating paste for overcoat, etc. on an insulating surface of the board, baking it, and attaching a clip lead or the like to the edge of the board. . A film-shaped resistor formed on such a circuit board is a so-called thick film in which a ruthenium oxide paste, a carbon paste, or the like is printed and burned across a pair of electrodes formed in the printing and firing of a conductor paste. Or a so-called thin film method of sputtering ruthenium oxide or carbon. In either method, the resistor is formed in advance to have a resistance value smaller than a predetermined resistance value,
After that, the resistance value is adjusted by means such as laser trimming.
【０００３】前記抵抗体を含む回路パターンを形成した
回路基板は、その上にコンデンサや抵抗器あるいは半導
体部品のような回路部品を搭載し、混成集積回路として
構成される。このような混成集積回路には、回路の保護
を目的として、樹脂等の外装コーティングが施される。A circuit board on which a circuit pattern including the resistor is formed has a circuit component such as a capacitor, a resistor or a semiconductor component mounted thereon, and is constructed as a hybrid integrated circuit. Such a hybrid integrated circuit is coated with a resin or the like for the purpose of protecting the circuit.
【０００４】[0004]
【発明が解決しようとしている課題】このような回路基
板は、その上に回路部品を搭載するときに受ける外力や
外装コーティングの収縮力等により、基板が反ることが
ある。基板にこのような反りが発生すると、その主面に
形成された抵抗体が伸ばされたり縮んだりする。抵抗体
が伸ばされると、電極間の距離が増大し、且つ抵抗体の
膜厚が薄くなるため、電極間の抵抗値が増大する。他
方、抵抗体が縮まると、電極間の距離が減少し、且つ抵
抗体の膜厚が厚くなるため、電極間の抵抗値が減少す
る。何れの場合も抵抗値の変動となって現れ、回路特性
の変動をもたらす。Such a circuit board may warp due to an external force received when a circuit component is mounted thereon or a contracting force of an exterior coating. When such a warp occurs in the substrate, the resistor formed on the main surface thereof is stretched or contracted. When the resistor is stretched, the distance between the electrodes is increased and the film thickness of the resistor is reduced, so that the resistance value between the electrodes is increased. On the other hand, when the resistor contracts, the distance between the electrodes decreases and the film thickness of the resistor increases, so that the resistance value between the electrodes decreases. In any case, it appears as a change in the resistance value, which causes a change in the circuit characteristics.
【０００５】従来では、このような回路特性の変動を防
止するため、回路部品を回路基板の両面に均等に搭載し
たり、塗料を基板全体に均等に塗布して、回路基板の搭
載や塗料の収縮により、基板の反りが生じないようにし
ていた。しかしこのような対策により回路基板の反りを
皆無にすることはすこぶる困難であり、抵抗値の誤差が
±１％以内の抵抗体を有する回路基板を得ることは非常
に困難であった。本考案は、このような従来の課題に鑑
み、基板に反りが生じても、抵抗体の抵抗値の変動の無
い回路基板を提供することを目的とする。Conventionally, in order to prevent such fluctuations in circuit characteristics, circuit components are evenly mounted on both sides of the circuit board, or paint is evenly applied to the entire board to mount the circuit board or to remove the paint. The substrate was not warped due to the contraction. However, it is extremely difficult to eliminate the warpage of the circuit board by such measures, and it is very difficult to obtain a circuit board having a resistor whose resistance value error is within ± 1%. The present invention has been made in view of such conventional problems, and an object thereof is to provide a circuit board in which the resistance value of the resistor does not fluctuate even when the board warps.
【０００６】[0006]
【課題を解決するための手段】すなわち、本発明では、
前記の目的を達成するため、基板１の絶縁表面上に対向
して形成された一対の導体膜からなる電極４ａ、４ａ、
４ｂ、４ｂにわたって膜状の抵抗体４ａ、４ｂを形成す
るに当り、基板１の片面だけでなく、抵抗体４ａ、４ｂ
を基板１の両主面のほぼ対応する位置に形成する。そし
て、これら抵抗体４ａ、４ａを並列または直列に接続す
る。That is, according to the present invention,
In order to achieve the above-mentioned object, electrodes 4a, 4a made of a pair of conductor films formed on the insulating surface of the substrate 1 so as to face each other,
When forming the film-shaped resistors 4a and 4b over 4b and 4b, not only one surface of the substrate 1 but also the resistors 4a and 4b are formed.
Are formed at substantially corresponding positions on both main surfaces of the substrate 1. Then, these resistors 4a, 4a are connected in parallel or in series.
【０００７】この場合、基板１の両主面に形成された抵
抗体４ａ、４ｂは、同一材料でほぼ同形状及びほぼ同膜
厚に形成されているのが望ましい。また、基板１の両主
面に形成された抵抗体４ａ、４ｂを接続する手段として
は、スルーホールまたはバイアホールによる接続、クリ
ップリードを介する接続或は基板１の端面を通ってその
両主面にわたって形成された導体膜９を介する接続等が
あげられる。In this case, it is desirable that the resistors 4a and 4b formed on both main surfaces of the substrate 1 be made of the same material and have substantially the same shape and thickness. As means for connecting the resistors 4a and 4b formed on both main surfaces of the substrate 1, connection by through holes or via holes, connection via clip leads, or both end surfaces of the substrate 1 are used. A connection and the like via the conductor film 9 formed over the entire surface can be given.
【０００８】[0008]
【作用】この回路基板では、抵抗体４ａ、４ｂを基板１
の両主面のほぼ対応する位置に形成しているため、基板
１が反った場合、必ず一方の抵抗体４ａまたは４ｂが伸
びてその抵抗値ＲaまたはＲbが増大し、他方の抵抗体４
ｂまたは４ａが縮んでその抵抗値ＲbまたはＲaが減少す
る。しかし、これら抵抗体４ａ、４ｂは並列または直列
に接続されているため、これらの抵抗値Ｒa、Ｒbの変動
ΔＲa、ΔＲbが互いに相殺され、その合成抵抗値（１／
Ｒa＋１／Ｒb）-1またはＲa＋Ｒbが殆ど変化しない。こ
のため、回路基板の製造時に、前記の合成抵抗を予め所
定の値に調整しておくことにより、その後の回路部品の
搭載、樹脂コーティングの形成等により、基板１に反り
が生じても、抵抗値の変動が殆どなくなる。In this circuit board, the resistors 4a and 4b are connected to the board 1.
When the substrate 1 is warped, one of the resistors 4a or 4b always extends and its resistance value Ra or Rb increases, and the other resistor 4 is formed.
b or 4a shrinks and its resistance value Rb or Ra decreases. However, since the resistors 4a and 4b are connected in parallel or in series, the fluctuations ΔRa and ΔRb of the resistance values Ra and Rb cancel each other out, and the combined resistance value (1 /
Ra + 1 / Rb) -1 or Ra + Rb hardly changes. Therefore, by adjusting the combined resistance to a predetermined value in advance when manufacturing the circuit board, even if the board 1 is warped due to subsequent mounting of circuit components, formation of resin coating, etc. Almost no fluctuation of the value.
【０００９】このような点から、基板１の両主面に形成
される抵抗体４ａ、４ｂは、同一材料でほぼ同形状及び
ほぼ同膜厚に形成した場合が、最も正確に抵抗値の変動
を相殺できることになる。さらに、基板１の両主面に形
成された抵抗体４ａ、４ｂを、スルーホールまたはバイ
アホールにより接続したり、クリップリードを介して接
続したり、或は基板１の端面を通ってその両主面にわた
って形成された導体膜を介して接続することで、既往の
回路基板の製造工程の中で前記のような回路基板を製造
することができ、特別な工程を追加する必要が無くな
る。From this point of view, when the resistors 4a and 4b formed on both main surfaces of the substrate 1 are made of the same material and have substantially the same shape and substantially the same film thickness, the resistance value varies most accurately. Can be offset. Further, the resistors 4a and 4b formed on both main surfaces of the substrate 1 are connected by through holes or via holes, or via clip leads, or are passed through the end faces of the substrate 1 to both main surfaces. By connecting via the conductor film formed over the surface, the circuit board as described above can be manufactured in the existing circuit board manufacturing process, and it is not necessary to add a special process.
【００１０】[0010]
【実施例】次に、図面を参照しながら、本発明の実施例
について詳細に説明する。図１に示すように、アルミナ
やガラス−エポキシ樹脂等からなる基板１の表面と裏面
との互いに対応する位置に導電ペーストが印刷され、焼
き付けられて、導体膜からなる電極２ａ、２ａ、２ｂ、
２ｂが一対ずつ形成されている。これら電極２ａ、２
ａ、２ｂ、２ｂは、基板１の表面と裏面とにおいて、各
々所定の距離だけ対向している。基板１にその両面を貫
通するようスルーホール３、３が形成され、このスルー
ホール３に形成されたスルーホール導体により、表面と
裏面との互いに対応する電極２ａ、２ａ、２ｂ、２ｂが
接続されている。なお、スルーホール３は、バイアホー
ルに代えることもできる。Embodiments of the present invention will now be described in detail with reference to the drawings. As shown in FIG. 1, conductive paste is printed and baked on the front surface and the back surface of a substrate 1 made of alumina, glass-epoxy resin or the like at positions corresponding to each other, and electrodes 2a, 2a, 2b made of a conductive film,
Two pairs of 2b are formed. These electrodes 2a, 2
a, 2b, and 2b are opposed to each other by a predetermined distance on the front surface and the back surface of the substrate 1. Through holes 3, 3 are formed in the substrate 1 so as to penetrate both sides thereof, and the electrodes 2a, 2a, 2b, 2b corresponding to the front surface and the back surface are connected by the through hole conductor formed in the through hole 3. ing. The through hole 3 can be replaced with a via hole.
【００１１】前記表面側の電極２ａ、２ａ及び裏面側の
電極２ｂ、２ｂにわたって基板１上に酸化ルテニウムや
カーボン等を主体する抵抗ペーストを印刷し、焼き付け
ることで、膜状の抵抗体４ａ、４ｂを形成する。これに
より、スルーホール３の導体を介して並列に接続された
一対の抵抗体４ａ、４ｂが基板１の両主面に形成され
る。この場合、表面側に形成される抵抗体４ａと裏面側
に形成される抵抗体４ｂとは、できるだけ同じ形状で、
且つ同じ膜厚とするのが望ましい。By printing and baking a resistance paste mainly composed of ruthenium oxide, carbon or the like on the substrate 1 over the electrodes 2a, 2a on the front surface side and the electrodes 2b, 2b on the back surface side, film-shaped resistors 4a, 4b are printed. To form. As a result, a pair of resistors 4a and 4b connected in parallel via the conductor of the through hole 3 are formed on both main surfaces of the substrate 1. In this case, the resistor 4a formed on the front surface side and the resistor 4b formed on the back surface side have the same shape as much as possible,
Moreover, it is desirable that the film thickness is the same.
【００１２】その後、抵抗体４ａ、４ｂを各々覆うよう
にガラスペーストを印刷し、焼き付けてオーバコート膜
５ａ、５ｂを形成する。次に、表面側と裏面側の抵抗体
４ａ、４ｂをレーザカッタ等によりトリミングし、それ
らの抵抗値を所定の値に調整する。この場合、表面側と
裏面側の抵抗体４ａ、４ｂの合成抵抗値がある定められ
た抵抗値になるように調整する。図１において、６ａ、
６ｂはトリミング溝を示す。以上の工程により、抵抗体
を有する回路基板が完成する。Thereafter, a glass paste is printed so as to cover the resistors 4a and 4b, respectively, and baked to form overcoat films 5a and 5b. Next, the resistors 4a and 4b on the front surface side and the rear surface side are trimmed by a laser cutter or the like, and their resistance values are adjusted to predetermined values. In this case, the combined resistance value of the resistors 4a and 4b on the front surface side and the back surface side is adjusted to be a predetermined resistance value. In FIG. 1, 6a,
6b shows a trimming groove. Through the above steps, the circuit board having the resistor is completed.
【００１３】このようにして製造された回路基板では、
電極２ａ、２ａの間または電極２ｂ、２ｂの間におい
て、基板１の両主面の抵抗体４ａ、４ｂの並列合成抵抗
値（１／Ｒa＋１／Ｒb）-1を得ることができる。この場
合、図１（ｂ）で矢印で示すように、例えば基板１が反
った場合、表面側の抵抗体４ａが伸びてその抵抗値が増
大し、裏面側の抵抗体４ｂが縮んでその抵抗値が減少す
る。しかし、これら抵抗体４ａ、４ｂは並列に接続され
ているため、その合成抵抗値（１／Ｒa＋１／Ｒb）-1の
中で、各々の抵抗体４ａ、４ｂの抵抗値の変動ΔＲa、
ΔＲbが互いに相殺される。このため、前記合成抵抗値
は殆ど変わらない。なお、基板１の両主面に形成される
抵抗体４ａ、４ｂは、同一材料でほぼ同形状及びほぼ同
膜厚とすると、正確に抵抗値の変動を相殺できる。In the circuit board manufactured in this way,
The parallel combined resistance value (1 / Ra + 1 / Rb) −1 of the resistors 4a and 4b on both main surfaces of the substrate 1 can be obtained between the electrodes 2a and 2a or between the electrodes 2b and 2b. In this case, as shown by the arrow in FIG. 1B, for example, when the substrate 1 is warped, the resistor 4a on the front surface side extends and its resistance value increases, and the resistor 4b on the back surface side contracts and its resistance increases. The value decreases. However, since the resistors 4a and 4b are connected in parallel, the variation ΔRa of the resistance value of each of the resistors 4a and 4b in the combined resistance value (1 / Ra + 1 / Rb) −1 ,
ΔRb cancel each other out. Therefore, the combined resistance value hardly changes. If the resistors 4a and 4b formed on both main surfaces of the substrate 1 are made of the same material and have substantially the same shape and substantially the same film thickness, fluctuations in the resistance value can be accurately offset.
【００１４】前記基板１としてアルミナ基板を使用し、
電極２ａ、２ｂとしてＡｇ−Ｐｄ導体を使用し、抵抗体
４ａ、４ｂとして酸化ルテニウム系抵抗体を使用し、１
０ＫΩの合成抵抗値を目標として抵抗体４ａ、４ｂをレ
ーザトリミングし、図１で示すような回路基板を実際に
１００個製造したところ、１０ＫΩ±０．３％の精度の
合成抵抗値を得ることができた。この回路基板の裏面側
にのみ回路部品を搭載し、エポキシ樹脂で外装コーティ
ングした後、再度合成抵抗値を測定したところ、１０Ｋ
Ω±０．４％と、精度は殆ど変わらなかった。An alumina substrate is used as the substrate 1,
Ag-Pd conductors are used as the electrodes 2a and 2b, and ruthenium oxide-based resistors are used as the resistors 4a and 4b.
When the resistors 4a and 4b are laser-trimmed aiming at a combined resistance value of 0 KΩ and 100 circuit boards as shown in FIG. 1 are actually manufactured, a combined resistance value with an accuracy of 10 KΩ ± 0.3% is obtained. I was able to. After mounting circuit components only on the back side of this circuit board and coating the exterior with epoxy resin, the combined resistance was measured again and found to be 10K.
The accuracy was almost the same as Ω ± 0.4%.
【００１５】他方、基板１上の片面のみに抵抗体が形成
され、その抵抗体のトリミング後の抵抗値が１０ＫΩ±
０．３％の回路基板を１００個製造し、前述と同様にし
てその抵抗体が形成された側の片面側にのみ回路部品を
搭載し、エポキシ樹脂で外装コーティングした。その
後、再度抵抗体の抵抗値を測定したところ、１０ＫΩ±
１．０％と、その精度が大幅に悪くなった。On the other hand, a resistor is formed only on one surface of the substrate 1, and the resistance value of the resistor after trimming is 10 KΩ ±.
100 0.3% circuit boards were manufactured, and in the same manner as described above, circuit components were mounted only on one side of the side where the resistors were formed, and exterior coating was performed with epoxy resin. After that, when the resistance value of the resistor was measured again, it was 10 KΩ ±
The accuracy was significantly reduced to 1.0%.
【００１６】次に、図２で示した実施例について説明す
ると、この実施例では、抵抗体４ａ、４ｂの両側にある
電極２ａ、２ａ、２ｂ、２ｂのうち、基板１の縁側に形
成された一方の電極２ａ、２ｂ、すなわち図２において
右側の電極２ａ、２ｂを、基板１の端面を通ってその両
主面にわたって形成した導体膜９により互いに接続して
いる。従って、この回路基板では、両面の抵抗体４ａ、
４ｂが直列接続されている。その他の点は、前述の実施
例と同じである。Next, the embodiment shown in FIG. 2 will be described. In this embodiment, of the electrodes 2a, 2a, 2b, 2b on both sides of the resistors 4a, 4b, they are formed on the edge side of the substrate 1. One of the electrodes 2a and 2b, that is, the electrodes 2a and 2b on the right side in FIG. 2 are connected to each other by a conductor film 9 formed through the end surface of the substrate 1 and over both main surfaces thereof. Therefore, in this circuit board, the resistors 4a on both sides are
4b are connected in series. The other points are the same as those of the above-described embodiment.
【００１７】このような回路基板では、他方の電極２
ａ、２ａの間で合成抵抗値Ｒa＋Ｒbを得ることができ
る。従ってこの場合も、基板１が反ったときの各々の抵
抗体４ａ、４ｂの抵抗値Ｒa、Ｒbの変動ΔＲa、ΔＲbが
互いに相殺される。このため、やはり前記合成抵抗値が
殆ど変わらない。In such a circuit board, the other electrode 2
A combined resistance value Ra + Rb can be obtained between a and 2a. Therefore, also in this case, the fluctuations ΔRa and ΔRb of the resistance values Ra and Rb of the resistors 4a and 4b when the substrate 1 is warped cancel each other out. Therefore, the combined resistance value is hardly changed.
【００１８】次に、図３で示した実施例について説明す
ると、この図３では、基板１の片側の面の電極２ａ、２
ａ、抵抗体４ａ及びオーバーコート膜５ａのみを示して
いる。基板１の他方の面側は図示してないが、この他面
側にも、前記片面側と同じパターンの電極２ｂ、２ｂ、
抵抗体４ｂ及びオーバーコート膜５ｂが形成されてい
る。Next, the embodiment shown in FIG. 3 will be described. In FIG. 3, the electrodes 2a, 2 on one surface of the substrate 1 are shown.
Only a, the resistor 4a, and the overcoat film 5a are shown. Although the other surface side of the substrate 1 is not shown, the electrodes 2b, 2b having the same pattern as the one surface side,
The resistor 4b and the overcoat film 5b are formed.
【００１９】この実施例では、抵抗体４ａの両側にある
電極２ａ、２ａ（及び２ｂ、２ｂ）を基板１の縁付近ま
で延ばしてリードランド７ａ、７ａ（及び７ｂ、７ｂ）
を形成している。そして、基板１のリードランド７ａ、
７ａ（及び７ｂ、７ｂ）の部分をクリップリード８、８
で挟み、このクリップリード８、８を前記リードランド
７ａ、７ａ（及び７ｂ、７ｂ）に半田付けしている。こ
れにより、対応する電極２ａ、２ａ、２ｂ、２ｂが、ク
リップリード８、８を介して互いに接続され、基板１の
両主面にある抵抗体４ａ、４ｂが並列に接続される。In this embodiment, the electrodes 2a, 2a (and 2b, 2b) on both sides of the resistor 4a are extended to near the edge of the substrate 1 and lead lands 7a, 7a (and 7b, 7b).
Is formed. Then, the lead land 7a of the substrate 1,
7a (and 7b, 7b) are clip leads 8, 8
The clip leads 8 and 8 are soldered to the lead lands 7a and 7a (and 7b and 7b). As a result, the corresponding electrodes 2a, 2a, 2b, 2b are connected to each other via the clip leads 8, 8 and the resistors 4a, 4b on both main surfaces of the substrate 1 are connected in parallel.
【００２０】従って、このようにして製造された回路基
板では、クリップリード８、８の間で合成抵抗値（１／
Ｒa＋１／Ｒb）-1を得ることができる。そして、基板１
が反ったときの抵抗体４ａ、４ｂの抵抗値の変動ΔＲ
a、ΔＲbが、この合成抵抗の中で互いに相殺されること
は、前記の各実施例と同じである。Therefore, in the circuit board manufactured in this way, the combined resistance value (1 /
Ra + 1 / Rb) -1 can be obtained. And the substrate 1
Variation in resistance value of the resistors 4a and 4b when the warp occurs
The fact that a and ΔRb cancel each other out in this combined resistance is the same as in the previous embodiments.
【００２１】なお、前記の実施例では、基板１の両面の
抵抗体４ａ、４ｂをスルーホール３の導体、基板１の端
面の導体９或はクリップリード８で接続している。これ
らは、回路基板を製造する際に、基板１の表裏の回路パ
ターンを接続する一般的な手段であるので、前記の各実
施例は、回路基板を製造するときの通常の工程に特別の
工程を付加することなく実施することができる。前記の
ような接続手段によらず、リード線やクリップ状の導体
等、他の接続手段で両面の電極２ａ、２ａと２ｂ、２ｂ
を接続してもよいことは、もちろんである。さらに、こ
れらの接続手段は、併用することができる。すなわち、
一方の対応する電極２ａ、２ｂと他方の対応する電極２
ａ、２ｂとを、各々別の手段で接続することもできる。In the above embodiment, the resistors 4a and 4b on both sides of the substrate 1 are connected by the conductor of the through hole 3, the conductor 9 on the end face of the substrate 1 or the clip lead 8. Since these are general means for connecting the circuit patterns on the front and back of the substrate 1 when manufacturing the circuit board, each of the above-described embodiments is a special process for the normal process when manufacturing the circuit board. Can be implemented without adding. Electrodes 2a, 2a and 2b, 2b on both sides may be formed by other connecting means such as lead wires or clip-shaped conductors instead of the above connecting means.
Of course, it is possible to connect. Furthermore, these connecting means can be used together. That is,
One corresponding electrode 2a, 2b and the other corresponding electrode 2
It is also possible to connect a and 2b by different means.
【００２２】[0022]
【発明の効果】以上説明した通り、本発明による回路基
板では、基板１に反りが生じた場合でも、基板１の表裏
の抵抗体４ａ、４ｂの抵抗値の変動ΔＲa、ΔＲbが互い
に相殺されるため、それらの合成抵抗値の変動が殆どな
くなる。これにより、回路特性の変動の無い回路基板が
得られ、信頼性の向上が図れる。As described above, in the circuit board according to the present invention, even if the board 1 is warped, the fluctuations ΔRa and ΔRb of the resistance values of the resistors 4a and 4b on the front and back sides of the board 1 cancel each other out. Therefore, there is almost no variation in the combined resistance value. As a result, a circuit board having no fluctuation in circuit characteristics can be obtained, and reliability can be improved.
【０００９】なお、基板１の両主面に同一材料でほぼ同
形状及びほぼ同膜厚に抵抗体４ａ、４ｂを形成した回路
基板では、より正確な合成抵抗値の保持が可能である。
さらに、基板１の両主面に形成された抵抗体４ａ、４ｂ
を、スルーホールまたはバイアホールにより接続した
り、クリップリードを介して接続したり、或は基板１の
端面を通ってその両主面にわたって形成された導体膜を
介して接続したものでは、既往の回路基板の製造工程に
特別な工程を追加すること無く回路基板の製造が可能で
ある。In the circuit board in which the resistors 4a and 4b are formed on the both main surfaces of the substrate 1 with the same material to have substantially the same shape and the substantially same film thickness, it is possible to more accurately maintain the combined resistance value.
Further, the resistors 4a and 4b formed on both main surfaces of the substrate 1
Are connected by a through hole or a via hole, via a clip lead, or through a conductor film formed over both main surfaces of the substrate 1 through the end face thereof. The circuit board can be manufactured without adding a special process to the circuit board manufacturing process.
【図１】本発明の実施例を示す回路基板の要部平面図と
そのＢ−Ｂ線断面図である。FIG. 1 is a plan view of a main part of a circuit board showing an embodiment of the present invention and a cross-sectional view taken along line BB thereof.
【図２】本発明の他の実施例を示す回路基板の要部縦断
側面図である。FIG. 2 is a vertical sectional side view of an essential part of a circuit board showing another embodiment of the present invention.
【図３】本発明の他の実施例を示す回路基板の要部平面
図である。FIG. 3 is a main part plan view of a circuit board showing another embodiment of the present invention.
１ 基板 ２ａ 電極 ２ｂ 電極 ３ スルーホール ４ａ 抵抗体 ４ｂ 抵抗体 ５ａ オーバーコート膜 ７ａ リードランド ８ クリップリード ９ 基板の端面の導体膜 1 substrate 2a electrode 2b electrode 3 through hole 4a resistor 4b resistor 5a overcoat film 7a lead land 8 clip lead 9 conductor film on the end face of the substrate
Claims (5)
一対の導体膜からなる電極にわたって膜状の抵抗体が形
成された回路基板において、基板（１）の両主面のほぼ
対応する位置に抵抗体（４ａ）、（４ｂ）が形成され、
これら抵抗体（４ａ）、（４ａ）が並列または直列に接
続されていることを特徴とする抵抗体を有する回路基
板。1. A circuit board in which a film-shaped resistor is formed across electrodes made of a pair of conductor films formed on the insulating surface of the board so as to face each other, and substantially corresponding to both main surfaces of the board (1). Resistors (4a) and (4b) are formed at the positions,
A circuit board having a resistor, wherein the resistors (4a) and (4a) are connected in parallel or in series.
主面に形成された抵抗体（４ａ）、（４ｂ）は、同一材
料でほぼ同形状及びほぼ同膜厚に形成されていることを
特徴とする抵抗体を有する回路基板。2. The resistors (4a), (4b) formed on both main surfaces of the substrate (1) according to claim 1, are made of the same material and have substantially the same shape and thickness. A circuit board having a resistor.
（１）の両主面に形成された抵抗体（４ａ）、（４ｂ）
は、スルーホール（３）またはバイアホールにより接続
されていることを特徴とする抵抗体を有する回路基板。3. The resistor (4a), (4b) according to claim 1 or 2, which is formed on both main surfaces of the substrate (1).
Is a circuit board having a resistor, which is connected by a through hole (3) or a via hole.
板（１）の両主面に形成された抵抗体（４ａ）、（４
ｂ）は、クリップリード（８）を介して接続されている
ことを特徴とする抵抗体を有する回路基板。4. The resistor (4a), (4) formed on both main surfaces of a substrate (1) according to any one of claims 1 to 3.
b) circuit board having a resistor, characterized in that it is connected via a clip lead (8).
板（１）の両主面に形成された抵抗体（４ａ）、（４
ｂ）は、基板（１）の端面を通ってその両主面にわたっ
て形成された導体膜（９）を介して接続されていること
を特徴とする抵抗体を有する回路基板。5. The resistor (4a), (4) formed on both main surfaces of a substrate (1) according to any one of claims 1 to 4.
2B is a circuit board having a resistor, which is characterized in that it is connected through the conductor film (9) formed through both end surfaces of the board (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5351302A JPH07202376A (en) | 1993-12-30 | 1993-12-30 | Circuit board having resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5351302A JPH07202376A (en) | 1993-12-30 | 1993-12-30 | Circuit board having resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07202376A true JPH07202376A (en) | 1995-08-04 |
Family
ID=18416389
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5351302A Withdrawn JPH07202376A (en) | 1993-12-30 | 1993-12-30 | Circuit board having resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07202376A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109961913A (en) * | 2017-12-14 | 2019-07-02 | 米库龙电气有限公司 | The capacitor of resistor and strip resistance device |
-
1993
- 1993-12-30 JP JP5351302A patent/JPH07202376A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109961913A (en) * | 2017-12-14 | 2019-07-02 | 米库龙电气有限公司 | The capacitor of resistor and strip resistance device |
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| Date | Code | Title | Description |
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| A300 | Withdrawal of application because of no request for examination |
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