JPH0719794B2 - Bonding stage of film carrier - Google Patents

Bonding stage of film carrier

Info

Publication number
JPH0719794B2
JPH0719794B2 JP61242502A JP24250286A JPH0719794B2 JP H0719794 B2 JPH0719794 B2 JP H0719794B2 JP 61242502 A JP61242502 A JP 61242502A JP 24250286 A JP24250286 A JP 24250286A JP H0719794 B2 JPH0719794 B2 JP H0719794B2
Authority
JP
Japan
Prior art keywords
film carrier
semiconductor element
groove
inner lead
bonding stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61242502A
Other languages
Japanese (ja)
Other versions
JPS6396932A (en
Inventor
哲郎 河北
浩二 松永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61242502A priority Critical patent/JPH0719794B2/en
Publication of JPS6396932A publication Critical patent/JPS6396932A/en
Publication of JPH0719794B2 publication Critical patent/JPH0719794B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、フィルムキャリアのボンディングステージに
関するものである。
TECHNICAL FIELD The present invention relates to a bonding stage of a film carrier.

従来の技術 従来の技術を第2図とともに説明する。まず第2図
(a)に示したように、半導体素子11はステージ12によ
り加熱されるとともに真空孔13によって固定され、半導
体素子11の電極上に形成された突起電極14とフィルムキ
ャリアのインナーリード15とを位置合せをする。次に第
2図(b)に示すように、加熱されたボンディングツー
ル16によってフィルムキャリアのインナーリード15と半
導体素子11の電極上に形成された突起電極14とを熱圧着
によって接合する。次に第2図(c)に示すように加圧
を解除する。なお、2図において、17はフィルムキャリ
アのポリイミドテープである。
Conventional Technology Conventional technology will be described with reference to FIG. First, as shown in FIG. 2 (a), the semiconductor element 11 is heated by the stage 12 and fixed by the vacuum holes 13, and the projection electrodes 14 formed on the electrodes of the semiconductor element 11 and the inner leads of the film carrier. Align 15 with. Next, as shown in FIG. 2 (b), the inner lead 15 of the film carrier and the protruding electrode 14 formed on the electrode of the semiconductor element 11 are joined by thermocompression bonding by the heated bonding tool 16. Next, the pressure is released as shown in FIG. 2 (c). In FIG. 2, 17 is a polyimide tape of the film carrier.

発明が解決しようとする問題点 しかし、従来の方式においてはフィルムキャリアのイン
ナーリードをボンディングツールで半導体素子の電極上
に形成された突起電極に熱圧着によって接合する際、イ
ンナーリードとともにフィルムキャリアのポリイミドテ
ープも一緒に押し下げられ、この状態でインナーリード
と突起電極とが接合される。よってボンディングツール
による加圧及び半導体素子の真空による固定を解除した
ときには、ポリイミドテープがもとにもどるため、イン
ナーリードと半導体素子のエッヂとが接触をおこしやす
くなり、動作時インナーリード半導体素子とがショート
して破断したり、半導体素子が破壊されたりする。この
解決方法の一つとしてフィルムキャリアのインナーリー
ドと半導体素子の電極上に形成された突起電極と位置合
せする工程において、インナーリードと突起電極の間隔
を大きくとってやる方法があるが、この方法をとるとイ
ンナーリードと突起電極の位置ずれをおこす原因となり
好ましくない。
However, in the conventional method, when the inner leads of the film carrier are bonded by thermocompression bonding to the protruding electrodes formed on the electrodes of the semiconductor element with the bonding tool, the polyimide of the film carrier is used together with the inner leads. The tape is also pushed down together, and in this state, the inner lead and the protruding electrode are joined. Therefore, when the pressure of the bonding tool and the fixation of the semiconductor element by vacuum are released, the polyimide tape returns to its original state, so that the inner lead and the edge of the semiconductor element easily come into contact with each other, and the inner lead semiconductor element during operation is separated. It may be short-circuited and broken, or the semiconductor element may be broken. As one of the solutions, there is a method of increasing the distance between the inner lead and the protruding electrode in the step of aligning the inner lead of the film carrier with the protruding electrode formed on the electrode of the semiconductor element. This is not preferable because it causes the positional deviation between the inner lead and the protruding electrode.

問題点を解決するための手段 本発明は、フィルムキャリアに形成されたデバイスホー
ルとほぼ同一の寸法を有する第1の溝と、前記第1の溝
の底面に形成された半導体素子の外寸とほぼ同一の寸法
を有する第2の溝を備えてなるフィルムキャリアのボン
ディングステージである。
Means for Solving the Problems The present invention provides a first groove having substantially the same size as a device hole formed in a film carrier, and an outer size of a semiconductor element formed on a bottom surface of the first groove. It is the bonding stage of the film carrier provided with the 2nd groove | channel which has substantially the same dimension.

作用 本発明は前記の構成により、第1の溝によってフィルム
キャリアのポリイミドテープがボンディングツールとと
もに押し下げられるのを防ぎ、インナーリードの半導体
素子へのエッヂタッチを防止するとともに、半導体素子
をフィルムキャリアに信頼性高く実装する。また、イン
ナーリードと突起電極とを接合すると同時にリードをフ
ォーミングするため工程削減にもなる。
The present invention has the above-described structure, which prevents the polyimide tape of the film carrier from being pushed down by the first groove together with the bonding tool, prevents the edge touch of the inner lead to the semiconductor element, and makes the semiconductor element reliable in the film carrier. Highly implemented. Further, since the leads are formed at the same time when the inner leads and the protruding electrodes are joined, the number of steps can be reduced.

実施例 第1図に本発明の一実施例を示す。まず第1図(a)に
示すように、ボンディングステージ1の第2の溝2に半
導体素子3を挿入し、ボンディングステージ1の底部に
設けられた真空用の穴4によって半導体素子3を固定す
る。次に、フィルムキャリアのインナーリード5とステ
ージ6によって150℃に加熱された半導体素子3の突起
電極7とを位置合せする、用いたフィルムキャリアのイ
ンナーリードは厚さ35μmのCuリードに0.4μmのSnメ
ッキを施したものであり、半導体素子3の突起電極7
は、表面層がAuであり、厚さ30μmのものである。次に
第1図(b)に示すように、450℃に加熱されたボンデ
ィングツール8によってフィルムキャリアのインナーリ
ード5と半導体素子3の突起電極7とを接合すると同時
に、深さ25μmの第1の溝9とボンディングツール8に
よってインナーリード5をフォーミングする。この時、
フィルムキャリアのポリイミドテープ17が存在する部分
は、ボンディングステージ1の第1の溝9の外側の凸部
で下方向の移動しないように固定しているため、容易に
インナーリード5をフォーミングすることができる。ま
た、インナーリード5がボンディングステージ1に接触
しないように、第2の溝2の深さは半導体素子3の厚み
よりも浅くしておくのが好ましい。次に第1図(c)に
示すように、ボンディングツール8による加圧および真
空による半導体素子3の固定を解除する。
Embodiment FIG. 1 shows an embodiment of the present invention. First, as shown in FIG. 1A, the semiconductor element 3 is inserted into the second groove 2 of the bonding stage 1, and the semiconductor element 3 is fixed by the vacuum hole 4 provided at the bottom of the bonding stage 1. . Next, the inner lead 5 of the film carrier is aligned with the protruding electrode 7 of the semiconductor element 3 heated to 150 ° C. by the stage 6. The inner lead of the film carrier used is a Cu lead having a thickness of 35 μm and a lead of 0.4 μm. It is Sn-plated and has a protruding electrode 7 of the semiconductor element 3.
Has a surface layer of Au and a thickness of 30 μm. Then, as shown in FIG. 1 (b), the inner lead 5 of the film carrier and the protruding electrode 7 of the semiconductor element 3 are bonded by the bonding tool 8 heated to 450 ° C., and at the same time, the first lead having a depth of 25 μm is bonded. The inner lead 5 is formed by the groove 9 and the bonding tool 8. This time,
Since the portion of the film carrier where the polyimide tape 17 is present is fixed so as not to move downward by the convex portion on the outside of the first groove 9 of the bonding stage 1, the inner lead 5 can be easily formed. it can. Further, it is preferable that the depth of the second groove 2 be smaller than the thickness of the semiconductor element 3 so that the inner lead 5 does not come into contact with the bonding stage 1. Next, as shown in FIG. 1 (c), the fixing of the semiconductor element 3 by pressure and vacuum by the bonding tool 8 is released.

発明の効果 以上説明したように本発明では、フィルムキャリアのイ
ンナーリードと半導体素子の突起電極とを接合する際
に、本発明のボンディングステージとボンディングツー
ルによってインナーリードをフォーミングするとともに
半導体素子へのエッヂタッチを防ぐことができ、信頼性
高い実装が可能となる。また接合とフォーミングが同時
にできるため工程の短縮化もはかれる。
As described above, according to the present invention, when the inner lead of the film carrier and the protruding electrode of the semiconductor element are joined, the inner lead is formed by the bonding stage and the bonding tool of the present invention and the edge to the semiconductor element is formed. Touch can be prevented, and highly reliable mounting is possible. Moreover, since the joining and the forming can be performed at the same time, the process can be shortened.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例におけるボンディングステー
ジを用いたボンディング方法を示す工程断面図、第2図
は従来例の工程断面図である。 2……第2の溝、3……半導体素子、4……真空孔、5
……インナーリード、6……ステージ、7……突起電
極、8……ボンディングツール、9……第1の溝、17…
…ポリイミドテープ。
FIG. 1 is a process sectional view showing a bonding method using a bonding stage in one embodiment of the present invention, and FIG. 2 is a process sectional view of a conventional example. 2 ... second groove, 3 ... semiconductor element, 4 ... vacuum hole, 5
...... Inner lead, 6 …… Stage, 7 …… Protruding electrode, 8 …… Bonding tool, 9 …… First groove, 17…
… Polyimide tape.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】フィルムキャリアに形成されたデバイスホ
ールとほぼ同一の寸法を有する第1の溝と、前記第1の
溝の底面に形成された半導体素子の外寸とほぼ同一の寸
法を有する第2の溝を備えてなるフィルムキャリアのボ
ンディングステージ。
1. A first groove having substantially the same size as a device hole formed in a film carrier, and a first groove having substantially the same size as the outer size of a semiconductor element formed on the bottom surface of the first groove. A film carrier bonding stage having two grooves.
【請求項2】第2の溝が半導体素子の厚さよりも浅いも
のである特許請求の範囲第1項記載のフィルムキャリア
のボンディングステージ。
2. The film carrier bonding stage according to claim 1, wherein the second groove is shallower than the thickness of the semiconductor element.
JP61242502A 1986-10-13 1986-10-13 Bonding stage of film carrier Expired - Fee Related JPH0719794B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61242502A JPH0719794B2 (en) 1986-10-13 1986-10-13 Bonding stage of film carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61242502A JPH0719794B2 (en) 1986-10-13 1986-10-13 Bonding stage of film carrier

Publications (2)

Publication Number Publication Date
JPS6396932A JPS6396932A (en) 1988-04-27
JPH0719794B2 true JPH0719794B2 (en) 1995-03-06

Family

ID=17090048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61242502A Expired - Fee Related JPH0719794B2 (en) 1986-10-13 1986-10-13 Bonding stage of film carrier

Country Status (1)

Country Link
JP (1) JPH0719794B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112721209B (en) * 2020-12-15 2022-09-20 业成科技(成都)有限公司 Film bonding's clamp plate tool, pressfitting structure and film bonding device

Also Published As

Publication number Publication date
JPS6396932A (en) 1988-04-27

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Legal Events

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LAPS Cancellation because of no payment of annual fees