JPS6396932A - Bonding stage for film carrier - Google Patents
Bonding stage for film carrierInfo
- Publication number
- JPS6396932A JPS6396932A JP61242502A JP24250286A JPS6396932A JP S6396932 A JPS6396932 A JP S6396932A JP 61242502 A JP61242502 A JP 61242502A JP 24250286 A JP24250286 A JP 24250286A JP S6396932 A JPS6396932 A JP S6396932A
- Authority
- JP
- Japan
- Prior art keywords
- film carrier
- groove
- semiconductor element
- bonding
- tool
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 23
- 239000000969 carrier Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 6
- 239000004642 Polyimide Substances 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、フィルムキャリアのボンディングステージに
関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a bonding stage for film carriers.
従来の技術
従来の技術を第2図とともに説明する。まず第2図(a
)に示したように、半導体素子11はステージ12によ
り加熱されるとともに真空孔13によって固定され、半
導体素子11の電極上に形成された突起電極14とフィ
ルムキャリアのインナーリード16とを位置合せをする
0次に第2図中)に示すように、加熱されたボンディン
グツール16によってフィルムキャリアのインナーリー
ド16と半導体素子11の電極上に形成された突起電極
14とを熱圧着によって接合する。次に第2図(C)に
示すように加圧を解除する。BACKGROUND ART A conventional technique will be explained with reference to FIG. First, Figure 2 (a
), the semiconductor element 11 is heated by the stage 12 and fixed by the vacuum hole 13, and the protruding electrodes 14 formed on the electrodes of the semiconductor element 11 and the inner leads 16 of the film carrier are aligned. As shown in FIG. 2), the inner leads 16 of the film carrier and the protruding electrodes 14 formed on the electrodes of the semiconductor element 11 are bonded by thermocompression using a heated bonding tool 16. Next, the pressurization is released as shown in FIG. 2(C).
発明が解決しようとする問題点
しかし、従来の方式においてはフィルムキャリアのイン
ナーリードをポンディングツールで半導体素子の電極上
に形成された突起電極に熱圧着によって接合する際、イ
ンナーリードとともにフィルムキャリアのポリイミドテ
ープも一緒に押し下げられ、この状態でインナーリード
と突起電極とが接合される。よってポンディングツール
による加圧及び半導体素子の真空による固定を解除した
ときには、ポリイミドテープがもとにもどるため、イン
ナーリードと半導体素子のエッヂとが接触をおこしやす
くなり、動作時インナーリード半導体素子とがショート
して破断したり、半導体素子が破壊されたりする。この
解決方法の一つとしてフィルムキャリアのインナーリー
ドと半導体素子の電極上に形成された突起電極と位置合
せする工程において、インナーリードと突起電極の間隔
を大きくとってやる方法があるが、この方法をとるとイ
ンナーリードと突起電極の位置ずれをおこす原因となり
好ましくない。Problems to be Solved by the Invention However, in the conventional method, when bonding the inner leads of the film carrier to the protruding electrodes formed on the electrodes of the semiconductor element by thermocompression bonding using a bonding tool, the inner leads of the film carrier are bonded together with the inner leads. The polyimide tape is also pushed down, and in this state the inner lead and the protruding electrode are joined. Therefore, when the pressure applied by the pounding tool and the vacuum fixation of the semiconductor element are released, the polyimide tape returns to its original state, making it easier for the inner lead and the edge of the semiconductor element to come into contact with each other. may short-circuit and break, or the semiconductor element may be destroyed. One way to solve this problem is to increase the distance between the inner leads and the protruding electrodes in the process of aligning the inner leads of the film carrier with the protruding electrodes formed on the electrodes of the semiconductor element. If removed, the inner lead and the protruding electrode may become misaligned, which is undesirable.
問題点を解決するための手段
本発明は、チップと同じ大きさかつチップの厚みと同等
の深さを持つ第1の溝と、その周辺に段部によって形成
されたフィルムキャリアのデバイスホールと同じ大きさ
を持った第2の溝を有したフィルムキャリアのボンディ
ングステージである。Means for Solving the Problems The present invention provides a first groove having the same size as the chip and a depth equivalent to the thickness of the chip, and a step portion around the first groove that is the same as the device hole of the film carrier. A bonding stage of a film carrier having a second groove with a certain size.
作用
本発明は前記の構成により、第2の溝によってフィルム
キャリアのポリイミドテープがボンディングツールとと
もに押し下げられるのを防ぎ、インナーリードの半導体
素子へのエッヂタッチを防止するとともに、半導体素子
をフィルムキャリアに信頼性高く実装する。また、イン
ナーリードと突起電極とを接合すると同時にリードをフ
ォーミングするため工程削減にもなる。Effect of the Invention With the above-described configuration, the present invention prevents the polyimide tape of the film carrier from being pushed down together with the bonding tool by the second groove, prevents the inner lead from touching the edge of the semiconductor element, and allows the semiconductor element to be attached to the film carrier. Implement with high quality. Further, since the inner lead and the protruding electrode are bonded together and the lead is formed at the same time, the number of steps can be reduced.
実施例
第1図に本発明の一実施例を示す。まず第1図(IL)
に示すように、ポンディングステージ1の第1の溝2に
半導体素子3を挿入し、ポンディングステージ1の底部
に設けられた真空用の穴4によって半導体素子3を固定
する。次に、フィルムキャリアのインナーリード5とス
テージ6によって160°Cに加熱された半導体素子3
の突起電極7とを位置合せする、用いたフィルムキャリ
アのインナーリードは厚さ36μmのCuリードに0.
4μmのSnメッキを施したものであり、半導体素子3
の突起電極7は、表面層がムUであり、厚さ30μmの
ものである。次に第1図(b)に示すように、450’
Cに加熱されたポンディングツール8によってフィルム
キャリアのインナーリード6と半導体素子3の突起電極
7とを接合すると同時に、深さ25μmの第2の溝9と
ボンディングツール8によってインナーリード6をフォ
ーミングする。Embodiment FIG. 1 shows an embodiment of the present invention. First, Figure 1 (IL)
As shown in FIG. 2, the semiconductor element 3 is inserted into the first groove 2 of the bonding stage 1, and the semiconductor element 3 is fixed through the vacuum hole 4 provided at the bottom of the bonding stage 1. Next, the semiconductor element 3 is heated to 160°C by the inner lead 5 of the film carrier and the stage 6.
The inner lead of the film carrier used is aligned with the protruding electrode 7 of 36 μm thick Cu lead.
It is plated with 4 μm of Sn, and the semiconductor element 3
The protruding electrode 7 has a rough surface layer and a thickness of 30 μm. Next, as shown in FIG. 1(b), 450'
At the same time, the inner leads 6 of the film carrier and the protruding electrodes 7 of the semiconductor element 3 are bonded by the bonding tool 8 heated to C. At the same time, the inner leads 6 are formed using the second groove 9 having a depth of 25 μm and the bonding tool 8. .
次に第1図(0)に示すように、ボンディングツール8
による加圧および真空による半導体素子3の固定を解除
する。Next, as shown in FIG. 1(0), the bonding tool 8
The fixation of the semiconductor element 3 due to pressure and vacuum is released.
発明の詳細
な説明したように本発明では、フィルムキャリアのイン
ナーリードと半導体素子の突起電極とを接合する際に、
本発明のポンディングステージとポンディングツールに
よってインナーリードをフォーミングするとともに半導
体素子へのエッヂタッチを防ぐことができ、信頼性高い
実装が可能となる。また接合とフォーミングが同時にで
きるため工程の短縮化もはかれる。DETAILED DESCRIPTION OF THE INVENTION As described above, in the present invention, when bonding the inner lead of the film carrier and the protruding electrode of the semiconductor element,
By using the bonding stage and the bonding tool of the present invention, it is possible to form the inner lead and prevent edge touching to the semiconductor element, allowing highly reliable mounting. Additionally, since bonding and forming can be done at the same time, the process can be shortened.
第1図は本発明の一実施例におけるポンディングステー
ジを用いたボンディング方法を示す工程断面図、第2図
は従来例の工程断面図である。
11・・・・・・半導体素子、12・・・・・・ステー
ジ、13・・・・・・真空孔、14・・・・・・突起電
極、15・・・・・・インナーリード、16・・・・・
・ボンディングツール。
11−一一手魂1本素5
12− ステージ
13−真空孔
14− 突起電極
(CンFIG. 1 is a process sectional view showing a bonding method using a bonding stage in an embodiment of the present invention, and FIG. 2 is a process sectional view of a conventional example. 11... Semiconductor element, 12... Stage, 13... Vacuum hole, 14... Projection electrode, 15... Inner lead, 16・・・・・・
・Bonding tool. 11-One move soul 1 element 5 12-Stage 13-Vacuum hole 14-Protruding electrode (C
Claims (2)
ほぼ同一の寸法を有する第1の溝と、前記第1の溝の底
面に形成された半導体素子の外寸とほぼ同一の寸法を有
する第2溝を備えてなるフィルムキャリアのボンディン
グステージ。(1) A first groove having approximately the same dimensions as the device hole formed in the film carrier, and a second groove having approximately the same dimensions as the outer dimension of the semiconductor element formed on the bottom surface of the first groove. A bonding stage for film carriers.
る特許請求の範囲第1項記載のフィルムキャリアのボン
ディングステージ。(2) A bonding stage for a film carrier according to claim 1, wherein the first groove is shallower than the thickness of the semiconductor element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61242502A JPH0719794B2 (en) | 1986-10-13 | 1986-10-13 | Bonding stage of film carrier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61242502A JPH0719794B2 (en) | 1986-10-13 | 1986-10-13 | Bonding stage of film carrier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6396932A true JPS6396932A (en) | 1988-04-27 |
JPH0719794B2 JPH0719794B2 (en) | 1995-03-06 |
Family
ID=17090048
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61242502A Expired - Fee Related JPH0719794B2 (en) | 1986-10-13 | 1986-10-13 | Bonding stage of film carrier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0719794B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112721209A (en) * | 2020-12-15 | 2021-04-30 | 业成科技(成都)有限公司 | Film bonding's clamp plate tool, pressfitting structure and film bonding device |
-
1986
- 1986-10-13 JP JP61242502A patent/JPH0719794B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112721209A (en) * | 2020-12-15 | 2021-04-30 | 业成科技(成都)有限公司 | Film bonding's clamp plate tool, pressfitting structure and film bonding device |
Also Published As
Publication number | Publication date |
---|---|
JPH0719794B2 (en) | 1995-03-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |