JPH07183519A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the characteristics of a top gate type TFT in which polycrystalline silicon is used as an active layer. CONSTITUTION:The title semiconductor device manufacturing method consists of a process in which a polycrystalline silicon film 3 is formed on a translucent insulating substrate 1, a process in which the polycrystalline silicon film 3 is insularly patterned, a process in which a part of the surface of the polycrystalline silicon film 3 is removed by etching, a process in which a gate insulating film 4 is formed on the whole surface, a process with which a gate electrode 5 is formed on the gate insulating film 4, and a process in which a source/drain region 6 is formed by introducing a dopant into the polycrystalline silicon film 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a structure in which a control electrode is formed on a polycrystalline semiconductor film via an insulating film.

[0002]

2. Description of the Related Art Display devices using electroluminescence, light-emitting diode, plasma, liquid crystal, etc. are capable of reducing the thickness of the display unit, so that terminal display devices for measuring instruments, office equipment, computers, etc., Alternatively, there is an increasing demand for use as a special display device.

Among these, in recent years, an active matrix type liquid crystal display device using a thin film transistor (TFT) as a switching element has attracted attention. Particularly, a so-called drive circuit integrated type in which a high-definition liquid crystal display (TFT-LCD) and a peripheral drive circuit are formed on the same translucent insulating substrate (for example, a glass substrate or a quartz substrate) has been actively researched and developed. ing.

In such a liquid crystal display device, a technique of forming a polycrystalline silicon film as an active layer at a low temperature below the strain point of the substrate is important so that no strain is introduced into the translucent insulating substrate. .

As a method of forming a polycrystalline silicon film by a low temperature process, there are an excimer laser annealing method and a plasma CVD method. However, the former method has a drawback that a large area polycrystalline silicon film cannot be formed with good uniformity. is there.

However, the method of forming the polycrystalline silicon film which is the active layer of the TFT by the plasma CVD method has the following problems. That is, coplanar type T
In the case of a top gate type TFT such as an FT or a forward stagger type TFT, there is a problem that the crystallinity of the polycrystalline silicon film deteriorates near the interface between the substrate and the polycrystalline silicon film, and good TFT characteristics cannot be obtained.

[0007]

As described above, when the polycrystal silicon film which is the active layer of the TFT is formed by the plasma CVD method, the crystallinity of the polycrystal silicon film is increased in the vicinity of the interface between the substrate and the polycrystal silicon film. There is a problem that the TFT characteristics are disturbed and the TFT characteristics are deteriorated.

The present invention has been made in view of the above circumstances. An object of the present invention is to form a control electrode on a polycrystalline semiconductor film via an insulating film, and the control electrode forms a control electrode on the insulating film side. In a method of manufacturing a semiconductor device having a structure for controlling the carrier concentration on the surface of a polycrystalline semiconductor film, it is an object of the present invention to improve deterioration of characteristic characteristics due to the polycrystalline semiconductor film.

[0009]

In order to achieve the above object, in a method of manufacturing a semiconductor device of the present invention, a control electrode is formed on a polycrystalline semiconductor film via an insulating film, and the control electrode is used for insulation. In a method for manufacturing a semiconductor device having a structure for controlling a carrier concentration on a surface of a polycrystalline semiconductor film on a film side, a polycrystalline semiconductor film is formed, and after removing a part of the surface, the polycrystalline semiconductor film is formed on the polycrystalline semiconductor film. Forming an insulating film, and
A control electrode is formed on this insulating film.

[0010]

In the past, as the cause of the deterioration of the element characteristics, it was considered that the deterioration of the crystallinity of the polycrystalline semiconductor film at the interface between the substrate and the polycrystalline semiconductor film was a major cause. In addition to this, it was found that the surface state of the polycrystalline semiconductor film on the side opposite to the substrate also greatly affects the device characteristics.

That is, as a result of TEM cross-section observation by the present inventors, it was found that the crystallinity of the surface of the polycrystalline semiconductor film was poor and the device characteristics were deteriorated. Therefore, based on the above findings, according to the present invention that the insulating film is formed on the polycrystalline semiconductor film after removing a part of the surface of the polycrystalline semiconductor film, an interface between the polycrystalline semiconductor film and the insulating film is obtained. The state can be improved and the device characteristics can be improved.

[0012]

Embodiments will be described below with reference to the drawings. FIG. 1 is a coplanar type T according to a first embodiment of the present invention.
It is process sectional drawing which shows the manufacturing method of FT.

[0013] First, as shown in FIG. 1 (a), to form an undercoat insulating film 2 made of SiO ₂ on the transparent insulating substrate 1 such as a glass substrate. Then S as a source gas
Mixed gas of iH ₄ and SiF ₄ , or SiH ₄ and Si
A plasma CVD method using a mixed gas of F ₄ and H ₂ forms an active layer on the undercord insulating film 2 at about 100.
A polycrystalline silicon film 3 having a thickness of nm is formed.

Here, before forming the polycrystalline silicon film 3,
Interface treatment with H ₂ plasma or SiF ₄ plasma may be performed. Plasma CVD of the polycrystalline silicon film 3
The film forming method by the method will be described in detail. For example, a parallel plate plasma CVD apparatus is used and the substrate temperature is set to 400.
Set to ℃, and use SiH ₄ and SiF ₄ and H ₂ as source gases
2 sccc for each source gas using a mixed gas of
m, 98 sccm, 50 sccm flow rate 1 Torr
The polycrystalline silicon film 3 is formed by introducing an RF power of 200 W and applying an RF power of 200 W to generate a discharge.

Next, as shown in FIG. 1B, after the polycrystalline silicon film 3 is patterned into an island shape, the polycrystalline silicon film is formed by H ₂ plasma (H ₂ radical) or SiF ₄ plasma (SiF ₄ radical). A part of the surface of 3 is removed by etching, and subsequently, a gate insulating film 4 made of SiO _{2 is} formed by, for example, a plasma CVD method by a vacuum consistent process.

The reason why the surface of the polycrystalline silicon film 3 is partially removed by etching is as follows. That is,
The present inventors have found that the deterioration of the crystallinity of the surface of the polycrystalline silicon film is one of the major factors that deteriorate the device characteristics.

Therefore, if the gate insulating film 4 is formed on the polycrystalline silicon film 3 after the defective crystallinity portion on the surface of the polycrystalline silicon film 3 is removed as in the present embodiment, the polycrystalline silicon film is formed. The state of the interface between the gate insulating film 3 and the gate insulating film 4 becomes good, and the device characteristics can be improved.

Furthermore, the polycrystalline silicon film 3 and the gate insulating film 4 are formed by a vacuum integrated process.
It contributes to the improvement of the interface state between the polycrystalline silicon film 3 and the gate insulating film 4.

A method for removing a part of the surface of the polycrystalline silicon film 3 by etching will be specifically described. For example, using a parallel plate plasma CVD apparatus, the substrate temperature is kept at room temperature and an etching gas is used. the H ₂ 100sc
cm, 1 Torr and 100W
By applying the RF power of
The surface of the polycrystalline silicon film 3 is partially removed by etching.

The amount of the polycrystalline silicon film 3 removed by etching is preferably about 10 nm. Next in FIG.
As shown in (c), a gate electrode 5 made of refractory metal such as Mo or Ta or doped polycrystalline silicon is formed. Then, a dopant such as P or B is implanted into the polycrystalline silicon film 3 by an ion doping method or the like using the gate electrode 5 as a mask, and thereafter, the dopant is activated by an excimer laser annealing method or the like to form the source / drain regions. 6 is formed.

Finally, as shown in FIG. 1D, an interlayer insulating film 7 made of, for example, SiO ₂ is formed on the entire surface, contact holes are formed on the source / drain regions 6, and then, for example, Al is used. A source / drain electrode 8 made of is formed to complete a coplanar TFT.

When the coplanar TFT manufactured by the above manufacturing method was evaluated, the ON / OFF ratio was 10 ⁵
As described above, good TFT characteristics with a field effect mobility of about 50 cm ² / V · sec were obtained.

As described above, according to the present embodiment, the gate insulating film 4 is formed after the surface of the polycrystalline silicon film 3 is partially removed by etching. Therefore, the polycrystalline silicon film 3 and the insulating film are formed. The interface state with 4 becomes favorable, and the device characteristics can be improved.

FIG. 2 is a process sectional view showing a method of manufacturing a forward stagger type TFT according to a second embodiment of the present invention. First, as shown in FIG. 2A, an undercoat insulating film 22 made of SiO ₂ is formed on a transparent insulating substrate 21 such as a glass substrate. Next, a refractory metal film such as Mo or Ta,
Alternatively, the source / drain electrodes 23 are formed of a laminated film of a doped polycrystalline silicon film and a refractory metal film.
After that, the polycrystalline silicon film 24 is formed on the entire surface by the same method as in the first embodiment.

Next, as shown in FIG. 2B, after the polycrystalline silicon film 24 is patterned into an island shape, the surface of the polycrystalline silicon film 23 is partially etched by the same method as in the first embodiment. Remove. Then, the gate insulating film 25 made of SiO ₂ is formed on the entire surface by, for example, the plasma CVD method by the vacuum consistent process.

Next, as shown in FIG. 2C, Mo and Ta
A gate electrode 26 made of a refractory metal such as the above or doped polycrystalline silicon is formed. Then the gate electrode 2
By the ion doping method using 6 as a mask,
For example, a dopant such as P or B is added to the polycrystalline silicon film 23.
Type in. Finally, the source / drain region 2 is activated by activating the above-mentioned dopant by an excimer laser annealing method or the like.
7 is formed to complete the forward stagger type TFT.

When the forward stagger type TFT manufactured by such a manufacturing method was evaluated, it was found that the TFT exhibited favorable TFT characteristics like the coplanar type TFT of the previous embodiment. The present invention is not limited to the above embodiment.

For example, although a polycrystalline silicon film is used as the polycrystalline semiconductor film in the above-described embodiments, it may be used as another polycrystalline semiconductor film such as an intrinsic semiconductor polycrystalline film such as silicon carbide or silicon germanium or a compound semiconductor. On the other hand, the present invention is effective.

Although the SiO ₂ film is used as an example of the insulating film, other insulating films such as a silicon nitride film and a metal anodic oxide film may be used. Further, although plasma etching has been described as an example of the method for etching the surface of the polycrystalline semiconductor film, other etching methods such as wet etching and etching with radical hydrogen using a mercury sensitization reaction may be used.

Although the TFT is taken as an example of the semiconductor device, it can be applied to a CCD or a DRAM. In short, a semiconductor device having a structure in which a control electrode is formed on a polycrystalline semiconductor film via an insulating film, and the control electrode controls the carrier density on the surface of the polycrystalline semiconductor film on the insulating film side good. In addition, within the scope of the present invention,
Various modifications can be implemented.

[0031]

As described above in detail, according to the present invention, the insulating film is formed on the polycrystalline silicon film after removing the surface portion of the polycrystalline silicon film, which is the portion having poor crystallinity. Therefore, the device characteristics can be improved.

[Brief description of drawings]

FIG. 1 is a coplanar type TFT according to a first embodiment of the present invention.
Process sectional drawing showing the manufacturing method of

FIG. 2 is a forward stagger type TFT according to a second embodiment of the present invention.
Process sectional drawing showing the manufacturing method of

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Translucent insulating substrate 2 ... Undercoat insulating film 3 ... Polycrystalline silicon film 4 ... Gate insulating film 5 ... Gate electrode (control electrode) 6 ... Source / drain region 7 ... Interlayer insulating film 8 ... Source / drain electrode 21 Translucent insulating substrate 22 Undercoat insulating film 23 Source / drain electrode 24 Polycrystalline silicon film 25 Gate insulating film (control electrode) 26 Gate electrode 27 Source / drain region

Claims (1)

[Claims] 1. A semiconductor device having a structure in which a control electrode is formed on a polycrystalline semiconductor film via an insulating film, and the control electrode controls the carrier concentration on the surface of the polycrystalline semiconductor film on the insulating film side. In the manufacturing method, the step of forming the polycrystalline semiconductor film, the step of forming the insulating film on the polycrystalline semiconductor film after removing a part of the surface of the polycrystalline silicon film, and the insulating film And a step of forming the control electrode thereon.