JP3346060B2 - Method for manufacturing thin film semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film semiconductor device used for a liquid crystal display or the like.

[0002]

2. Description of the Related Art Polycrystalline silicon thin film transistors (hereinafter referred to as "polysilicon TFTs") used in liquid crystal displays (LCDs) use a glass substrate having a large thermal expansion and contraction because the maximum process temperature is as high as 600 ° C. or higher. Therefore, an expensive quartz substrate had to be used. Since it is difficult to increase the area of the quartz substrate due to cost, the use of the TFT has been limited to a small panel such as a viewfinder or a projection display. Therefore, a mass separation ion implantation method suitable for processing a substrate having a small area has been adopted for introducing impurities for forming source / drain electrodes in a TFT manufacturing process.

FIG. 2 shows an example of a conventional method, "Japan
n Display '92 HIROSHIMA P
P565-568 "
The manufacturing process figure of T is shown. The manufacturing process of the polysilicon TFT will be described with reference to FIG. First, as shown in FIG. 2A, LPCVD (L
ow Pressure Chemical Vapo
r Deposit) or the like, and then the amorphous silicon is crystallized using an apparatus such as an excimer laser to form an active layer 2 of polysilicon. Process into islands separated from others. Next, as shown in FIG. 2B, silicon dioxide (Si) is deposited on the polysilicon active layer 2 by using an apparatus such as CVD.
A gate insulating film 3 made of O ₂ )
Then, a polysilicon film 4 serving as a gate electrode is deposited to a thickness of, for example, about 300 nm using an apparatus such as CVD, and then the polysilicon film 4 is processed into a predetermined shape.
Next, as shown in FIG. 2C, the polysilicon film 4 is used as a mask to perform 100 Ke by a mass separation ion implantation method.
After doping 6 about 2 × 10 ¹⁵ cm ⁻² of P ⁺ ions with energy of V to form source / drain electrodes 7,
A heat treatment for activating the impurities is performed. Next, a hydrogen plasma treatment for passivating a defect level in a MOS interface or an active layer is performed. Then, SiO ₂ to be a first interlayer insulating film is removed by, for example, 80
After forming a contact hole by depositing a film of about 0 nm, a laminated film of Al or Mo serving as a wiring metal is deposited and processed into a predetermined shape. Finally, about 1 nm of SiNx serving as a protective insulating film is formed by plasma CVD or the like. 2.0 μm deposited and polysilicon T
FT is completed.

[0004]

In recent years, with the development of thin film semiconductor manufacturing technology, the maximum process temperature in the process of manufacturing a polysilicon TFT has been reduced to 500 ° C. or less, and it has become possible to use glass for a substrate. The possibility of expanding the panel size has expanded. However, since the throughput of the mass separation ion implantation method conventionally used for forming source / drain electrodes is extremely low, there is a certain limit even if it is desired to increase the substrate area. Therefore, an amorphous separation ion implantation method suitable for processing a large area in a low-temperature process has been increasingly adopted. For example, "IEDM Tech
natural Digest '91 P555 ".

However, in the non-mass separation ion implantation method, since mass separation is not performed, ion species cannot be selectively introduced, and a plurality of ion species are introduced into a semiconductor. For example, for P ⁺ ion implantation,
When PH3 diluted with H2 is used as a doping gas, light ions such as hydrogen as a diluent gas are simultaneously introduced into a semiconductor, and these light ions having a long projection range pass through a gate electrode and a gate insulating film to form polysilicon. In some cases, such a problem may occur that the layer reaches the layer and damages the MOS interface or the like in the channel portion, thereby deteriorating the transistor characteristics. Specifically, poor characteristics such as a high threshold voltage, low mobility, and low sharpness of the rise of the sub-threshold may be obtained. In order to prevent the penetration of light ions, it is conceivable to increase the thickness of the gate electrode sufficiently. As a result, a reduction in the dielectric strength voltage between the gate electrode and the wiring layer thereover is caused, resulting in a reduction in the yield. This method is not a good solution because it may cause a new problem.

On the other hand, as a problem that occurs when the source / drain electrodes are formed by the mass separation ion implantation method, there is a channeling phenomenon in which impurity ions penetrate through the crystal grain boundaries of the gate electrode.
No. 62173 proposes a method of providing a metal oxide film made of the same metal on a gate electrode. In this case, the protective film of the metal oxide film provided on the gate electrode is 5
The film thickness is about 0 to 100 nm, which is sufficient as a countermeasure against the channeling phenomenon, but such a film thickness is insufficient to function as a stopper for light ions such as hydrogen.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a method of manufacturing a thin film semiconductor device with high yield without deterioration of transistor characteristics when performing non-mass separation ion implantation. And

[0008]

In order to achieve the above object, a method of manufacturing a thin film semiconductor device according to the present invention comprises the steps of forming a semiconductor layer in an island shape on an insulating substrate and forming a gate insulating film on the semiconductor layer. Forming a gate conductive film on the gate insulating film, forming a protective thin film on the gate conductive film, and processing the protective thin film and the gate conductive film into a shape of a gate electrode. Using a protective thin film processed into the shape of the gate electrode as a mask, implanting impurities into the semiconductor layer by a non-mass separation ion implantation method, and forming a source / drain region conductive layer in the semiconductor layer; Removing the protective thin film.

[0009]

According to the method of manufacturing a thin film semiconductor device of the present invention, as described above, the introduction of light ions such as hydrogen into the channel is completely prevented by forming the protective thin film on the conductive film for the gate. Therefore, channel damage due to light ions is suppressed, and deterioration of transistor characteristics is prevented.

Further, since only the protective thin film is selectively removed after the ion implantation, it is not necessary to increase the thickness of the thin film of the gate electrode itself, and the yield is not reduced.

[0011]

Embodiments of the present invention will be described below.
FIG. 1 is a manufacturing process diagram of a polysilicon TFT according to an embodiment of the present invention. As shown in FIG. 1A, first, amorphous silicon is deposited on a glass substrate 1 by using LPCVD, and then the amorphous silicon is crystallized by using an excimer laser device to form polysilicon. The active layer 2 is formed, and then the polysilicon active layer 2 is processed into an island shape using RIE or CDE. Subsequently, as shown in FIG. 1B, Si is formed on the active layer of polysilicon 2 by using CVD.
A gate insulating film 3 made of O ₂ is deposited to a thickness of 100 nm, a Ta film serving as a gate electrode 4 is deposited thereon to a thickness of 300 nm, and a Ti serving as a protective thin film 5 is deposited to a thickness of 500 nm. And the protective thin layer 5 is processed into a predetermined shape. At this time, the gate electrode 4 and the protective thin layer 5 can be simultaneously processed by using RIE or CDE using a mixed gas of a gas containing F such as CF4 or SF6 and oxygen.

Next, as shown in FIG. 1C, using the protective thin layer 5 as a mask, P ⁺ ions are implanted by non-mass separation ion implantation at an acceleration voltage of 100 KeV and an implantation amount of 1 ×.
Doping is performed at 10 ¹⁶ cm ^-2 to form source / drain electrodes 7. At this time, the thickness of the protective thin film Ti is 5
Is sufficiently thick, light ions such as H + implanted simultaneously with P ⁺ do not reach the channel region immediately below the gate electrode. Subsequently, as shown in FIG. 1D, the semiconductor is immersed in a mixed solution of ammonia and hydrogen peroxide heated to 40 to 80 ° C., and the Ti protective thin film 5 is peeled off. After that, a heat treatment for activating the impurities is performed, and then, a MOS
A hydrogen plasma treatment for passivating a defect level in an interface or an active layer is performed, and then, a 800 nm-thick SiO ₂ film serving as a first interlayer insulating film is deposited by plasma CVD to form a contact hole. A to be metal
After depositing a 1 or Mo laminated film, it is processed into a predetermined shape, and finally, a 1.0 μm-thick SiNx serving as a protective insulating film is deposited using plasma CVD or the like to complete a thin film semiconductor device.

In the above embodiment, the gate insulating film is made of Si
Although an example in which O ₂ is used, Ta is used as the gate electrode, and Ti is used as the protective thin film, Mo, Cr, W, or an Al alloy may be used as the protective thin film instead. When SiO ₂ is used for the gate insulating film and Cr is used for the gate electrode, M
o, Ti, Ta, W, Al alloy, SiNx or Si
May be used.

When SiO ₂ is used as the gate insulating film and Mo is used as the gate electrode, Ti or Cr may be used as the protective thin film. Further, SiO ₂ is used as a gate insulating film, and Ti is used as a gate electrode.
When Mo is used, Mo or Cr may be used as the protective thin film. However, when selecting a material for the protective thin film, the penetration depth of light ions differs depending on the material.
It is necessary to have an optimum film thickness for each material, and therefore, it is necessary to determine the type of solution to be used for peeling for each material.

As a method for depositing the protective thin film, any method such as a sputtering method and a vapor deposition method may be used.

[0016]

According to the present invention, the formation of the protective thin film on the conductive film for the gate completely prevents the introduction of light ions such as hydrogen into the channel. Even if the source / drain electrodes are formed by the non-mass separation ion implantation method with high density, damage to the channel due to light ions can be suppressed, so that a thin film semiconductor device can be manufactured without deterioration of transistor characteristics.

Further, since only the protective thin film can be selectively removed after ion implantation, it is not necessary to increase the thickness of the gate electrode itself, and the yield does not decrease. Therefore, a thin film semiconductor device can be manufactured with a high yield. can do.

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram of a polysilicon TFT according to an embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of a polysilicon TFT according to a conventional method.

[Explanation of symbols]

 Reference Signs List 1 substrate 2 polysilicon 3 gate insulating film 4 gate electrode 5 protective thin film 6 ion doping 7 source / drain electrode

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-5-109768 (JP, A) JP-A-4-306882 (JP, A) JP-A-4-186734 (JP, A) 370937 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/266

Claims (1)

(57) [Claims] 1. A forming a semiconductor layer on an insulating substrate in an island shape, forming a gate insulating film made of SiO ₂ on the said semiconductor layer, Ta on the gate insulating film, Cr,
A step of forming a gate conductive film made of Mo or Ti, and forming a gate conductive film on the gate conductive film;
When using a protective thin film of Ti, Mo, or W,
When Cr is used as the gate conductive film, Mo, Ti,
Protective thin film made of Ta, SiNx, Si, or W; Ti or Cr when Mo is used as the conductive film for the gate; and Mo or Cr when Ti is used as the conductive film for the gate. A step of forming a protective thin film, a step of processing the protective thin film and the conductive film for a gate into a shape of a gate electrode, and a non-mass separation ion implantation method using the protective thin film processed into a shape of a gate electrode as a mask. By implanting impurities into the semiconductor layer,
A method for manufacturing a thin-film semiconductor device, comprising: forming a conductive layer for source / drain regions in the semiconductor layer; and removing the protective thin film.