JPH07176611A - Preparation of wiring in semiconductor device - Google Patents

Abstract

PURPOSE: To improve the yield and reliability of a semiconductor device by preventing a conductive spacer used for a highly integrated semiconductor device from occurring. CONSTITUTION: A process for forming a non-metal conductive substance layer 24 on the surface of a lower insulation film 22 formed on a semiconductor substrate and a process for forming a wiring pattern by changing the non-metal conductive substance layer 24 to an oxide film 30 with insulation characteristics partially are included.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing wiring for a semiconductor device, and more particularly, it is possible to improve the yield and reliability of the semiconductor device by preventing the formation of conductive spacers in the highly integrated semiconductor device. The present invention relates to a wiring manufacturing method for a semiconductor device.

[0002]

2. Description of the Related Art Generally, a gate electrode of a semiconductor device and
The word line is formed of polysilicon which is easy to manufacture and etch, and the wiring using the polysilicon has an electric resistance higher than that of a metal wiring. Therefore, N-type impurities are implanted to reduce the electric resistance. Recently, the use of microcrystalline silicon, which has a lower resistance than that of polysilicon, has been studied. In addition, normal DRAM (Direct Rando
m Access Memory) Consider the wiring structure of the device.

First, an interlayer insulating film made of an oxide film and a bit line of metal wiring are arranged at regular intervals on a semiconductor substrate on which a field oxide film and a gate electrode made of silicon are formed for normal device isolation. The planarization layer and the word line made of polysilicon are sequentially formed on the bit line. The bit lines and word lines are arranged so as to be orthogonal to each other.

As described above, the gate and the word line made of silicon are not formed only on the flat film, but in the case of the gate, the field oxide film or the gate oxide film, which is an element isolation region, or Since it is formed on the boundary surface, or in the case of a word line, it is formed on the interlayer insulating film having a step, so that the step coverage of the polysilicon layer and the complete polysilicon layer at the step portion during etching are completed. The removal has a significant influence on the characteristics of the semiconductor device.

1A and 1B are cross-sectional views of a semiconductor device for explaining a conventional method for manufacturing a wiring of a semiconductor device step by step.
A case where wiring is formed on a lower insulating film having a large step is shown. Referring to FIG. 1A, there is shown a semiconductor device having a lower insulating film 12 formed on a semiconductor substrate (not shown) so as to have a step having a predetermined height. A polysilicon layer 14 is formed on the lower insulating layer 12 to have a uniform thickness. A photoresist pattern 16 is formed on the polysilicon 14 to expose the silicon layer 14 in the step portion.

The polysilicon layer 14 exposed by the photosensitive film pattern 16 is removed by an anisotropic dry etching method to form a wiring pattern made of polysilicon as shown in FIG. 1B.

However, the anisotropic etching method used to separate the polysilicon layer 14 causes the polysilicon spacer 18 to remain on the step surface portion (Profile) of the lower insulating film 12 due to its characteristics. In order to prevent the polysilicon spacer 18 from remaining, an isotropic wet etching method can be used instead of the anisotropic dry etching method. However, the isotropic wet etching method has a critical size (Critical Dimensio
Since n) changes remarkably, it has a problem that it cannot be used in a highly integrated semiconductor device, for example, a DRAM of 64M or more. Separately, the anisotropic dry etching method can form a highly integrated semiconductor device such as a DRAM of 64M or more by forming the same pattern as the photosensitive film pattern 16 without changing the critical size due to etching. Used in the process. For this reason, it is difficult to completely prevent the polysilicon spacer 18 from being generated by the conventional method for forming a wiring of a semiconductor device by using the anisotropic dry etching method.

[0008]

As described above, by forming a wiring pattern using the anisotropic dry etching method, a polysilicon spacer is formed on the step surface portion,
The semiconductor device has a problem in that a short circuit between wirings frequently occurs due to a reduction in a distance between wirings due to continuous high integration.

Further, the polysilicon spacer is gradually formed to have a larger step due to the higher integration of the semiconductor device. As the size of the polysilicon spacer becomes large, the semiconductor device has a problem that the defective rate increases greatly due to frequent short circuits between wirings.

Therefore, an object of the present invention is to provide a method for manufacturing a wiring of a semiconductor device, which can prevent the generation of conductive spacers in a highly integrated semiconductor device and improve the yield and reliability of the semiconductor device. It is in.

[0011]

In order to achieve the above-mentioned object, a method of manufacturing a wiring of a semiconductor device according to the present invention comprises a step of forming a non-metal conductive material layer on the surface of a lower insulating film formed on a semiconductor substrate. And a step of partially changing the non-metallic conductive material layer to an insulating material having insulating properties to form a wiring pattern.

[0012]

With the above structure, the method for manufacturing a wiring of a semiconductor device according to the present invention prevents the formation of conductive spacers by changing the non-metal conductive material layer formed in the step portion of the lower insulating film into an insulating material. Provide the benefits that can be. Further, the method for manufacturing a wiring of a semiconductor device according to the present invention,
It is possible to prevent a short circuit phenomenon between wirings due to the conductive spacers, improve the yield of the semiconductor device, and provide the advantage of improving the reliability of the semiconductor device.

[0013]

2A and 2B are sectional views of a semiconductor device for explaining step by step a method of manufacturing a wiring of a semiconductor device according to an embodiment of the present invention. Referring to FIG. 2A, there is shown a semiconductor device including a lower insulating film 22 formed to have a step having a predetermined height. The lower insulating layer 22 may be an oxide layer, a nitride layer, or BPSG (boro phosp) having insulating properties.
ho silicate glass) or the like. Although not shown in the figure below the lower insulating film 22, a predetermined structure,
That is, there exists a semiconductor substrate on which a gate, a source, a drain, a bit line and the like of the MOS field effect transistor structure are formed.

A non-metal conductive material layer 24 made of polysilicon or microcrystalline silicon is formed on the entire surface of the lower insulating layer 22 by chemical vapor deposition.
ition) method. A photosensitive film pattern 26 for a wiring pattern is formed on the non-metal conductive material layer 24. The photoresist pattern 26 is formed on the lower insulating layer 22.
Exposing the non-metal conductive material layer 24 formed on the stepped portion of the non-metal conductive material layer 24, and exposing the non-metal conductive material layer 24 located in a region other than the region used for wiring in the non-metal conductive material layer 24. . Also, oxygen ions are implanted into the non-metal conductive material layer 24 exposed by the photosensitive film pattern 26. At this time, a sufficient amount of oxygen is injected into the non-metal conductive material 24 exposed by the photosensitive film pattern 26 to oxidize the entire exposed non-metal conductive material layer 24. Further, the oxygen ions are evenly injected into all exposed non-metal conductive material layers 24 starting from the non-metal conductive material layer 24 formed in the step portion.

After the oxygen ion implantation process, the photoresist pattern 26 is removed as shown in FIG. 2B. Further, the non-metal conductive material layer 24 into which the oxygen ions are implanted is heat-treated by a thermal diffusion furnace or a rapid thermal processing apparatus containing an inert gas such as argon or nitrogen to change into an oxide film 30 having insulating properties. The oxide layer 30 may be used for a structure of a semiconductor device or may be removed to expose the lower insulating layer 22 for performing a subsequent process.

[0016]

As described above, in the method for manufacturing a wiring of a semiconductor device according to the present invention, the conductive spacer is generated by changing the non-metal conductive material layer formed in the stepped portion of the lower insulating film into an insulating material. It provides advantages that can be prevented. Due to the above advantages, the method for manufacturing a wiring of a semiconductor device according to the present invention can prevent a short circuit between wirings due to a conductive spacer, improve the yield of the semiconductor device, and improve the reliability of the semiconductor device. Provide the benefits that you can.

[Brief description of drawings]

FIG. 1A is a cross-sectional view of a semiconductor device for explaining a conventional method of manufacturing a silicon wiring of a semiconductor device step by step. FIG. 1B is a cross-sectional view of a semiconductor device for explaining a conventional method for manufacturing a silicon wiring of a semiconductor device step by step.

FIG. 2A is a cross-sectional view of a semiconductor device for explaining a method of manufacturing a silicon wiring of a semiconductor device according to the present invention step by step. FIG. 2B is a cross-sectional view of a semiconductor device for explaining a method of manufacturing a silicon wiring of a semiconductor device according to the present invention in stages.

[Explanation of symbols]

 22 Lower insulating film 24 Non-metal conductive material layer 26 Photosensitive film pattern 30 Oxide film

Claims (14)

[Claims] 1. A step of forming a non-metal conductive material layer on a surface of a lower insulating film formed on a semiconductor substrate, the non-metal conductive material layer being partially changed to an insulating material having insulating properties, and a wiring pattern. And a step of forming a wiring, the method for manufacturing a wiring of a semiconductor device. 2. The method of manufacturing a wiring of a semiconductor device according to claim 1, wherein the non-metal conductive material layer is formed of polysilicon. 3. The step of changing to the insulating material comprises the steps of forming a photosensitive film pattern for a wiring pattern on the polysilicon layer, and implanting oxygen ions into the polysilicon layer exposed by the photosensitive film pattern. And removing the photoresist pattern, and heat treating the polysilicon layer so that the portion of the polysilicon layer into which the oxygen ions are implanted is changed to an insulating material. Item 3. A method for manufacturing a wiring of a semiconductor device according to item 2. 4. The method for manufacturing a wiring of a semiconductor device according to claim 3, wherein the heat treatment step is performed by a heat treatment apparatus containing an inert gas. 5. The wiring manufacturing method for a semiconductor device according to claim 4, wherein the inert gas is argon gas. 6. The wiring manufacturing method according to claim 3, wherein the heat treatment step is performed by a heat treatment apparatus containing nitrogen gas. 7. The non-metallic conductive material layer is formed of microcrystalline silicon.
A method for manufacturing a wiring of a semiconductor device as described above. 8. A step of forming a non-metal conductive material on a surface of a lower insulating film formed to have a step on a semiconductor substrate, and forming a wiring photosensitive film pattern on the non-metal conductive material layer, Exposing a non-wiring pattern region including the non-metal conductive material layer formed in a step portion of the lower insulating film; and implanting oxygen ions into the non-metal conductive material layer exposed by the photosensitive film pattern. A heat treatment of the non-metal conductive material layer so that the portion of the non-metal conductive material layer into which the oxygen ions are implanted changes into an insulating material pattern. A method for manufacturing a wiring of a semiconductor device, comprising: 9. The non-metal conductive material layer is formed of microcrystalline silicon.
A method for manufacturing a wiring of a semiconductor device as described above. 10. The method for manufacturing a wiring of a semiconductor device according to claim 8, wherein the heat treatment step proceeds in an inert atmosphere. 11. The method of manufacturing a wiring of a semiconductor device according to claim 8, wherein the heat treatment step uses a high-speed heat treatment apparatus. 12. The method of manufacturing a wiring of a semiconductor device according to claim 8, wherein the insulating material pattern is an oxide film. 13. The method of manufacturing a wiring of a semiconductor device according to claim 8, further comprising a step of removing the insulating material pattern generated by the heat treatment step. 14. The method of manufacturing a wiring of a semiconductor device according to claim 8, wherein the heat treatment step is performed in a nitrogen atmosphere.