JPH07169904A - Surface-mount type semiconductor package with circuit components - Google Patents

Surface-mount type semiconductor package with circuit components

Info

Publication number
JPH07169904A
JPH07169904A JP31236193A JP31236193A JPH07169904A JP H07169904 A JPH07169904 A JP H07169904A JP 31236193 A JP31236193 A JP 31236193A JP 31236193 A JP31236193 A JP 31236193A JP H07169904 A JPH07169904 A JP H07169904A
Authority
JP
Japan
Prior art keywords
circuit
semiconductor package
mount type
circuit component
surface mount
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31236193A
Other languages
Japanese (ja)
Inventor
Kazunari Ito
一成 伊藤
Matsuhiko Takatani
松彦 高谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Facom Corp
Original Assignee
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Facom Corp filed Critical Fuji Facom Corp
Priority to JP31236193A priority Critical patent/JPH07169904A/en
Publication of JPH07169904A publication Critical patent/JPH07169904A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To enhance packaging density and workability required when ICs and circuit components are surface-mounted to a printed wiring board. CONSTITUTION:IC lead wires 2 are bent upwardly where circuit component units 3 are soldered with electrodes 5X on the top of each component unit on the bottom of a row of base units 2a of the lead wires 2. The circuit components 3 are formed by integrating circuit components 4A to 4F in the shape of a column. Each circuit component forms the shapes of a conductor, a resistor or a capacitor. The circuit component units 3 are soldered with a wiring pattern 7 of a printed wiring board 6 with an electrode 5Y on the lower side. It is, therefore, possible to connect the lead wires of the IC to the conductor, the resistor or the components of the capacitor in series.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、プリント配線板に表
面実装形半導体パッケージを、抵抗やコンデンサなどの
表面実装形回路部品とともに実装するとき、実装密度の
向上と作業性の向上とが図れる回路部品付き表面実装形
半導体パッケージに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit capable of improving mounting density and workability when mounting a surface mount type semiconductor package on a printed wiring board together with surface mount type circuit components such as resistors and capacitors. The present invention relates to a surface mount type semiconductor package with components.

【0002】[0002]

【従来の技術】従来例について、その側面図の図7を参
照しながら説明する。図において、プリント配線板6
に、半導体パッケージとしての半導体集積回路( 以下、
ICという)1、および、関連する回路部品( チップ部
品)14 が、2次元配置され表面実装される。IC1 は、
そのリード2 のベース部2aで配線パターン4 にハンダ付
けされ、この同じ配線パターン4 に回路部品14が直接ハ
ンダ付けされる。なお回路部品14は、抵抗やコンデン
サ, 導体などの形をとりうる。
2. Description of the Related Art A conventional example will be described with reference to a side view of FIG. In the figure, printed wiring board 6
A semiconductor integrated circuit as a semiconductor package (hereinafter,
An IC 1) and related circuit parts (chip parts) 14 are two-dimensionally arranged and surface-mounted. IC1 is
The base portion 2a of the lead 2 is soldered to the wiring pattern 4, and the circuit component 14 is directly soldered to the same wiring pattern 4. The circuit component 14 can take the form of a resistor, a capacitor, a conductor, or the like.

【0003】[0003]

【発明が解決しようとする課題】プリント配線板の実装
密度を高めるために、一方では回路部品の小形化が進め
られるが、個々の回路部品自体と、各回路部品間の配線
パターンとが占有する2次元的な面積を無くすることは
できない。とくに回路部品は、一般に抵抗やコンデンサ
などの形で多用されるから、その全占有面積は相当なも
のになり、実装密度向上の大きい阻害要因となる。しか
も、回路部品の小形化は、実装作業を困難にして生産性
の向上を阻害するだけでなく、品質面で不具合を発生し
やすいという問題がある。
On the other hand, in order to increase the mounting density of a printed wiring board, miniaturization of circuit components is promoted on the one hand, but each circuit component itself and the wiring pattern between each circuit component occupy it. It is not possible to eliminate the two-dimensional area. In particular, since circuit components are generally used in the form of resistors and capacitors, the total area occupied by them is considerable, which is a major impediment to improvement in packaging density. Moreover, miniaturization of circuit components not only makes mounting work difficult and hinders improvement in productivity, but also causes problems in terms of quality.

【0004】この発明が解決しようとする課題は、従来
の技術がもつ以上の問題点を解消して、実装密度の向上
と作業性の向上とが図れる回路部品付き表面実装形半導
体パッケージを提供することにある。
The problem to be solved by the present invention is to solve the above problems of the prior art and provide a surface mount type semiconductor package with circuit parts which can improve the mounting density and workability. Especially.

【0005】[0005]

【課題を解決するための手段】請求項1に係る回路部品
付き表面実装形半導体パッケージは、リード・ベース部
の片面に、両端に各電極をもつ表面実装形回路部品が、
その一方の電極を介して導通固着される。請求項2に係
る回路部品付き表面実装形半導体パッケージは、並設さ
れたリード・ベース部の片面に、このリード・ベース部
に対応し両端に各電極をもつ表面実装形回路部品が一体
構成されてなる回路部品ユニットが、その一方の電極を
介して導通固着される。
According to another aspect of the present invention, there is provided a surface mount type semiconductor package having circuit parts, wherein a surface mount type circuit part having electrodes on both ends is provided on one surface of a lead base portion.
Conductivity is fixed through one of the electrodes. In the surface mount type semiconductor package with circuit parts according to a second aspect of the present invention, a surface mount type circuit part having electrodes on both ends corresponding to the lead base part is integrally formed on one surface of the lead base part arranged in parallel. The circuit component unit formed by the above is electrically conductively fixed via one of the electrodes.

【0006】請求項3に係る回路部品付き表面実装形半
導体パッケージは、請求項2に記載の半導体パッケージ
において、各側面に対応する回路部品ユニットが、共通
な環状枠によって一体的に連結,保持される。
A surface mount type semiconductor package with circuit parts according to a third aspect is the semiconductor package according to the second aspect, wherein the circuit part units corresponding to the respective side surfaces are integrally connected and held by a common annular frame. It

【0007】[0007]

【作用】請求項1に係る回路部品付き表面実装形半導体
パッケージでは、表面実装形部品が導通固着されるのが
半導体パッケージのリード・ベース部の表面か裏面かの
違い、回路部品の種類(導体,抵抗,コンデンサな
ど)、および回路部品のプリント配線板の配線パターン
との接続関係によって、半導体パッケージおよび回路部
品を、プリント配線板に対して種々な回路形式で実装す
ることができる。
In the surface mount type semiconductor package with circuit parts according to the first aspect, it is different whether the surface mount type part is conductively fixed to the front surface or the back surface of the semiconductor package. , Resistors, capacitors, etc.), and the connection relationship between the circuit component and the wiring pattern of the printed wiring board, the semiconductor package and the circuit component can be mounted on the printed wiring board in various circuit formats.

【0008】請求項2または3に係る回路部品付き表面
実装形半導体パッケージでは、表面実装ユニットが導通
固着されるのが半導体パッケージのリード・ベース部の
表面か裏面かの違い、各回路部品の種類(導体,抵抗,
コンデンサなど)、および各回路部品のプリント配線板
の配線パターンとの接続関係によって、半導体パッケー
ジおよび回路部品を、プリント配線板に対して種々な回
路形式で実装することができる。
In the surface mount type semiconductor package with circuit parts according to the second or third aspect, it is different whether the surface mount unit is conductively fixed to the front surface or the back surface of the lead base portion of the semiconductor package, and the type of each circuit part. (Conductor, resistance,
The semiconductor package and the circuit component can be mounted on the printed wiring board in various circuit formats depending on the connection relationship between the capacitor) and the wiring pattern of the printed wiring board of each circuit component.

【0009】とくに請求項3に係る回路部品付き表面実
装形半導体パッケージでは、半導体パッケージの各側面
に対応する表面実装ユニットが、共通な環状枠によって
一体的に連結,保持される。
Particularly, in the surface mount type semiconductor package with circuit parts according to the third aspect, the surface mount units corresponding to the respective side surfaces of the semiconductor package are integrally connected and held by a common annular frame.

【0010】[0010]

【実施例】この発明に係る回路部品付き表面実装形半導
体パッケージの実施例について、以下に図を参照しなが
ら説明する。図1は第1実施例の平面図、図2は同じく
その側面図、図3は第1実施例における回路部品ユニッ
トの斜視図である。図1,図2において、IC1 のリー
ド2は上側に折り曲げられ、そのリード2 のベース部2a
の列の下面に回路部品ユニット3 が、各々の上面の電極
5Xでハンダ付けされる。この回路部品ユニット3 は、図
3 に示すように回路部品4A,4B,4C,4D,4E,4Fが列状に一
体化されたものである。この各回路部品は、全体の回路
構成に応じて導体であったり、抵抗であったり、コンデ
ンサであったりする。各回路部品の上面に前記の電極5X
が、図示してない下面に電極5Yがそれぞれ設けられる。
回路部品ユニット3 は、その各電極5Yで、プリント配線
板6 の配線パターン7 にハンダ付けされる。したがっ
て、IC1 のリードと、導体、抵抗またはコンデンサの
回路部品とを直列接続の形にすることができる。たとえ
ば、リードが電源ピンであれば、回路部品を導体にして
電源パターンに接続することになる。また、リードを信
号線に接続するときには、回路部品を抵抗にすれば、直
列ダンピング抵抗を挿入したことになる。ところで回路
部品は、第1実施例のように列状の回路部品ユニットの
形をとらず、単体の場合であっても、規模は小さいなが
ら実質的な実装密度の向上に役立つ。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a surface mount type semiconductor package with circuit parts according to the present invention will be described below with reference to the drawings. 1 is a plan view of the first embodiment, FIG. 2 is a side view of the same, and FIG. 3 is a perspective view of a circuit component unit in the first embodiment. 1 and 2, the lead 2 of the IC1 is bent upward and the base portion 2a of the lead 2 is bent.
The circuit component unit 3 is installed on the bottom surface of the
Soldered with 5X. This circuit component unit 3 is
As shown in 3, the circuit components 4A, 4B, 4C, 4D, 4E, 4F are integrated in a row. Each of these circuit components may be a conductor, a resistor, or a capacitor depending on the overall circuit configuration. The above electrode 5X on the upper surface of each circuit component
However, the electrodes 5Y are respectively provided on the lower surface (not shown).
The circuit component unit 3 is soldered to the wiring pattern 7 of the printed wiring board 6 with the respective electrodes 5Y. Therefore, the lead of IC1 and the circuit component such as the conductor, the resistor or the capacitor can be connected in series. For example, if the lead is a power pin, the circuit component will be a conductor and connected to the power pattern. Further, when connecting the leads to the signal lines, if the circuit components are resistors, a series damping resistor is inserted. By the way, the circuit component does not take the form of the circuit component unit arranged in a row as in the first embodiment, and even in the case of a single unit, the size is small, but it is useful for substantially improving the packaging density.

【0011】図4は第2実施例の平面図、図5は同じく
その側面図である。図4,図5において、IC1 のリー
ド2は下側に折り曲げられ、そのリード2 のベース部2a
の列の上面に回路部品ユニット3 がその下側の電極でハ
ンダ付けされ、ベース2aは下面で符号を付けてない配線
パターンとハンダ付けされる。回路部品ユニット3 の上
側の電極と、プリント配線板6の電極パターン8とが、
ジャンパ線9によって接続される。したがって、IC1
のリードと、導体、抵抗またはコンデンサの回路部品と
を並列接続の形にすることができる。たとえば、回路部
品を抵抗にすれば、信号線に対して負荷抵抗または終端
抵抗にすることができ、コンデンサにすれば、負荷容量
にすることができ、ダイオードにしたときには、ダイオ
ード終端によるノイズ低減が図れる。また、IC1 の電
源ピンに対応させ、回路部品をデカップリング・コンデ
ンサにすれば、短い配線で電源ノイズを低減させること
が可能になる。
FIG. 4 is a plan view of the second embodiment, and FIG. 5 is a side view of the same. 4 and 5, the lead 2 of the IC1 is bent downward and the base portion 2a of the lead 2 is bent.
The circuit component unit 3 is soldered to the upper surface of the row of the above with the electrode on the lower side thereof, and the base 2a is soldered to the wiring pattern not marked at the lower surface. The upper electrode of the circuit component unit 3 and the electrode pattern 8 of the printed wiring board 6 are
Connected by jumper wires 9. Therefore, IC1
Can be connected in parallel with a conductor, resistor or capacitor circuit component. For example, if a circuit component is a resistor, it can be used as a load resistor or a terminating resistor for the signal line, and if it is a capacitor, it can be used as a load capacitance. Can be achieved. If the circuit components are decoupling capacitors corresponding to the power pins of IC1, it is possible to reduce power noise with short wiring.

【0012】図6は第3実施例の平面図である。第3実
施例は、先の第2実施例の変形例である。IC11は四辺
全ての側面にリードをもち、上辺, 下辺の各リード列に
は、6個の回路部品からなる回路部品ユニット3 が、右
辺, 左辺の各リード列には、4個の回路部品からなる回
路部品ユニット13がそれぞれハンダ付けされる。ここ
で、相対する一対の各回路部品ユニット3,13は、矩形環
状の枠10によって一体的に保持,連結される。したがっ
て、ハンダ付けその他で作業性の向上が図れる。
FIG. 6 is a plan view of the third embodiment. The third embodiment is a modification of the above second embodiment. The IC 11 has leads on all four sides, and the upper and lower lead rows each have a circuit component unit 3 consisting of six circuit components, and the right and left lead rows each have four circuit components. The respective circuit component units 13 are soldered. Here, the pair of circuit component units 3 and 13 facing each other are integrally held and connected by the rectangular annular frame 10. Therefore, workability can be improved by soldering or the like.

【0013】[0013]

【発明の効果】請求項1に係る回路部品付き表面実装形
半導体パッケージでは、表面実装形部品が導通固着され
るのが半導体パッケージのリード・ベース部の表面か裏
面かの違い、回路部品の種類(導体,抵抗,コンデンサ
など)、および回路部品のプリント配線板の配線パター
ンとの接続関係によって、半導体パッケージおよび回路
部品を、プリント配線板に対して種々な回路形式で実装
することができる。したがって、規模は小さいながら、
表面実装形回路部品の小形化をすることなく実質的な実
装密度の向上が図れる。
In the surface mount type semiconductor package with circuit parts according to the first aspect of the present invention, it is determined whether the surface mount type part is conductively fixed to the surface or the back surface of the lead / base portion of the semiconductor package. The semiconductor package and the circuit component can be mounted on the printed wiring board in various circuit formats depending on (conductors, resistors, capacitors, etc.) and the connection relationship between the circuit component and the wiring pattern of the printed wiring board. Therefore, although small in scale,
It is possible to substantially improve the mounting density without downsizing the surface mount type circuit component.

【0014】請求項2または3に係る回路部品付き表面
実装形半導体パッケージでは、表面実装ユニットが導通
固着されるのが半導体パッケージのリード・ベース部の
表面か裏面かの違い、各回路部品の種類(導体,抵抗,
コンデンサなど)、および各回路部品のプリント配線板
の配線パターンとの接続関係によって、半導体パッケー
ジおよび回路部品を、プリント配線板に対して種々な回
路形式で実装することができる。したがって、表面実装
形回路部品の小形化をすることなく実質的な実装密度の
向上が図れる。
In the surface mount type semiconductor package with circuit parts according to the second or third aspect, it is different whether the surface mount unit is conductively fixed to the front surface or the back surface of the lead base portion of the semiconductor package, and the type of each circuit part. (Conductor, resistance,
The semiconductor package and the circuit component can be mounted on the printed wiring board in various circuit formats depending on the connection relationship between the capacitor) and the wiring pattern of the printed wiring board of each circuit component. Therefore, it is possible to substantially improve the mounting density without downsizing the surface mount type circuit component.

【0015】とくに請求項3に係る回路部品付き表面実
装形半導体パッケージでは、半導体パッケージの各側面
に対応する表面実装ユニットが、共通な環状枠によって
一体的に連結,保持されるから、作業性の向上が図れ
る。
Particularly, in the surface mount type semiconductor package with circuit parts according to the third aspect, the surface mount units corresponding to the respective side surfaces of the semiconductor package are integrally connected and held by a common annular frame. Can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】発明に係る第1実施例の平面図FIG. 1 is a plan view of a first embodiment according to the invention.

【図2】同じくその側面図FIG. 2 is a side view of the same.

【図3】第1実施例における回路部品ユニットの斜視図FIG. 3 is a perspective view of a circuit component unit according to the first embodiment.

【図4】第2実施例の平面図FIG. 4 is a plan view of the second embodiment.

【図5】同じくその側面図FIG. 5 is a side view of the same.

【図6】第3実施例の平面図FIG. 6 is a plan view of the third embodiment.

【図7】従来例の側面図FIG. 7 is a side view of a conventional example.

【符号の説明】[Explanation of symbols]

1 IC 2 リード 2a ベース部 3 回路部品ユニット 4A〜4F 回路部品 5X,5Y 電極 6 プリント配線板 7 配線パターン 8 電源パターン 9 ジャンパ線 10 枠 11 IC 13 回路部品ユニット 1 IC 2 Lead 2a Base Part 3 Circuit Parts Unit 4A to 4F Circuit Parts 5X, 5Y Electrodes 6 Printed Wiring Board 7 Wiring Pattern 8 Power Supply Pattern 9 Jumper Wire 10 Frame 11 IC 13 Circuit Parts Unit

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】リード・ベース部の片面に、両端に各電極
をもつ表面実装形回路部品が、その一方の電極を介して
導通固着されてなることを特徴とする回路部品付き表面
実装形半導体パッケージ。
1. A surface mount type semiconductor with circuit parts, characterized in that a surface mount type circuit part having electrodes at both ends is electrically connected and fixed to one surface of a lead base part through one of the electrodes. package.
【請求項2】並設されたリード・ベース部の片面に、こ
のリード・ベース部に対応し両端に各電極をもつ表面実
装形回路部品が一体構成されてなる回路部品ユニット
が、その一方の電極を介して導通固着されてなることを
特徴とする回路部品付き表面実装形半導体パッケージ。
2. A circuit component unit in which surface mount type circuit components corresponding to the lead base portion and having electrodes on both ends corresponding to the lead base portion are integrally formed on one surface of the lead base portion arranged in parallel. A surface-mount type semiconductor package with a circuit component, which is electrically conductively fixed via electrodes.
【請求項3】請求項2に記載の半導体パッケージにおい
て、各側面に対応する回路部品ユニットが、共通な環状
枠によって一体的に連結,保持されてなることを特徴と
する回路部品付き表面実装形半導体パッケージ。
3. The semiconductor package according to claim 2, wherein the circuit component units corresponding to the respective side surfaces are integrally connected and held by a common annular frame, and are mounted on a surface. Semiconductor package.
JP31236193A 1993-12-14 1993-12-14 Surface-mount type semiconductor package with circuit components Pending JPH07169904A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31236193A JPH07169904A (en) 1993-12-14 1993-12-14 Surface-mount type semiconductor package with circuit components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31236193A JPH07169904A (en) 1993-12-14 1993-12-14 Surface-mount type semiconductor package with circuit components

Publications (1)

Publication Number Publication Date
JPH07169904A true JPH07169904A (en) 1995-07-04

Family

ID=18028331

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31236193A Pending JPH07169904A (en) 1993-12-14 1993-12-14 Surface-mount type semiconductor package with circuit components

Country Status (1)

Country Link
JP (1) JPH07169904A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239981B1 (en) 1998-09-02 2001-05-29 Mitsubishi Denki Kabushiki Kaisha Packaging substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239981B1 (en) 1998-09-02 2001-05-29 Mitsubishi Denki Kabushiki Kaisha Packaging substrate

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