JPH07161901A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a plated layer in the top surface of a lead part which makes a cut surface with respect to a connection part when the whole of a lead frame is plated. CONSTITUTION:A recessed part 4 is formed in the top of an external lead 1 extending from a package part P, and after that, the whole of a lead frame L is plated to uniformly form a plated layer 6 in the Whole of an exposed part to the package part P. After that, a place in which the recessed part 4 is formed in the top of the external lead part 1, is cut off and at the same time, each external lead 1 is bent to form a lead part. Since the uniform plated layer 6 is formed in the upper and the lower and the left and the right peripheral surface of each lead part and also in the corresponding place to the inner surface of the recessed part 4 in the top surface, solder-bonding quality is ensured in both lower surface part of the top and the top surface of the lead part, so that reliability of bonding with respect to a wiring base board may be made extremely high.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device of a type in which a chip is mounted on a lead frame, and more specifically, it is suitable for forming a plating layer on the tip surfaces of a large number of leads exposed from the package. The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art Generally, in a semiconductor device of a type in which a chip is mounted on a lead frame, a lead frame is made of a nickel-based alloy, a copper-based alloy or the like, and it is necessary to have corrosion resistance. Since it is necessary to secure the adhesiveness to the wiring board through the cream solder, after packaging the chip mounted on the lead frame to form the package part, the entire lead frame and package part are exposed to the plating solution. The plating layer is formed on the external leads exposed from the package by immersion.

Further, in the lead frame, as shown in FIG. 1, the tip ends of the adjacent external leads are connected by a connecting portion so that a plating layer is uniformly formed on the surfaces of a large number of external leads extending from the package portion. It has been conducted,
After the plating process, each external lead is separated from the connecting portion, and then each external lead is bent into an L shape, a J shape or the like to form a lead portion as an external terminal.

[0004]

However, according to the above-mentioned conventional manufacturing method, since the lead portion is formed by separating the tip end side of the external lead from the connecting portion after plating the external lead, the external lead is formed. It is not possible to form a plating layer on the tip surface of the lead portion, which is the cut surface. Therefore, as shown in FIG. 10, when the lead portion 100 is bonded to the wiring substrate 300 via the cream solder 200, only the lower surface side 101 of the lead portion tip portion is joined, and the width dimension of the tip portion is extremely large. Minute (normal 100-pin type, about 0.25 mm)
And the fact that it is inclined at a predetermined angle, there is a risk that the joining may become uncertain. Such a problem becomes more prominent with the increase in the number of pins due to the demand for high performance and miniaturization of semiconductor devices in recent years.

The present invention has been made in view of the above-mentioned conventional circumstances, and an object thereof is to connect a lead frame and a package portion to a connecting portion when the plating treatment is performed by immersing the entire lead frame and package portion in a plating solution. It is an object of the present invention to provide a novel manufacturing method capable of forming a plating layer also on the tip surface of a lead portion which is a cut surface.

[0006]

In order to achieve the above-mentioned object, a method of manufacturing a semiconductor device according to the present invention comprises a method of packaging a chip mounted on a lead frame to form a package part, and then forming the package part. By forming recesses at the tip of each of the external leads extending from the lead frame and then plating the entire lead frame and package part, a uniform plating layer is formed on the entire exposed part of the lead frame package part. Then, the outer lead is formed by bending the outer leads, and the lead portions are formed by bending the outer leads.

[0007]

According to the above-mentioned means, the lead portion is formed by cutting off the portion where the concave portion is formed in the tip portion of each external lead, so that the inner surface of the concave portion and the cut surface thereof correspond to the tip surface of the lead portion. However, since the entire exposed portion of the lead frame from the package portion is plated prior to the separation, the portion where the recess cutting surface in the lead end surface is left, that is, the portion corresponding to the inner surface of the recess in the lead end surface. A plating layer is formed on the substrate, and the adhesiveness of the lead end surface to the wiring board is secured via the cream solder.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the manufacturing method according to the present invention will be described below with reference to FIGS. In the figure, L is, for example, Cu, 42
1 shows a long lead frame having an ultrathin metal plate such as an alloy (iron-Ni alloy) as a base material, and the lead frame L is
By using an appropriate means such as a press, a chip mounting pad (not shown) and a large number of external leads 1 arranged around the pad are formed, and the tips of the external leads 1 are connected to each other by a connecting portion 2.
It has a well-known structure in which unit frame portions L'which are electrically connected to each other are formed at regular intervals. Each unit frame portion L'is mounted with a chip on a chip mounting pad and packaged by resin molding (sealing molding). ) Package part P
Are formed.

A large number of external leads 1 which are electrically connected to the chip electrodes are exposed at the peripheral edge of the package portion P, and the tip portions of the external leads 1 are connected to the connecting portion 2 as described above, and each of them is connected. The vicinity of the proximal ends of the external leads 1 are connected by a dam bar 3. In addition, a gap is formed between each external lead 1, and a portion (between the dam bar 3 and the package portion P in each gap) is filled with resin (residual resin at the time of packaging).

From this state, prior to the step of plating the entire portion of the lead frame L exposed from the package portion P, the recesses 4 are formed in the respective tip portions of the external leads 1 extending from the package portion P in large numbers. In this step, for example, as shown in FIG. 2, the lead frame L is fixed at a predetermined position on the upper surface of the die 10 having a bite hole 11 having a width dimension slightly smaller than the recess 4 below the formation position of the recess 4. Then
In that state, the punch 12 having a slightly larger width than the bite hole 11 is lowered, and the lower limit of the punch 12 is located at a position before punching out the outer lead 1, specifically,
The depth d of the recess 4 is at least ½ of the thickness t of the outer lead 1 (that is, the plate thickness of the lead frame L), and is about 2/3 in this embodiment.

As a result, as shown in FIG. 3, a concave portion 4 having an appropriate depth, that is, a depth d which is about 2/3 of the plate thickness t of the lead frame L in this embodiment, is formed at the tip portion of the external lead 1. At the same time, a convex portion 5 is formed on the lower surface side of the tip portion so as to protrude by the amount of the concave portion. The concave portion 4 and the convex portion 5 may be formed for each external lead 1, but a frame-shaped bite hole 11 and a punch surrounding the package portion P may be formed.
If 12 is used, the concave portions 4 and the convex portions 5 can be simultaneously formed on all the external leads 1, 1 ... In each unit frame portion L ′.

The lead frame L in which the concave portions 4 and the convex portions 5 are formed on the outer leads 1 of all the unit frame portions L'is subjected to the plating treatment so as to form the plated layer 6 on the entire portion exposed from the package portion P. The plating process is a well-known plating process, that is, a rack system in which a cathode is applied to the lead frame L and is immersed in a plating solution in a plating tank in which an anode plate is installed, or a lead frame L to which a cathode is applied. A sparger method or the like in which a plating solution is sprayed on is used to uniformly form a plating layer 6 having a predetermined thickness on the entire portion exposed from the package portion P (see FIG. 5).

Incidentally, prior to the above-mentioned plating process, the cutting of the dam bar 3 and the resin r filled in the gap are described.
Trimming / forming primary processing for removing is performed.
The treatment step may be performed after the plating treatment, but a punch for cutting the dam bar and for removing the resin (can also be used)
In order to prevent the plating from adhering to the surface, it is preferable to perform it before the plating treatment.

After the plating process is completed, a secondary trimming / forming process is performed to bend each external lead 1 so that the external lead 1 can be soldered to the wiring board. In the processing step, as shown in FIG. 6, the lead frame L is positioned so that the concave portion 4 is on the lower side and the convex portion 5 is on the upper side, and the base end side of the external lead 1 is moved to the upper and lower stoppers 20,2.
Punch from above the part of the lead frame L projecting outside of the stoppers 20 and 21 while being pressed by 1.
22 is lowered and the external lead 1 is bent into an L shape. In this secondary processing step, as shown in the figure, by providing the recesses 23 on the bottom surface of the punch 22 which allow the projections 5 to escape, the conventional press machine used for the secondary processing of trimming / forming can be used as it is.

After the bending process is completed, the unit frame portions L'are separated and the connecting portion 2 for connecting the tips of the outer leads 1 is cut off. In the step, as shown in FIG. 7, the inner surface of the recess 4 is pressed with the upper and lower stoppers 30 and 31 being pressed in front of the positions where the recesses 4 and the protrusions 5 are formed at the tips of the respective outer leads 1. Punch 32 along the surface of the formed plating layer 6
And the connecting portion 2 is cut off at the same time as the portion where the concave portion 4 is formed in the tip portion of the external lead 1.
In addition, the length of the outer lead 1 is appropriately adjusted to form the lead portion L1. As a result, a large number of lead portions L1, L1 ... Project in the L shape from the peripheral edge of the package portion P, and the entire upper, lower, left, and right peripheral surfaces of each lead portion L1 and the inner surface of the recessed portion 4 at the tip surface L1-1 thereof. A semiconductor device in which a uniform plated layer 6 is formed in a portion corresponding to (i.e., a region of the tip surface L1-1 of the lead portion L1 in the height direction of about 2/3) is manufactured (see FIG. 8).

As shown in FIG. 9, the semiconductor device A manufactured in this manner has the tip of each lead L1 soldered with cream solder.
Although it is adhered to the lead 51 of the wiring board 50 via 40, only the tip lower surface portion is provided because both the tip lower surface portion L1-2 and the tip surface L1-1 of the lead portion L1 have solder jointability. As compared with a semiconductor device manufactured by a conventional method having only soldering property (see FIG. 10), extremely high bonding reliability can be obtained. Such characteristics are more remarkably obtained as the number of pins and the thickness of the semiconductor device are increased to meet the demand for higher performance and smaller size.

In this embodiment, as described above, the region of the lead surface L1-1 on which the plating layer 6 is formed is about 2/3 of the height of the lead surface L1-1. The present invention is not limited to this, and the initial purpose can be achieved if the plating layer 6 is formed at least in a region of about 1/2 in the height direction on the lead end face L1-1. Further, the increase / decrease of the area where the plating layer 6 is formed depends on the lowering limit of the punch 12 when the recess 4 is formed at the tip portion of the outer lead 1.
Depth d is 1/2 to 2 / with respect to the plate thickness t of the lead frame L.
It goes without saying that it is adjusted appropriately so that it falls within the range of about 3.

[0018]

As described above, according to the present invention, the concave portion is provided at the tip of the external lead, the concave portion is provided at the tip of the external lead after the entire exposed portion of the lead frame from the package portion is plated. Since the lead portions are formed by separating the portions, the plating layer formed at the portions corresponding to the inner surfaces of the recesses on the tip end surfaces of the lead portions can secure the solder adhesiveness of the lead end tip surfaces to the wiring board. Therefore, it becomes possible to solder both the lower end surface of the lead portion and the front end surface thereof to the wiring board, and the reliability of the bonding of the semiconductor device to the wiring board is extremely high. We have been able to provide a semiconductor device manufacturing method that is optimal for pinning and ultra-thinning.

Further, if the depression is formed in the tip portion of the external lead prior to the plating treatment by a pressing device such as a press, the device can also be used for cutting the depression after the plating treatment. It can be implemented without increasing the plating line and manufacturing line or increasing the work time compared to the conventional method.

[Brief description of drawings]

FIG. 1 is a plan view of a lead frame in which a package portion is formed, showing an enlarged main portion.

FIG. 2 is an enlarged cross-sectional view showing a state before a recess is formed in the tip portion of the external lead.

FIG. 3 is an enlarged cross-sectional view showing a state after forming a recess in the tip portion of the external lead.

FIG. 4 is a plan view of the state of FIG.

FIG. 5 is an enlarged cross-sectional view showing a state after a plating layer is formed on the entire portion exposed from the package portion.

FIG. 6 is a cross-sectional view showing a state after bending the external lead, showing an enlarged main part.

FIG. 7 is an enlarged cross-sectional view showing a state before the concave portion at the tip of the external lead is cut off.

FIG. 8 is an enlarged cross-sectional view showing a state after the concave portion at the tip of the external lead is cut off.

FIG. 9 is a cross-sectional view showing a state in which a semiconductor device manufactured by the method of the present invention is bonded to a wiring board, and an essential part is enlarged.

FIG. 10 is an enlarged view of an essential part showing a state in which a semiconductor device manufactured by a conventional method is bonded to a wiring board.

[Explanation of symbols]

L: Lead frame P: Package
1: External lead 2: Connection part 3: Dam bar
4: concave portion 5: convex portion 6: plating layer
A: Semiconductor device L1: Lead L1-1: Lead end surface 40: Cream solder 50: Wiring board 5
1: Lead

Claims (1)

[Claims] 1. A chip mounted on a lead frame is packaged to form a package portion, and a recess is formed at each tip of each of the external leads extending from the package portion. A plating layer is uniformly formed on the entire exposed portion of the lead frame from the package portion by plating the entire package portion, and thereafter, the portion where the recessed portion is formed at the tip portion of each external lead is separated. At the same time, a method of manufacturing a semiconductor device is characterized in that each outer lead is bent to form a lead portion.