JPH0714952A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0714952A
JPH0714952A JP5154825A JP15482593A JPH0714952A JP H0714952 A JPH0714952 A JP H0714952A JP 5154825 A JP5154825 A JP 5154825A JP 15482593 A JP15482593 A JP 15482593A JP H0714952 A JPH0714952 A JP H0714952A
Authority
JP
Japan
Prior art keywords
semiconductor device
radiating fins
radiation fin
mold resin
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5154825A
Other languages
Japanese (ja)
Inventor
Tomio Yamada
富男 山田
Akiro Hoshi
彰郎 星
Kazuo Hatori
和夫 羽鳥
Hajime Murakami
村上  元
Kazuo Shimizu
一男 清水
Shigeru Ishii
滋 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5154825A priority Critical patent/JPH0714952A/en
Publication of JPH0714952A publication Critical patent/JPH0714952A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To mount semiconductor device packages with radiating fins automatically on a wiring board in the same process as semiconductor devices without a radiating fin, while being mixed with the semiconductor devices without a radiating fin by installing the radiating fins due to magnetic force between a sealed section and the radiating fins. CONSTITUTION:Ferromagnetic material 61, that is, the material including at least one of a ferromagnetic phase and a ferrimagnetic phase is added locally or dispersedly to mold resin 6 which constitutes a sealed section of a semiconductor device and radiating fins 7. The ferromagnetic material 61 which is included in at least one of the mold resin 6 and the radiating fins 7 is magnetized with magnetization axes being faced in one specified direction. Then, the mold resin 6 and the radiating fins 7 are fastened with magnetic force. Therefore, no special space is required for installation of the radiating fins 7. In the assembly of the semiconductor device, the radiating fins 7 can be installed after mounting the device on a substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置に関し、特
に、放熱フィンの取り付けられた半導体装置に適用して
有効な技術に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a technique effective when applied to a semiconductor device having a radiation fin.

【0002】[0002]

【従来の技術】半導体装置の高集積化と高速化に伴い、
半導体装置の発熱量は著しく増大しており、特に、消費
電力の高い素子を搭載した半導体装置の場合、電力消費
による発熱量が大きいため半導体装置が正確に動作しな
いという問題があった。この問題に対処する一つの方法
として、発生した熱を周囲の空気に放散させる目的で、
放熱フィンの取り付けられた半導体装置が従来から利用
されている。
2. Description of the Related Art With the increase in integration and speed of semiconductor devices,
The amount of heat generated by the semiconductor device is remarkably increased, and particularly in the case of a semiconductor device having an element with high power consumption, there is a problem that the amount of heat generated by power consumption is large and the semiconductor device does not operate accurately. One way to deal with this problem is to dissipate the generated heat into the surrounding air,
Conventionally, a semiconductor device to which a radiation fin is attached has been used.

【0003】従来の放熱フィン付き半導体装置におい
て、半導体パッケージ(以下では、放熱フィン付半導体
装置の放熱フィンを除いた部分を半導体パッケージと称
する)に放熱フィンを取り付ける方法としては、次に示
す(1)〜(3)の三つの方法がある。
In a conventional semiconductor device with a radiation fin, a method of attaching the radiation fin to a semiconductor package (hereinafter, the portion of the semiconductor device with the radiation fin excluding the radiation fin is referred to as a semiconductor package) is shown below (1) There are three methods from) to (3).

【0004】(1)熱硬化性樹脂からなる接着剤で取り
付ける。
(1) Attach with an adhesive made of a thermosetting resin.

【0005】(2)ろう剤を用いてろう付けにより取り
付ける。
(2) Attach by brazing using a brazing agent.

【0006】(3)機械的(かしめ、ねじ止め)に取り
付ける。
(3) Mechanically (caulking, screwing) mounting.

【0007】(1)の接着剤を用いる場合には接着剤を固
めるために、また、(2)のろう剤を用いる場合にはろう
剤を融かすために、それぞれ加熱を必要としており、
(1)、(2)何れの場合も、少なくとも半導体装置のアウ
ターリード部の内、プリント配線基板への実装のためは
んだ付けされる領域は、この加熱時において、はんだの
融点(融点180℃)よりも高温となる。したがって、
半導体パッケージを配線基板へ実装した後に放熱フィン
を取り付けた場合、放熱フィンを取り付ける際の加熱に
より、既に配線基板実装した部分のはんだが融けるた
め、配線基板実装が不完全なものとなる。
When the adhesive of (1) is used, heating is necessary to harden the adhesive, and when the wax of (2) is used, the wax is melted, respectively.
In both cases (1) and (2), at least the area of the outer lead portion of the semiconductor device to be soldered for mounting on the printed wiring board has a melting point of the solder (melting point 180 ° C.) during this heating. Will be hotter than. Therefore,
When the radiation fin is attached after the semiconductor package is mounted on the wiring board, the solder on the portion already mounted on the wiring board is melted by the heating at the time of attaching the radiation fin, so that the wiring board mounting becomes incomplete.

【0008】また、(3)の機械的な取り付け方法を採る
場合にも、半導体パッケージを配線基板へ実装した後に
放熱フィンを取り付けたならば、配線基板実装後におい
ては配線基板上で半導体パッケージが密集しているた
め、配線基板実装後のフィン取り付けは困難である。
Also in the case of adopting the mechanical mounting method of (3), if the heat radiation fins are mounted after the semiconductor package is mounted on the wiring board, the semiconductor package is mounted on the wiring board after mounting the wiring board. Since they are dense, it is difficult to attach the fins after mounting the wiring board.

【0009】以上説明した理由から、従来は、半導体パ
ッケージを配線基板に実装する前に放熱フィンを半導体
パッケージに取り付けておく必要があった。
For the reasons described above, conventionally, it has been necessary to attach the radiation fin to the semiconductor package before mounting the semiconductor package on the wiring board.

【0010】[0010]

【発明が解決しようとする課題】しかしながら、本発明
者は前記従来技術を検討した結果、次の問題点があるこ
とを見出した。
However, as a result of examining the above-mentioned prior art, the present inventor has found the following problems.

【0011】すなわち、従来の方法では、フィン取り付
けを行ってから、基板実装を行わざるを得ないので、放
熱フィン付半導体装置および放熱フィンの無い半導体装
置の両者を混在させ同一ラインで自動機により基板実装
を行った場合、放熱フィン付半導体装置と放熱フィンの
無い半導体装置とはその形状を大きく異にするため、自
動実装できない場合が多かった。
In other words, in the conventional method, since the fins must be mounted before the substrate is mounted, both the semiconductor device with the heat radiation fin and the semiconductor device without the heat radiation fin are mixed and are automatically operated on the same line by an automatic machine. When the board is mounted, the semiconductor device with the heat radiation fin and the semiconductor device without the heat radiation fin are largely different in shape from each other, and therefore the automatic mounting is often impossible.

【0012】本発明の目的は、放熱フィン付半導体装置
のパッケージを放熱フィンの無い半導体装置と混在させ
て同一工程で配線基板に自動実装することが可能な技術
を提供することにある。
An object of the present invention is to provide a technique capable of automatically mounting a package of a semiconductor device with a radiation fin on a wiring board in the same process by mixing a package of the semiconductor device without the radiation fin.

【0013】本発明の前記ならびに、その他の目的及び
新規な特徴は、本明細書の記述及び添付図面によって明
らかになるであろう。
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

【0014】[0014]

【課題を解決するための手段】本願において開示される
発明のうち、代表的なものの概要を簡単に説明すれば下
記のとおりである。
Among the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

【0015】すなわち、放熱フィン付半導体装置におい
て、封止部および放熱フィンに磁性の強い材料(少なく
とも強磁性相またはフェリ磁性相を含むもの)を局所的
にまたは全体に分散して添加し、さらに、前記封止部お
よび前記放熱フィンの両者のうち少なくとも一方に含ま
れる前記磁性の強い材料の磁化軸を所定の方向にそろえ
て磁化させ、前記封止部と前記放熱フィンとを磁力によ
り固定する。
That is, in a semiconductor device with a heat dissipation fin, a material having a strong magnetic property (including at least a ferromagnetic phase or a ferrimagnetic phase) is added locally or dispersed to the sealing portion and the heat dissipation fin, and further, , Magnetizing the magnetization axis of the strong magnetic material included in at least one of the sealing portion and the radiation fin by aligning the magnetization axis in a predetermined direction, and fixing the sealing portion and the radiation fin by magnetic force. .

【0016】[0016]

【作用】前記した手段によれば、放熱フィン付半導体装
置において、放熱フィンの取り付けを封止部と放熱フィ
ンとの間の磁力により行うことにより、放熱フィンの取
り付けのために特別に加熱を必要とすることはなく、ま
た、特別にスペースを必要とすることもないので、基板
実装後に放熱フィンを取り付ける順序で半導体装置の組
み立てを行うことができる。これにより、放熱フィン付
半導体装置のパッケージを放熱フィンの無い半導体装置
と混在させて同一工程で配線基板に自動実装することが
可能となる。
According to the above-mentioned means, in the semiconductor device with the heat radiation fin, the heat radiation fin is attached by the magnetic force between the sealing portion and the heat radiation fin, so that special heating is required for attaching the heat radiation fin. In addition, since no special space is required, the semiconductor device can be assembled in the order in which the radiation fins are attached after the board is mounted. As a result, the package of the semiconductor device with the radiation fins can be mixed with the semiconductor device without the radiation fins and automatically mounted on the wiring board in the same step.

【0017】[0017]

【実施例】以下、本発明による半導体装置の実施例を図
面を参照して詳細に説明する。
Embodiments of the semiconductor device according to the present invention will be described below in detail with reference to the drawings.

【0018】図1は本発明による一実施例の放熱フィン
付半導体装置の基板実装状態での構成を示す断面図であ
り、1はタブ、2はシリコンチップ、3はペレット付け
剤、4はボンディングワイヤ、5はリード、6は半導体
装置の封止部を形成するモールドレジン、61はモール
ドレジン6中の磁石粉粒、7は放熱フィン、71は放熱
フィン7のモールドレジン6と接触する側の端部を形成
する着磁性領域、72は放熱フィン7のうち着磁性領域
71を除く主放熱部、8は配線基板、81は配線基板8
の配線への装着部、9は半田をそれぞれ示している。
FIG. 1 is a cross-sectional view showing a structure of a semiconductor device with a radiation fin according to an embodiment of the present invention in a mounted state on a substrate. 1 is a tab, 2 is a silicon chip, 3 is a pelletizing agent, and 4 is a bonding. Wires, 5 are leads, 6 is a mold resin that forms a sealing portion of the semiconductor device, 61 is magnet powder particles in the mold resin 6, 7 is a radiating fin, and 71 is a side of the radiating fin 7 that contacts the mold resin 6. A magnetized region forming an end portion, 72 a main heat dissipation portion of the heat dissipation fin 7 excluding the magnetized region 71, 8 a wiring board, 81 a wiring board 8
The parts to be attached to the wirings, and 9 are solders, respectively.

【0019】初めに、図1に示された半導体装置の製造
工程について説明する。タブ1に例えば銀ペーストなど
のペレット付剤3を塗布し、この塗布面にシリコンチッ
プ2を接着させる。この後、ボンディングワイヤ4(金
線を用いる)をシリコンチップ2上面の所定の位置およ
びリード5のボンディングリード51部に順次、熱圧着
ボンディングをする。
First, the manufacturing process of the semiconductor device shown in FIG. 1 will be described. The tab 1 is coated with a pelletizing agent 3 such as silver paste, and the silicon chip 2 is adhered to the coated surface. After that, the bonding wire 4 (using a gold wire) is sequentially thermocompression bonded to a predetermined position on the upper surface of the silicon chip 2 and the bonding lead 51 portion of the lead 5.

【0020】次に、トランスファーモールド法にて封止
を行うが、封止の材料に使用するモールドレジン6に
は、強度・膨脹率調整のために混入させるフィラー(シ
リカ等を用いる)とともに適当な大きさの粉粒状の磁石
(以下、磁石粉粒と称する)をモールドレジン6内で分
散させ混入させてある。このとき、磁石粉粒の磁化軸が
所望の磁化方向に一致するように各磁石粉粒の軸方向を
そろえて混入させて着磁する。なお、磁石粉粒は磁性の
強い材料で形成されている。以上の工程により封止が完
了して、半導体パッケージができあがる。
Next, sealing is carried out by a transfer molding method. The mold resin 6 used as a sealing material is suitable with a filler (silica or the like) mixed for adjusting strength and expansion coefficient. Powder-sized magnets having a size (hereinafter, referred to as magnet powder particles) are dispersed and mixed in the mold resin 6. At this time, the magnet powder particles are magnetized by aligning the magnet powder particles in the same axial direction so that the magnetization axis of the magnet powder particles coincides with the desired magnetization direction. The magnet powder particles are formed of a material having strong magnetism. By the above steps, the sealing is completed and the semiconductor package is completed.

【0021】封止完了後、半導体パッケージのアウター
リード52を装着部81に配置し、装着部81を被着し
ている半田9に、赤外線等の熱源を吹き付けることで、
半田9を溶融して、半導体パッケージを配線基板8に実
装する。
After the sealing is completed, the outer leads 52 of the semiconductor package are arranged on the mounting portion 81, and a heat source such as infrared rays is sprayed on the solder 9 to which the mounting portion 81 is adhered,
The solder 9 is melted and the semiconductor package is mounted on the wiring board 8.

【0022】半導体パッケージのモールドレジン6中の
磁石粉粒がそろって一定の方向に磁化されているためモ
ールドレジン6自体が磁石としての性質を備えているの
で、さらに、放熱フィン7の着磁性領域71は磁性の強
い材料で形成されており磁石に付く性質を備えているの
で、モールドレジン6と着磁性領域71との間にはたら
く磁力により、放熱フィン7を半導体パッケージに取り
付けることができる。以上で、製造工程が完了する。
Since the magnet powder particles in the mold resin 6 of the semiconductor package are uniformly magnetized in a fixed direction, the mold resin 6 itself has a property as a magnet, and the magnetizing region of the heat radiation fin 7 is further provided. Since 71 is made of a highly magnetic material and has the property of sticking to a magnet, the heat radiation fin 7 can be attached to the semiconductor package by the magnetic force acting between the mold resin 6 and the magnetized region 71. This completes the manufacturing process.

【0023】以上の説明からわかるように、本実施例の
放熱フィン付半導体装置によれば、次のような効果を得
ることができる。
As can be seen from the above description, according to the semiconductor device with the radiation fin of this embodiment, the following effects can be obtained.

【0024】すなわち、放熱フィン7の取り付けをモー
ルドレジン6と放熱フィン7の着磁性領域71との間の
磁力により行うことにより、放熱フィン7の取り付けの
ために特別に加熱を必要とすることはないので、放熱フ
ィン7の取り付け時において、半田9が溶融することは
ない。さらに、放熱フィン7の取り付け時において、特
別にスペースを必要とすることもない。したがって、配
線配線基板8に半導体パッケージを実装した後に、半導
体パッケージに放熱フィン7を取り付ける順序で半導体
装置の組み立てを行うことができる。これにより、放熱
フィン付半導体装置のパッケージを放熱フィンの無い半
導体装置と混在させて同一工程で配線基板8に自動実装
することが可能となる。
That is, since the heat radiation fin 7 is attached by the magnetic force between the mold resin 6 and the magnetized region 71 of the heat radiation fin 7, it is not necessary to specially heat the heat radiation fin 7 for attachment. Therefore, the solder 9 does not melt when the radiation fin 7 is attached. Furthermore, no special space is required when attaching the radiation fin 7. Therefore, after mounting the semiconductor package on the wiring / wiring board 8, the semiconductor device can be assembled in the order of attaching the heat radiation fins 7 to the semiconductor package. As a result, the package of the semiconductor device with the radiation fins can be mixed with the semiconductor device without the radiation fins and automatically mounted on the wiring board 8 in the same step.

【0025】以上、本発明を実施例に基づき具体的に説
明したが、本発明は、前記実施例に限定されるものでは
なく、その要旨を逸脱しない範囲で種々変更可能である
ことはいうまでもない。
Although the present invention has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Nor.

【0026】例えば、本実施例ではモールドレジン6中
に磁性の強い材料からなる磁石を粉粒状にして全体に分
散させて混入させたが、本発明はこれに限定されるもの
ではなく、磁石をモールドレジン6に局所的に混入させ
てもよい。
For example, in the present embodiment, magnets made of a material having a strong magnetic property are made into powder particles and dispersed and mixed in the mold resin 6, but the present invention is not limited to this. It may be mixed locally in the mold resin 6.

【0027】また、本実施例では放熱フィン7の着磁性
領域71を放熱フィン7の一局所に集中して混入させた
が、本発明はこれに限定されるものではなく、着磁性領
域71を放熱フィン7の全体に分散させて混入させても
よい。
Further, in the present embodiment, the magnetized regions 71 of the heat radiation fins 7 are concentrated and mixed in one region of the heat radiation fins 7. However, the present invention is not limited to this, and the magnetized regions 71 are formed. The heat radiation fins 7 may be dispersed and mixed in the whole.

【0028】さらに、本実施例ではモールドレジン6自
体に磁石の性質をもたせ放熱フィン7にモールドレジン
6内の磁石に付く性質をもたせる構成としたが、本発明
はこれに限定されるものではなく、モールドレジン6と
放熱フィン7のそれぞれが有する性質を逆転させた構
成、すなわち放熱フィン7自体に磁石の性質をもたせモ
ールドレジン6に放熱フィン7の磁石に付く性質をもた
せる構成としてもよい。もちろん、モールドレジン6と
放熱フィン7との両者に磁石の性質をもたせる構成とし
てもよい。ただし、この場合にはモールドレジン6と放
熱フィン7とが接触する側の領域が、それぞれ互いに磁
石の異極となるように両者の磁化の方向を調節する必要
がある。
Further, in this embodiment, the mold resin 6 itself has the property of a magnet and the heat radiation fin 7 has the property of attaching to the magnet in the mold resin 6, but the present invention is not limited to this. Alternatively, the properties of the mold resin 6 and the heat radiation fin 7 may be reversed, that is, the heat radiation fin 7 itself may have the property of a magnet, and the mold resin 6 may have the property of attaching to the magnet of the heat radiation fin 7. Of course, both the mold resin 6 and the heat radiation fin 7 may have a magnet property. However, in this case, it is necessary to adjust the magnetization directions of the mold resin 6 and the radiation fin 7 so that the regions on the side where the mold resin 6 and the radiation fin 7 contact each other have different polarities of the magnets.

【0029】[0029]

【発明の効果】本願において開示される発明のうち代表
的なものによって得られる効果を簡単に説明すれば、下
記の通りである。
The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

【0030】半導体パッケージを配線基板に実装した後
に、放熱フィンを取り付けることができるので、放熱フ
ィン付き半導体装置の半導体パッケージの基板実装に際
し、放熱フィンの無い半導体装置と同じ実装機を使用す
ることができ、特に、自動実装の場合、設備投資をする
ことなく、放熱フィン付半導体装置のパッケージを放熱
フィンの無い半導体装置と混在させて同一工程で配線基
板に自動実装することが可能となる。配線基板への実装
精度も、放熱フィンの無い半導体装置の場合と同様、高
精度に行える。
Since the radiation fins can be attached after the semiconductor package is mounted on the wiring board, when mounting the semiconductor package of the semiconductor device with the radiation fins on the substrate, the same mounter as the semiconductor device without the radiation fins can be used. In particular, in the case of automatic mounting, the package of the semiconductor device with the heat radiation fin can be mixed with the semiconductor device without the heat radiation fin and automatically mounted on the wiring board in the same process without any capital investment. The mounting accuracy on the wiring board can be performed with high accuracy as in the case of the semiconductor device having no heat radiation fin.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明による一実施例の放熱フィン付半導体
装置を配線基板に表面実装した状態の断面図。
FIG. 1 is a cross-sectional view of a semiconductor device with a radiation fin according to an embodiment of the present invention, which is surface-mounted on a wiring board.

【符号の説明】[Explanation of symbols]

1…タブ、2…シリコンチップ、3…ペレット付け剤、
4…ボンディングワイヤ(Au線)、5…リード、51
…ボンディングリード、52…アウターリード、6…モ
ールドレジン、61…磁石粉粒(磁性の強い材料)、7
…放熱フィン、71…放熱フィン7の着磁性領域(磁性
の強い材料でFe,Ni又はその合金)、72…放熱フ
ィン7の主放熱部(Al,Cu等)、8…配線基板、8
1…装着部(銅箔)、9…半田。
1 ... tab, 2 ... silicon chip, 3 ... pelletizing agent,
4 ... Bonding wire (Au wire), 5 ... Lead, 51
... bonding leads, 52 ... outer leads, 6 ... molded resin, 61 ... magnet powder particles (material with strong magnetism), 7
... Radiating fins, 71 ... Magnetized regions of the radiation fins 7 (Fe, Ni or alloys thereof having a strong magnetic property), 72 ... Main radiation portions (Al, Cu, etc.) of the radiation fins 7, 8 ... Wiring board, 8
1 ... Mounting part (copper foil), 9 ... Solder.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 村上 元 東京都小平市上水本町5丁目20番1号 株 式会社日立製作所半導体事業部内 (72)発明者 清水 一男 東京都小平市上水本町5丁目20番1号 株 式会社日立製作所半導体事業部内 (72)発明者 石井 滋 東京都小平市上水本町5丁目20番1号 株 式会社日立製作所半導体事業部内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Gen Murakami, 5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Inside the Semiconductor Division, Hitachi, Ltd. (72) Kazuo Shimizu, 5 Kamimizumoto-cho, Kodaira, Tokyo Hitachi Co., Ltd. Semiconductor Division, 20-1-1 (72) Inventor Shigeru Ishii 5-2-1 Kamisuihonmachi, Kodaira-shi, Tokyo Inside Semiconductor Division, Hitachi Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 放熱フィン付半導体装置において、封止
部および放熱フィンに磁性の強い材料を局所的にまたは
全体に分散して添加し、さらに、前記封止部および前記
放熱フィンの両者のうち少なくとも一方に含まれる前記
磁性の強い材料の磁化軸を所定の方向にそろえて磁化さ
せ、前記封止部と前記放熱フィンとを磁力により固定す
ることを特徴とする放熱フィン付半導体装置。
1. In a semiconductor device with a heat dissipation fin, a strong magnetic material is locally or entirely dispersed and added to the sealing part and the heat dissipation fin, and further, both of the sealing part and the heat dissipation fin are added. A semiconductor device with a heat dissipation fin, wherein at least one of the strongly magnetic materials has a magnetization axis aligned in a predetermined direction and magnetized to fix the sealing portion and the heat dissipation fin by magnetic force.
JP5154825A 1993-06-25 1993-06-25 Semiconductor device Pending JPH0714952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5154825A JPH0714952A (en) 1993-06-25 1993-06-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5154825A JPH0714952A (en) 1993-06-25 1993-06-25 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0714952A true JPH0714952A (en) 1995-01-17

Family

ID=15592706

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5154825A Pending JPH0714952A (en) 1993-06-25 1993-06-25 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0714952A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112951779A (en) * 2019-11-26 2021-06-11 三菱电机株式会社 Semiconductor device and manufacturing method of heat dissipation fin
CN113013118A (en) * 2021-02-20 2021-06-22 英韧科技(上海)有限公司 Packaging-level chip packaged by magnetic cover, chip module and electronic product

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112951779A (en) * 2019-11-26 2021-06-11 三菱电机株式会社 Semiconductor device and manufacturing method of heat dissipation fin
CN113013118A (en) * 2021-02-20 2021-06-22 英韧科技(上海)有限公司 Packaging-level chip packaged by magnetic cover, chip module and electronic product
CN113013118B (en) * 2021-02-20 2024-03-08 英韧科技股份有限公司 Packaging-level chip, chip module and electronic product packaged by magnetic cover

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