JPH07142424A - Fabrication of semiconductor device - Google Patents

Abstract

PURPOSE:To allow formation of a low resistance electrode or a metal/ semiconductor junction by etching an insulating film on a substrate with oxygen gas to expose the surface thereof on which a conductive layer is formed, depositing a metal film thereon and conducting heat treatment to deposit a metal silicide on the surface of the substrate. CONSTITUTION:A field oxide 12 is deposited on a silicon single crystal substrate 11 and a gate electrode 14 is formed in an element region. Silicon nitride 15 is then deposited entirely thereon and anisotropic etching is effected using a gas containing 2-70% of oxygen atoms thus subjecting the entire surface to plasma processing. Subsequently, ions are implanted and annealing is effected thus forming a source region 16a and a drain region 16b. Thereafter, a metal film 17 is deposited entirely by sputtering. This structure is then heat treated in N2 atmosphere (at 800 deg.C) or below, for 1 hour or less) to deposit titanium silicide 17a, 17b on the exposed silicon substrate. Unreactive titanium 17 is then removed thus forming the titanium silicide films 17a, 17b.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having low resistance electrodes or a metal / semiconductor junction.

[0002]

2. Description of the Related Art In recent years, as the integration and speed of semiconductor devices have increased, the resistance of the diffusion layer is lowered by attaching a metal silicide film on the diffusion layer formed on the semiconductor substrate, and the metal silicide is formed on the bottom of the contact. It has been devised that the surfaces of the n / p junctions are made uniform by sticking a film. In either case, the insulating film formed on the surface of the silicon substrate is selectively removed by etching to form a metal silicide film on the exposed surface of the silicon substrate.

However, when a mixed gas of carbon fluoride and hydrogen or a system in which hydrogen is added to carbon fluoride is used to etch the insulating film and a metal silicide film is formed on the exposed surface of the silicon substrate, As shown in FIG. 4, the present inventors have found that the hole concentration on the substrate surface side decreases. Therefore, there arises a problem that the contact resistance becomes high and the sheet resistance of the metal silicide film becomes high, and forming the metal silicide film by such a method is not preferable in terms of device performance.

Further, in order to remove the adverse effect on the surface of the silicon substrate due to such etching, it is necessary to perform a high temperature furnace anneal or an etching treatment on the silicon surface after the etching. In such a case, It is difficult to form a shallow diffusion layer, and it is very difficult to shorten the manufacturing process time.

[0005]

As described above, the insulating film is etched by using a mixed gas of carbon fluoride and hydrogen or a system in which hydrogen is added to carbon fluoride, and the exposed surface of the silicon substrate is exposed. When a metal silicide film is formed, it is extremely difficult to realize a low resistance electrode or a metal / semiconductor junction. The present invention has been made under such circumstances, and an object of the present invention is to provide a method of manufacturing a semiconductor device capable of forming a low resistance electrode or a metal / semiconductor junction.

[0006]

In order to achieve the above object, the present invention provides a step of forming an insulating film on a semiconductor substrate having a conductive layer formed on the surface thereof, and the insulating film containing oxygen atoms. Is exposed to a gas of 2 to 70% to expose the surface of the semiconductor substrate on which the conductive layer is formed; a step of forming a metal film on the exposed surface of the semiconductor substrate; And a step of forming a film and a step of forming a metal silicide on a surface of the semiconductor substrate by performing heat treatment in a heat treatment temperature of 800 ° C. or lower and a heat treatment time of 1 hour or less in a step after the step of forming the film. A method of manufacturing a semiconductor device is provided.

Further, the present invention comprises a step of selectively forming an electrode wiring layer on a semiconductor substrate on which a conductive layer is formed,
By forming an insulating film on the semiconductor substrate and etching the entire surface of the insulating film, the surface of the semiconductor substrate on which the conductive layer is formed is exposed, and the insulating film is formed on the sidewall of the electrode wiring layer. Selectively leaving, a step of performing plasma treatment or heat treatment using a gas containing oxygen on the exposed surface of the semiconductor substrate, and a step of forming a metal film on the exposed surface of the semiconductor substrate And a step of forming a metal silicide on the surface of the semiconductor substrate by heat treatment, and a method for manufacturing a semiconductor device.

In this case, it is preferable that the cathode drop voltage during the plasma processing using the gas containing oxygen be equal to or higher than the cathode drop voltage when the entire surface of the insulating film is etched.

[0009]

According to the present inventors, by adding oxygen to the etching gas of the insulating film before the formation of the metal silicide, or by performing a plasma treatment with a gas containing oxygen on Si exposed at the end of etching, It was found that it is possible to maintain the hole concentration on the surface side of the substrate almost the same as the value before the etching of the insulating film. Figure 3
[Fig. 3] is a characteristic diagram showing this result. Thus, according to the present invention, a low resistance electrode or metal / semiconductor junction can be obtained, and deterioration of characteristics can be suppressed only by the gas condition of etching or additional plasma treatment or heat treatment. The heat treatment and the step of removing the semiconductor surface layer are not required.

[0010]

Embodiments of the present invention will be described below with reference to the drawings to more specifically describe the present invention. FIG. 1 is a cross-sectional view showing a process up to forming a metal silicide on a diffusion layer in the manufacturing process of the MOSFET according to the first embodiment of the present invention. First, as shown in FIG.
A field oxide film 12 is formed on the silicon single crystal substrate 11 by thermal oxidation. Next, this field oxide film 1
A silicon oxide film, a polycrystalline silicon film, and a tungsten film are sequentially formed in an element region surrounded by 2, and then these laminated films are selectively etched in the shape of a gate electrode to form a gate oxide film 13 , And the gate electrode 14 composed of the polycrystalline silicon film 14a and the tungsten film 14b is formed. Reference numeral 14c indicates a silicon nitride film pattern used as an etching mask for forming the gate electrode 14.

After that, a silicon nitride film 15 is formed on the entire surface by the CVD method, and then anisotropic etching, for example, reactive ion etching is performed to leave the silicon nitride film on the side wall of the gate and form the side wall insulating film 15a. Form. This anisotropic etching uses CF ₄ / H ₂ / O as an etchant.
₂ = 67/100/4 SCCM mixed gas, power 800 W, pressure 40 mTorr. After anisotropic ion etching, use 500 SCCM of O ₂ and
The entire surface is plasma-treated with 0 W of electric power.

Next, as shown in FIG. 1B, using the gate oxide film 13 and the gate electrode 14 as a mask, ions for determining the conductivity type are implanted, and then annealing is performed. As a result, the source region 16a and the drain region 1
6b is formed. After that, a metal, for example, a titanium (Ti) film 17 is deposited on the entire surface by sputtering.

This structure is subjected to 750 to 80 in an N ₂ atmosphere.
When heat-treated at a temperature of 0 ° C., silicon reacts with titanium as shown in FIG. 1C, and titanium silicide (TiSi ₂ ) films 17a and 17b are formed on the exposed silicon substrate. Titanium that contacts with other than silicon does not react and remains as the titanium film 17c.

Then, as shown in FIG. 1D, H ₂ S
The unreacted titanium film 17b is removed at room temperature by using a mixed solution of O ₄ and H ₂ O ₂ as an etchant. As a result, on the source region 16a and the drain region 16b, the titanium silicide (TiSi ₂ ) film 17a,
17b is formed.

FIG. 2 shows an M according to the second embodiment of the present invention.
It is sectional drawing which shows the process of forming a metal silicide on a diffusion layer among the manufacturing processes of OSFET. First, as shown in FIG. 2A, a field oxide film 22 is formed on a silicon single crystal substrate 21 by thermal oxidation. Then
In the element region surrounded by the field oxide film 22,
After a silicon oxide film, a polycrystalline silicon film, and a tungsten film are sequentially formed, these laminated films are selectively etched in the shape of a gate electrode to form a gate oxide film 23, a polycrystalline silicon film 24a, and a tungsten film. A gate electrode 24 composed of the film 24b is formed. After that, the sidewall insulating film 25 is formed in the same manner as in the first embodiment.

Next, as shown in FIG. 2B, using the gate oxide film 23 and the gate electrode 24 as a mask, ions for determining the conductivity type are implanted, and then annealing is performed. As a result, the source region 26a and the drain region 2
6b is formed. Then, after depositing on the entire surface by CVD SiO ₂ film 27 as an interlayer insulating film, the SiO ₂
The portions of the film 27 on the source region 26a and the drain region 26b are removed by etching to form an interlayer connection hole.

This etching uses C as an etchant.
The mixed gas of F ₄ / H ₂ / O ₂ = 67/100 / 4SCCM is used, and the power is 800 W and the pressure is 40 mTorr. After forming the interlayer connection hole by etching, 500S
The entire surface is plasma-treated with 800 W of electric power using O ₂ of CCM.

After that, as shown in FIG. 2C, a metal, for example, titanium (Ti) film 2 is formed on the entire surface by sputtering.
8 is deposited. The structure in the N ₂ atmosphere, 750-8
When heat-treated at a temperature of 00 ° C., silicon reacts with titanium as shown in FIG. 2D, and titanium silicide (TiSi ₂ ) films 29a and 29b are formed on the exposed silicon substrate. Titanium that contacts with other than silicon does not react and remains as the titanium film 29c.

Then, as shown in FIG. 2 (e), H ₂ S
Using a mixed solution of O ₄ and H ₂ O ₂ as an etchant, the unreacted titanium film 29c is removed at room temperature. As a result, titanium silicide (Ti) is self-aligned at the bottom of the interlayer connection hole on the source region 26a and the drain region 26b.
Si ₂ ) films 29a and 29b are formed.

The present invention is not limited to the above embodiment. The O ₂ plasma treatment after etching the insulating film is not always necessary when the etching is performed using a gas containing 2 to 70% of oxygen atoms. In this case, in the metal film forming step and the subsequent steps, a silicide film having a low specific resistance can be formed even if the heat treatment is performed at a temperature of 800 ° C. or lower and the heat treatment time is within 1 hour. Is. Particularly, in the case of a silicidation reaction of titanium, a heat treatment temperature of 750 to 800 ° C. is preferable, and at this time, it is possible to form a C-54 type silicide having a low specific resistance. In this case, the heat treatment time is not limited to the heat treatment in the metal film forming step, but is a total time including subsequent steps involving various heating.

Alternatively, the insulating film may be etched with a mixed gas of fluorocarbon and hydrogen, for example, an etching gas containing no oxygen such as CF ₄ / H ₂ and then O ₂ plasma treatment. Further, in the oxygen plasma treatment, the oxygen plasma may be directly exposed to the surface of the semiconductor substrate.
The radicals may be supplied by downflow. Instead of the oxygen plasma treatment, a semiconductor substrate may be heated and a gas containing oxygen may be supplied to the substrate.

Furthermore, when an oxide film is formed on the surface of a silicon substrate by the above etching or plasma treatment, it is rare, and silicidation can be performed after etching away with a solution of acid or the like.

Further, the metal film is made of nickel, in addition to titanium,
It may be composed of a transition metal such as cobalt or platinum, and the insulating film may be another insulating film such as BPSG. Furthermore, the present invention can be particularly effectively used for a device having a diffusion depth of 0.15 μm or less and a silicide film thickness of 0.05 μm or less. In addition, various modifications can be made without departing from the scope of the present invention.

[0024]

As described above, according to the present invention,
Contact between the metal silicide and the semiconductor is made by adding O during the etching of the insulating film made of carbon fluoride containing hydrogen before the formation of the metal silicide, or by adding O ₂ plasma treatment or heat treatment after the etching. The increase in resistance is suppressed, and the increase in the sheet resistance of the metal silicide is also suppressed. As a result, an extremely large drop in high integration, high speed and high reliability of the device can be obtained.

[Brief description of drawings]

FIG. 1 is a MOSFET according to a first embodiment of the present invention.
FIG.

FIG. 2 is a MOSFET according to a second embodiment of the present invention.
FIG.

FIG. 3 is a characteristic diagram showing the hole concentration on the substrate surface side after etching the insulating film with an etching gas containing carbon fluoride and oxygen.

FIG. 4 is a characteristic diagram showing the hole concentration on the substrate surface side after etching the insulating film with an etching gas containing carbon fluoride and hydrogen.

[Explanation of symbols]

11 ... Semiconductor substrate, 12 ... Field oxide film, 13 ... Gate oxide film, 14a ... Polycrystalline silicon film, 14b ... Tungsten film, 14c ... Silicon nitride film pattern, 15 ...
Silicon nitride film 15a ... Gate side wall, 16a ... Source region, 16b ... Drain region, 17 ... Titanium film, 17a,
17b ... Titanium silicide film, 17c ... Unreacted titanium film, 21 ... Semiconductor substrate, 22 ... Field oxide film, 23
... Gate oxide film, 24a ... Polycrystalline silicon film, 24b ...
Tungsten film, 24c ... Pattern of silicon nitride film, 2
5 ... Silicon nitride film, 26a ... Source region, 26b ... Drain region, 27 ... Interlayer insulating film, 28 ... Titanium film, 29
a, 29b ... Titanium silicide film, 29c ... Unreacted titanium film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H01L 21/336

Claims (3)

[Claims] 1. A step of forming an insulating film on a semiconductor substrate having a conductive layer formed on the surface thereof, and etching the insulating film using a gas having a content ratio of oxygen atoms of 2 to 70%. In the step of exposing the surface of the semiconductor substrate on which the conductive layer is formed, the step of forming a metal film on the exposed surface of the semiconductor substrate, the step of forming the metal film, and the step subsequent to the step, the heat treatment temperature is 800. And a step of forming a metal silicide on the surface of the semiconductor substrate by performing heat treatment at a temperature equal to or lower than 0 ° C. for 1 hour or less. 2. A step of selectively forming an electrode wiring layer on a semiconductor substrate on which a conductive layer is formed, a step of forming an insulating film on the semiconductor substrate, and an etching of the entire surface of the insulating film. This exposes the surface of the semiconductor substrate on which the conductive layer is formed, and selectively leaves the insulating film on the side wall of the electrode wiring layer, and oxygen is applied to the exposed surface of the semiconductor substrate. A step of performing a plasma treatment or a heat treatment using a gas containing a gas; a step of forming a metal film on the exposed surface of the semiconductor substrate; and a step of forming a metal silicide on the surface of the semiconductor substrate by heat treatment. A method for manufacturing a semiconductor device, comprising: 3. The semiconductor according to claim 2, wherein the cathode drop voltage during the plasma processing using the gas containing oxygen is equal to or higher than the cathode drop voltage when etching the entire surface of the insulating film. Device manufacturing method.