JPH0714054B2 - Semiconductor device - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to an ultra-high speed selectively doped heterojunction FET (field effect transistor), and more particularly to a transistor structure suitable for high integration.

[Background of the Invention]

Conventional selectively-doped heterojunction FETs [eg, JP-A-56-9
4779] energy band diagram [FIG. 1], enhancement type FET [E-FET] and depletion type FET [D-FE]
FIG. 2 shows a sectional view of [T]. In the conventional example, 11 is undoped GaAs and 12 is an n-type Al _x Ga _1-x As layer. 13, 13 'is a gate electrode, 17 is an n-type GaAs layer, 19 is a source / drain electrode, 16 is an ionized impurity E _F is Fermi-Millbell, E _D is the bottom of the conduction band of Al _x Ga _1-x As The energy intervals between the positions are shown. 15 is a two-dimensional electron gas layer.

In this conventional FET, the lattice matching between Al _x Ga _1-x As and GaAs is improved (x is reduced), and the two-dimensional carrier 15 is more effectively accumulated at the hetero interface (x is Due to the contradictory requirements of (increasing), it was customary to set the mixed crystal x of Al to around 0.3.

However, it has been experimentally confirmed that the impurity level E _D largely depends on the mixed crystal x of Al (for example, for Si, JJAP 11 (1982) L675-L676, Te.
HCCasey, MBPanis “Heterostructure Lasers” Academ
See ic Press 1978 PART A P200).

On the other hand, in this FET, it is usual that the film thickness d of the Al _x Ga _1-x As layer 12 is about 500 Å and the impurity concentration N _D is 10 ¹⁸ cm ^-3 .

From the viewpoint of FET threshold control, if the dielectric constant of the Al _x Ga _1-x As layer is ε and the unit charge of electrons is q _{Appears in} the threshold voltage V _th .

The situation is the same for GaAs MESFETs, and if the thickness of the conductive layer is d, then N _D ˜10 ¹⁷ cm ⁻³ d ˜1000 Å.

The amount that the threshold voltage V _T appears in the equation (1) depends on the selective doping FET
In this case, the value is 2.5 times larger than that of GaAs MESFET. This is because the threshold control is almost the same as GaAs MESFET compared to GaAs MESFET.
It means that it is 2.5 times more difficult than.

[Object of the Invention]

An object of the present invention is to provide a selective doping heterojunction FET having a structure suitable for forming an enhancement type FET and a depletion type FET in the same substrate because the threshold control is easy in the selective doping heterojunction FET. is there.

[Outline of Invention]

The inventors found the following facts while studying the relationship between the electron sheet concentration n _s accumulated at the heterojunction interface, the impurity level E _D , and the threshold voltage V _th .

The Fuerumireberu was Hakatsu from the valence band to E _F, the impurity level E _VD, the number of n-type impurities that may be electrically active at the request of statistical mechanics N _D, the number of N _D of ionized impurities
⁺ Where T is the electron temperature.

By the way, from a simple consideration, it is N _D ⁺ that contributes to the threshold voltage V _th.
It turns out that it is not N _D.

On the other hand, the electron sheet concentration n _s accumulated at the heterojunction interface is Where k: Boltzmann's constant T: absolute temperature ΔEg: difference in energy gap between AlGaAs and GaA (NcNv) electron effective state density and hole effective state density (NcNv) AlGaAs: AlGaAs And hole effective density of states, which is a function of N _D ⁺ .

That is, it was found that the smaller the impurity level E _D , the more electrons can be stored in the same N _D.

As shown in the prior art, Si and Te are usually used as the n-type dopant, and in this case, it has been known that E _D largely depends on the mixed crystal ratio x of Al. That is, Is. [For example, JJAP 11 (1982) L675-L676] From the discussion so far, in order to effectively increase n _s for the same N _D , that is, the same V _Th , it is better to reduce the mole fraction x of Al. It will be good.

However, in the discussion so far, the magnitude of the “deep” ΔE _c of the conduction band energy at the heterojunction interface was ignored. ΔE _c
Is the better, so in this case Al mole fraction x
The larger is better.

That is, to summarize the above, when the same V _Th is given, non-doped Al _x Ga with large ΔE _c at the heterojunction interface.
_The best FET can be obtained by using a _1-x As layer and forming an n-type Al _x Gs _1-x As layer having a small Al mixed crystal ratio away from the interface to form a FET.

That is, according to the present invention, when a selectively doped heterojunction FET is designed by using the heterojunction having the above structure, the maximum current can be obtained when the same threshold voltage is applied.

In other words, the threshold control is a GaAs MESFET because a small amount of impurity doping is required to obtain the same current.
It will be about the same as.

A sectional view of the semiconductor device of the present invention is shown in FIG. Ten
Is a semi-insulating GaAs substrate or p-type GaAs substrate, 11 is undoped
GaAs layer, 12 'is an undoped Al _x Ga _1-x As layer with an Al mixed crystal ratio x in the range of 0.25 ≤ x ≤ 0.4, and 22 has an Al mixed crystal ratio x of 0.05 ≤ x
N-type Al _x Ga _1-x As layer in the range of ≦ 0.2, 19 is a source / drain electrode, and 13 is a gate electrode. The 13th (b) is a graph showing the range of the mixed crystal ratio of Al in the cross section AB.

Example of Invention

The present invention will be described in detail below with reference to the embodiment shown in FIG.

Example 1 On a semi-insulating GaAs substrate 10, molecular beam epitaxy (MB
High purity GaA that is not intentionally doped with impurities using E)
The s layer 11 was grown to a thickness of about 1 μm, and an Al _x Ga _1-x As layer 12 ′ ( _{x to} 0.3) which was not intentionally doped with impurities was grown to 60 Å. Usually, the Al _x Ga _1-x As layer 12 'has an Al mixing ratio of 0.28 ≦ x ≦ 0.
Used in the range of 40. Next, Al _x Ga with a mixed crystal ratio of Al of 0.22
_{The 1-x} As layer 22 is grown to 400 Å, and Si atoms are grown to 1 × 10 ¹⁸
Doped at a concentration of cm ^-3 . Next, the GaAs layer 17 was grown to 200 Å, and Si atoms were doped at a concentration of 1 × 10 ¹⁸ cm ^-3 at this time (Fig. 4 (a). If the impurity concentration of this n-type GaAs layer is too high, This has the effect of reducing the forward barrier of the Schottky gate electrode and reducing the reverse breakdown voltage.

When the doping is lowered, it is necessary to form the n ⁺ layer by the ion implantation method or the like when forming the ohmic electrode.

After the crystal growth, the source / drain electrode 19 and the gate electrodes 13 and 13 'were formed by the photolithography and the lift-off method as in the usual process.

However, when forming the gate electrode 13 ′, CCl ₂ F ₂
After selectively etching the GaAs layer 17 using a mixed gas of He, a gate electrode 13 'was formed (FIG. 4 (b)).
In terms of FET operation, the FET having 13 'as a gate is an enhancement type FET, and the portion of the gate electrode 13 is a depletion type FET.

Ti / Pt / Au was used as the gate electrode, and AuGe / Ni / Au was used as the source / drain electrodes.

In this example, the Al mol of the n-type Al _x Ga _1-x As ( _{x to} 0.22) layer was used.
e fraction x is 0.05 ≦ x when Si-doped
It is used in the range of ≤0.25.

Considering only the threshold control, n-type Al _x G with a small Al mixed crystal ratio x
An n-type GaAs layer is advantageous in place of the a1 _-x As layer. However, this structure has a drawback that it is difficult to form the E type and the D type in the same substrate. That is, there is an advantage that can utilize the selected etching utilizing heterojunction _{n-GaAs / n-Al x} Ga 1-x As as in this embodiment.

〔The invention's effect〕

 The effects of the present invention can be summarized as follows.

(1) In the undoped Al _x Ga _1-x As layer that directly forms a heterojunction with the undoped GaAs layer, Al mole faction x is 0.28 ≦
By setting x ≦ 0.40, the energy difference ΔE _c between the conduction bands of the two can be increased, and a large number of electrons can be trapped at the heterojunction interface.

(2) In the Al mole fraction x of the n-type Al _x Ga _1-x As layer, the concentration of impurities doped to the n-type can be made large by selecting a value of 0.05 ≦ x ≦ 0.25 where the donor level becomes shallow. Therefore, the controllability of the film thickness of this AlGaAs layer becomes easy. As a result, the controllability of the threshold voltage V _Th is improved.

[Brief description of drawings]

FIG. 1 is a diagram showing an energy band structure of a conventional selectively-doped heterojunction FET, and FIG. 2 is a sectional view showing how the conventional enhancement type FET and depletion type FET are separately formed on the same substrate. ) And (b) are cross-sectional views of the transistor of the present invention and a diagram showing the mixed crystal ratio of Al in each layer, and FIG. 15 …… two-dimensional carrier, 12 …… n type Al _x Ga _1-x As, 11 …… non-doped GaAs, 10 …… semi-insulating GaAs, 13 …… gate electrode, 19 …… source / drain electrode, 17 ... n-type GaAs layer,
12 '... non-doped Al _x Ga _1-x As 0.28 ≤ x ≤ 0.40, 22 ...
... n-type Al _x Ga _1-x As (0.05 ≦ x ≦ 0.25).

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshifumi Katayama 1-280, Higashi Koigakubo, Kokubunji, Tokyo (56) References Japanese Patent Laid-Open No. 59-968 (JP, A) Jpn. J. Appl. Phys. 21 [11] (1982-11) PP. L675-L676

Claims (1)

[Claims] 1. An AlGaAs region, a GaAs region, a heterojunction interface formed by joining these regions to each other, and a source electrode and a drain electrode electrically connected to a two-dimensional carrier formed at this heterojunction interface. And a gate electrode for controlling the two-dimensional carrier, the AlGaAs region being the GaAs
In a semiconductor device having a first region that is joined to a region and is not intentionally doped with impurities, and a second region that is joined to the first region and is n-type doped, Al of the first region is provided.
The mixed crystal ratio of Al is in the range of 0.25 to 0.4, and the mixed crystal ratio of Al in the second region is in the range of 0.05 to 0.25.