JPH07131354A - D/a converter - Google Patents

Abstract

PURPOSE:To improve analog output characteristics at the D/A converter by setting the adjacent P channel MOS transistor of an analog switch group equally with an impedance or conductance as the propagation characteristic of an N channel MOS transistor. CONSTITUTION:Concerning a P channel MOS transistor QPm and an N channel MOS transistor Qn1 for which first and second groups G1 and G2 are made adjacent at the border of an analog switch, the parameters of elements are set so as to equalize the propagation characteristics as switches, namely, to equalize these ON resistances. Concretely, concerning the transistors QPm and Qn1, a drain current IDSP of the former is equal with a drain current IDSA of the latter on the same bias conditions, and the relation between channel width Wp and channel length Lp of the QPm and channel width Wn and channel length Ln of the Qn1 is set to Wp/Lp:Wn/Ln=3:1, for example. Thus, the same impedance is generated at two transistors.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resistance voltage dividing type D / A converter using a MOS transistor as an analog switch.

[0002]

2. Description of the Related Art A resistance voltage divider type D / A converter is composed of a decoder for decoding digital data, a resistance voltage divider circuit, and a group of analog switches controlled by the decoder output to selectively take out the voltage divider circuit output. It In many cases, the analog switch is configured by connecting a p-channel MOS transistor and an n-channel MOS transistor in parallel. If an analog switch is configured with only one of p-channel and n-channel transistors, as shown in FIG. 2, for example, a linear switch operation is performed in the entire range of 0 to 5 V required for conversion operation. This is because it will not be possible. This is due to the substrate effect. However, in the case of a D / A converter, the voltage level passing through each analog switch is fixed, so by using different MOS transistors depending on the voltage level, even with a single-element analog switch, the specified voltage range The voltage can be transmitted by. Therefore, an analog switch using a p-channel MOS transistor on the high level output side and a n-channel MOS transistor on the lower level output side in a predetermined range is arranged.

[0003]

The output impedance of a MOS transistor is affected by the transistor shape, carrier mobility, substrate effect and the like. Therefore, as described above, in the case where the analog switch group of the D / A converter is configured by properly using the p-channel MOS transistor and the n-channel MOS transistor, if the transistors have the same shape, the following problem occurs. At the boundary between the region where the p-channel MOS transistor is used and the region where the n-channel MOS transistor is used, the p-channel MOS transistor and the n-channel MOS transistor are connected.
The output impedance changes abruptly when the transistor is switched on and off. Due to the sudden change in the output impedance, the analog output characteristic is adversely affected by distortion or the like. There is also a problem that the output waveform becomes discontinuous at the boundary where the output impedance suddenly changes due to external noise or leakage of an external capacitor. For example, even if digital data whose output is a sine wave is input, the output has a discontinuous and distorted waveform as shown in FIG.

In view of the above points, it is an object of the present invention to provide a D / A converter having an improved analog output characteristic.

[0005]

SUMMARY OF THE INVENTION The present invention is a decoder,
It has a resistance voltage dividing circuit and an analog switch group which is controlled by the decoder output and selectively takes out the voltage dividing circuit output, and the first group on the high level output side of the analog switch group is constituted by a p-channel MOS transistor. And the second group on the lower level output side is an n-channel MO
In a D / A converter composed of S transistors, the propagation characteristics, that is, impedance or conductance, of the p-channel MOS transistor and the n-channel MOS transistor adjacent to each other at the boundary between the first group and the second group of the analog switch group are set to be equal. It is characterized by being.

[0006]

According to the present invention, the p-channel MOS transistor and the n-channel MOS transistor which are adjacent to each other at the boundary between the region where the p-channel MOS transistor and the region where the n-channel MOS transistor are used in the analog switch group are adjacent to each other. Since the propagation characteristics are set equal, the output impedance does not suddenly change at this boundary. This prevents analog output waveform distortion and the like.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a resistance voltage dividing type D / according to an embodiment of the present invention.
It is an A converter. As shown, the D / A converter includes a decoder 1 for decoding digital input data,
It is composed of a resistance voltage dividing circuit 2 as a voltage generating circuit and an analog switch group using MOS transistors.
In the analog switch group, m pieces of the first group G1 for taking out an output in a predetermined range on the high level side of the resistance voltage dividing circuit 2 are constituted by p channel MOS transistors Qp1, Qp2, ... Second group G2 to take output
Are n-channel MOS transistors Qn1, Qn2,
…, Qnm. Here, the case where the first group G1 and the second group G2 of the analog switches are equal to each other by m is illustrated, but this is merely an example, and it is not always necessary that the numbers are equal.

The output of the decoder 1 is supplied via the buffer circuit 3 to the gates of the MOS transistors forming each analog switch. The buffer circuit 3 includes p-channel MOS transistors Qp1, Qp2, ..., Q as shown in the figure.
An inverting buffer is used for pm and n-channel MO
A non-inverting buffer is used for the S transistors Qn1, Qn2, ..., Qnm.

In this embodiment, the p-channel M adjacent to each other at the boundary between the first group G1 of analog switches and the second group G2 of analog switches.
The device parameters of the OS transistor Qpm and the n-channel MOS transistor Qn1 are set so that the propagation characteristics as a switch become equal, that is, the ON resistances of both become equal. Specifically, MO
The drain current I _DS of the S transistor is represented by the following general formula.

[0010]

[Number 1] _{I DS = (μC 0 W /} L) {(V GS -V T) V DS -V DS 2/2} V T = V T0 + γ | V BS | 1/2

However, in the above equation, μ is carrier mobility, C ₀ is a constant, W is channel width, L is channel length, and V is
_GS is a gate-source voltage, V _DS is a drain-source voltage, V _BS is a substrate-source voltage, V _T is a threshold voltage, V _T0 is a threshold voltage when V _BS = 0, γ Is a constant. In the case of n-channel MOS transistor, V _GS , V
_{Since DS} and γ are positive and V _BS is negative, these polarities are reversed in the p-channel MOS transistor.

Therefore, the p-channel MOS transistor Q
For pm and n-channel MOS transistor Qn1, the channel width Wp and channel length Lp of p-channel MOS transistor Qpm are set so that the former drain current I _DSP and the latter drain current I _DSN are equal under the same bias condition. The relationship between the channel width Wn and the channel length Ln of the n-channel MOS transistor Qn1 is set. Specifically, for example, Wp / Lp: Wn / Ln = 3: 1. As a result, the p-channel MOS transistor Qpm and the n-channel MOS transistor Qn1 have the same impedance.

Analog switch p-channel MOS transistor Qpm of the first group G1 and n-channel MO of the second group G2
By setting the relationship of the S transistor Qn1 as described above, the abrupt change of the output impedance disappears in the analog output region where these ON and OFF are switched. Therefore, according to the D / A converter of this embodiment, an excellent output waveform without distortion can be obtained.

The analog switch first group G1 and the second group
Not only the boundary portion of the group G2 but also all the MOS transistors may be set so as to satisfy the above relationship. In this way, the condition of constant output impedance is satisfied in the range of all output levels, and more preferable output characteristics can be obtained.

[0015]

As described above, according to the present invention, the analog output characteristics are set by setting the impedance or the conductance as the propagation characteristics of the adjacent p-channel MOS transistor and n-channel MOS transistor of the analog switch group to be equal. An improved D / A converter can be obtained.

[Brief description of drawings]

FIG. 1 is a diagram showing a D / A converter according to an embodiment of the present invention.

FIG. 2 is a diagram showing characteristics of a MOS transistor switch.

FIG. 3 is a waveform diagram for explaining a conventional problem.

[Explanation of symbols]

1 ... Decoder, 2 ... Resistance voltage dividing circuit, 3 ... Buffer circuit,
G1 ... Analog switch first group, G2 ... Analog switch second group, Qp1, Qp2, ..., Qpm ... p-channel MOS transistor, Qn1, Qn2, ..., Qnm ... n-channel MOS
Transistor.

Claims (1)

[Claims] 1. A decoder, a resistance voltage dividing circuit, and an analog switch group which is controlled by the decoder output and selectively takes out the voltage dividing circuit output. The analog switch group is a first group on the high level output side. In a D / A converter in which the second group on the lower level output side is composed of n-channel MOS transistors, in the boundary between the first group and the second group of the analog switch group. D / A characterized in that the impedance or conductance of the p-channel MOS transistor and the n-channel MOS transistor adjacent to each other are set equal
converter.