JPH07122721A - Solid-state image pickup element and its manufacture - Google Patents

Solid-state image pickup element and its manufacture

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Publication number
JPH07122721A
JPH07122721A JP5285757A JP28575793A JPH07122721A JP H07122721 A JPH07122721 A JP H07122721A JP 5285757 A JP5285757 A JP 5285757A JP 28575793 A JP28575793 A JP 28575793A JP H07122721 A JPH07122721 A JP H07122721A
Authority
JP
Japan
Prior art keywords
film
charge transfer
photoelectric conversion
insulating film
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5285757A
Other languages
Japanese (ja)
Other versions
JP2621773B2 (en
Inventor
Kazuma Minami
数馬 南
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5285757A priority Critical patent/JP2621773B2/en
Priority to US08/319,101 priority patent/US5492852A/en
Priority to KR1019940025760A priority patent/KR100218849B1/en
Publication of JPH07122721A publication Critical patent/JPH07122721A/en
Application granted granted Critical
Publication of JP2621773B2 publication Critical patent/JP2621773B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To suppress the occurrence of smears by making the clearance between a silicon substrate and light shielding film narrower. CONSTITUTION:An n-type area 105 which becomes a photoelectric conversion section and another n-type area 104 which becomes a charge transferring area are provided in the surface area of a first p-type well layer 102 on an n-type silicon substrate 101. Then a first charge transferring electrode 109 is provided on the substrate 101 with a gate insulating film composed of an oxide film 106, nitride film 107, and oxide film 108 in between and a second charge transferring electrode 113 is provided on the electrode 109 with an interlayer insulating film 112 in between. Thus only the gate insulating film can be interposed between the substrate 101 and a light shielding film 116 at the part where the substrate 101 and film 116 face the photoelectric conversion section.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、光電変換により生成さ
れた信号電荷を転送する電荷転送部に電荷結合素子(C
CD)を用いた固体撮像素子に関し、特に、スミアを低
減できる構造の固体撮像素子およびその製造方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge-coupled device (C) for a charge transfer section for transferring signal charges generated by photoelectric conversion.
The present invention relates to a solid-state image sensor using a CD, and more particularly to a solid-state image sensor having a structure capable of reducing smear and a manufacturing method thereof.

【0002】[0002]

【従来の技術】固体撮像素子は、フォトダイオード等に
より構成される光電変換部において入射光を光電変換
し、生成された信号電荷を電荷転送部に読み出して転送
し、出力部において信号電荷を電圧信号に変換して出力
するものである。この固体撮像素子に特有の現象として
スミアと呼ばれる偽信号発生機構がある。これは、電荷
転送部およびその周辺に侵入した光が光電変換され、こ
れにより生成された電荷が信号電荷に混入して偽信号と
して出力される現象である。
2. Description of the Related Art A solid-state image pickup device photoelectrically converts incident light in a photoelectric conversion part formed of a photodiode or the like, reads the generated signal charge to a charge transfer part and transfers the signal charge, and outputs the signal charge to a voltage. It is converted into a signal and output. A phenomenon peculiar to this solid-state image sensor is a false signal generating mechanism called smear. This is a phenomenon in which light that has entered the charge transfer unit and its periphery is photoelectrically converted, and the charges generated thereby are mixed with the signal charges and output as a false signal.

【0003】図6(a)〜(c)乃至図7(a)〜
(c)は、従来の固体撮像素子の製造方法を説明するた
めの工程断面図である。まず、n型シリコン基板201
にボロンのイオン注入を行い高温の熱処理を行って第1
のp型ウェル層202を形成し[図6(a)]、続い
て、第1のp型ウェル層202の表面領域内に第2のp
型ウェル層203、電荷転送領域を構成するn型領域2
04、光電変換部を構成するn型領域205を形成する
[図6(b)]。ここで、第2のp型ウェル層203
は、n型領域204、205間がパンチスルーするのを
防止するためおよびn型領域204のチャネルポテンシ
ャルをコントロールするために設けられる半導体領域で
ある。次に、熱酸化を行ってゲート酸化膜となるシリコ
ン酸化膜206を形成した後、多結晶シリコン膜を堆積
しこれをパターニングして第1電荷転送電極209を形
成する。続いて、フォトレジストおよび第1電荷転送電
極209をマスクとしてボロンをイオン注入して、光電
変換部のn型領域205の表面に浅いp型領域210を
形成し、その後、第1電荷転送電極209をマスクとし
てエッチングを行い露出している熱酸化膜206を除去
する[図6(c)]。
6 (a) to 6 (c) to 7 (a) to
(C) is a process sectional view for explaining a conventional method for manufacturing a solid-state imaging device. First, the n-type silicon substrate 201
Ion implantation of boron and high temperature heat treatment
The p-type well layer 202 of FIG. 6A is formed [FIG. 6A], and then the second p-type well layer 202 is formed in the surface region of the first p-type well layer 202.
Type well layer 203, n-type region 2 forming charge transfer region
04, the n-type area | region 205 which comprises a photoelectric conversion part is formed [FIG.6 (b)]. Here, the second p-type well layer 203
Is a semiconductor region provided to prevent punch-through between the n-type regions 204 and 205 and to control the channel potential of the n-type region 204. Next, thermal oxidation is performed to form a silicon oxide film 206 to be a gate oxide film, and then a polycrystalline silicon film is deposited and patterned to form a first charge transfer electrode 209. Subsequently, boron is ion-implanted using the photoresist and the first charge transfer electrode 209 as a mask to form a shallow p-type region 210 on the surface of the n-type region 205 of the photoelectric conversion unit, and then the first charge transfer electrode 209. Using the as a mask, etching is performed to remove the exposed thermal oxide film 206 [FIG. 6 (c)].

【0004】次に、熱酸化を行って、ゲート酸化膜を形
成し、多結晶シリコンの堆積およびそのパターニングに
より第2電荷転送電極(図示なし)を形成する。続い
て、熱酸化を行って第1の層間絶縁膜212を形成する
[図7(a)]。この熱酸化工程および先のゲート酸化
膜形成工程において、第1電荷転送電極209下にも酸
化膜が形成されるため第1電荷転送電極の周囲が反り上
がる。この状態のままだと次の遮光膜形成材料の被着工
程においてカバレッジが悪化し、また遮光膜のパターニ
ング時にエッチング残りが発生する可能性が高くなる。
これを避けるために、段差緩和層として第2の層間絶縁
膜215を形成し[図7(b)]、続いて遮光膜216
を形成する[図7(c)]。
Next, thermal oxidation is performed to form a gate oxide film, and a second charge transfer electrode (not shown) is formed by depositing polycrystalline silicon and patterning the same. Then, thermal oxidation is performed to form a first interlayer insulating film 212 [FIG. 7 (a)]. In the thermal oxidation process and the previous gate oxide film formation process, an oxide film is formed below the first charge transfer electrode 209, so that the periphery of the first charge transfer electrode is warped. If this state is left as it is, the coverage is deteriorated in the next step of depositing the light-shielding film forming material, and there is a high possibility that an etching residue will occur when the light-shielding film is patterned.
To avoid this, a second interlayer insulating film 215 is formed as a step reducing layer [FIG. 7 (b)], and then the light shielding film 216 is formed.
Are formed [FIG. 7 (c)].

【0005】[0005]

【発明が解決しようとする課題】上述した従来の固体撮
像素子では、電荷転送電極と遮光膜との間の耐圧を確保
するために、そして電荷転送電極の周囲の反り上がりに
よる段差を緩和するために、電荷転送電極上には例えば
膜厚3000〜4000Åの層間絶縁膜が形成される。
而して従来例では、シリコン基板上にも電荷転送電極上
と同様の層間絶縁膜が形成され、そしてこの膜厚が先に
形成されたゲート絶縁膜に加わるため、シリコン基板と
遮光膜との間には大きな間隙が生じることになる。シリ
コン基板と遮光膜との間の距離が大きいことは、斜め方
向に入射して光電変換部外に漏れ込む光成分を増加させ
ることになり、スミアの増加を招く。したがって、この
発明の目的とするところは、シリコン基板と遮光膜との
間の距離を極力小さくしてスミア特性の改善を図ること
である。
In the above-mentioned conventional solid-state image pickup device, in order to secure the withstand voltage between the charge transfer electrode and the light shielding film, and to alleviate the step due to the warp around the charge transfer electrode. Further, an interlayer insulating film having a film thickness of 3000 to 4000 Å is formed on the charge transfer electrode.
Thus, in the conventional example, the same interlayer insulating film as that on the charge transfer electrode is formed on the silicon substrate, and this film thickness is added to the gate insulating film formed earlier, so that the silicon substrate and the light shielding film are not formed. There will be a large gap between them. The large distance between the silicon substrate and the light-shielding film increases the light component that is obliquely incident and leaks to the outside of the photoelectric conversion unit, resulting in an increase in smear. Therefore, it is an object of the present invention to improve the smear characteristic by minimizing the distance between the silicon substrate and the light shielding film.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するた
め、本発明によれば、半導体基板の表面領域内に複数個
の光電変換部(105)からなる光電変換部列と、該光
電変換部列に並んで該光電変換部列の信号電荷を転送す
る電荷転送部の電荷転送領域(104)とが形成され、
半導体基板上に前記光電変換部の電荷転送電極(10
9、113)と該電荷転送電極および前記光電変換部上
の一部を覆う遮光膜(116)とが形成されている固体
撮像素子において、光電変換部上を覆う部分の前記遮光
膜と半導体基板との間にはゲート絶縁膜(106、10
7、108)と同等あるいはそれ以下の膜厚の絶縁膜
(106、107、114)が介在しているのみである
ことを特徴とする固体撮像素子が提供される。
In order to achieve the above object, according to the present invention, a photoelectric conversion section array comprising a plurality of photoelectric conversion sections (105) in a surface region of a semiconductor substrate, and the photoelectric conversion section. And a charge transfer region (104) of the charge transfer unit for transferring the signal charge of the photoelectric conversion unit column is formed in line,
A charge transfer electrode (10) of the photoelectric conversion unit is formed on a semiconductor substrate.
9, 113) and a light-shielding film (116) for covering the charge transfer electrode and a part of the photoelectric conversion part, and in the solid-state imaging device, the part of the light-shielding film for covering the photoelectric conversion part and the semiconductor substrate. And the gate insulating film (106, 10
(7, 108) and an insulating film (106, 107, 114) having a film thickness equal to or less than that of (7, 108) is only interposed.

【0007】また、本発明によれば、半導体基板の表面
領域内に複数個の光電変換部(105)からなる光電変
換部列と、該光電変換部列に並ぶ、該光電変換部列の信
号電荷を転送する電荷転送部の電荷転送領域(104)
とを形成する工程と、半導体基板上にシリコン酸化膜
(106)、シリコン窒化膜(107)およびシリコン
酸化膜(108)からなるゲート絶縁膜を形成する工程
と、前記電荷転送領域上を覆う第1層の電荷転送電極
(109)を形成する工程と、前記第1層の電荷転送電
極上のみに第1の層間絶縁膜(112)を形成する工程
と、前記電荷転送領域上に第2層の電荷転送電極(11
3)を形成する工程と、前記第2層の電極転送電極上に
のみ第2の層間絶縁膜(115)を形成する工程と、前
記第1層および第2層の電荷転送電極上を覆い、かつ前
記光電変換部上の一部を覆う遮光膜(116)を形成す
る工程と、を含むことを特徴とする固体撮像素子の製造
方法が提供される。
Further, according to the present invention, a photoelectric conversion section array including a plurality of photoelectric conversion sections (105) in the surface region of the semiconductor substrate, and signals of the photoelectric conversion section array arranged in the photoelectric conversion section array. Charge transfer region (104) of the charge transfer unit for transferring charges
A step of forming a gate insulating film made of a silicon oxide film (106), a silicon nitride film (107) and a silicon oxide film (108) on the semiconductor substrate, and a step of covering the charge transfer region. Forming a first layer charge transfer electrode (109), forming a first interlayer insulating film (112) only on the first layer charge transfer electrode, and forming a second layer on the charge transfer region. Charge transfer electrode (11
3), a step of forming a second interlayer insulating film (115) only on the electrode transfer electrodes of the second layer, and a step of covering the charge transfer electrodes of the first and second layers, And a step of forming a light-shielding film (116) that covers a part of the photoelectric conversion unit, and a method for manufacturing a solid-state imaging device.

【0008】[0008]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。図1(a)は、本発明の一実施例の固体撮
像素子の一画素の構成を示す平面図であり、図1(b)
はそのA−A′線での断面図である。図1において、1
01はn型シリコン基板、102は第1のp型ウェル
層、103は第2のp型ウェル層、104は、電荷転送
部(垂直CCD)の電荷転送領域を構成するn型領域、
105は光電変換を行うフォトダイオードのn型領域、
106は熱酸化により形成されたシリコン酸化膜、10
7はCVD法にて形成されたシリコン窒化膜、108は
第1のCVD酸化膜、109は多結晶シリコン膜からな
る、電荷転送部の第1電荷転送電極、110は、光電変
換部のn型領域105の表面をシリコンと酸化膜との界
面から分離して暗電流を低減させるための浅いp型領
域、112は第1電荷転送電極109の表面を熱酸化す
ることにより形成した第1の層間絶縁膜、113は多結
晶シリコン膜からなる、電荷転送部の第2電荷転送電
極、114は第3のCVD酸化膜、115は第2電荷転
送電極113の表面を熱酸化することにより形成した第
2の層間絶縁膜、116はタングステンからなる遮光膜
である。
Embodiments of the present invention will now be described with reference to the drawings. FIG. 1A is a plan view showing the configuration of one pixel of a solid-state image sensor according to one embodiment of the present invention, and FIG.
Is a sectional view taken along the line AA ′. In FIG. 1, 1
01 is an n-type silicon substrate, 102 is a first p-type well layer, 103 is a second p-type well layer, 104 is an n-type region forming a charge transfer region of a charge transfer unit (vertical CCD),
Reference numeral 105 denotes an n-type region of a photodiode that performs photoelectric conversion,
106 is a silicon oxide film formed by thermal oxidation, 10
7 is a silicon nitride film formed by a CVD method, 108 is a first CVD oxide film, 109 is a polycrystalline silicon film, and a first charge transfer electrode of a charge transfer portion, 110 is an n-type of a photoelectric conversion portion. A shallow p-type region for separating the surface of the region 105 from the interface between the silicon and the oxide film to reduce dark current, and 112 is a first interlayer formed by thermally oxidizing the surface of the first charge transfer electrode 109. An insulating film, 113 is a polycrystalline silicon film, a second charge transfer electrode of the charge transfer section, 114 is a third CVD oxide film, and 115 is a first charge transfer electrode formed by thermally oxidizing the surface of the second charge transfer electrode 113. The second interlayer insulating film 116 is a light shielding film made of tungsten.

【0009】この実施例の特徴的な点は、光電変換部
(105、110)上では遮光膜116とシリコン基板
との間にはゲート絶縁膜と同等の絶縁膜が介在している
のみであることである。そして、ゲート絶縁膜は300
〜1000Å程度に形成されるため、シリコン基板−遮
光膜間の距離を従来に比較して数千Å小さくすることが
できる。而して、スミアは、図2に示すように、遮光膜
とシリコン基板間の距離Xに対してほぼ直線的に変化す
るものであるため、距離Xを小さくすることはスミア削
減に極めて有効であり、本実施例により、10〜15d
Bのスミアの改善を実現することができた。
A characteristic point of this embodiment is that an insulating film equivalent to a gate insulating film is interposed between the light shielding film 116 and the silicon substrate on the photoelectric conversion parts (105, 110). That is. The gate insulating film is 300
Since it is formed to about 1000 Å, the distance between the silicon substrate and the light-shielding film can be reduced by several thousand Å as compared with the conventional one. As shown in FIG. 2, smear changes almost linearly with respect to the distance X between the light-shielding film and the silicon substrate. Therefore, reducing the distance X is extremely effective in reducing smear. Yes, according to this embodiment, 10 to 15d
The smear of B was improved.

【0010】次に、本実施例の製造方法について、図3
(a)〜(d)、図4(a)〜(c)および図5(a)
〜(c)を参照して説明する。まず、図3(a)に示す
ように、n型シリコン基板101の表面にボロンをイオ
ン注入し、その後高温(1200℃程度)の熱処理を行
って第1のp型ウェル層102を形成する。次に、図3
(b)に示すように、フォトレジストをマスクにp型不
純物とn型不純物のイオンを注入して第2のp型ウェル
層103と電荷転送部の電荷転送領域となるn型領域1
04を形成する。次に、フォトレジストをマスクにn型
不純物のイオン注入を行って光電変換部のn型領域10
5を形成する。
Next, the manufacturing method of this embodiment will be described with reference to FIG.
(A)-(d), FIG. 4 (a)-(c) and FIG. 5 (a).
This will be described with reference to (c). First, as shown in FIG. 3A, boron is ion-implanted into the surface of the n-type silicon substrate 101, and then heat treatment at high temperature (about 1200 ° C.) is performed to form the first p-type well layer 102. Next, FIG.
As shown in (b), ions of p-type impurities and n-type impurities are implanted using a photoresist as a mask to form the second p-type well layer 103 and the n-type region 1 to be the charge transfer region of the charge transfer portion.
To form 04. Next, ion implantation of n-type impurities is performed using the photoresist as a mask to perform n-type region 10 of the photoelectric conversion portion.
5 is formed.

【0011】続いて、図3(c)に示すように、熱酸化
法によりシリコン酸化膜106を200〜700Åの膜
厚に形成し、その上にCVD法によりシリコン窒化膜1
07を50〜300Åの膜厚に、同じくCVD法により
第1のCVD酸化膜108を50〜300Åの膜厚にそ
れぞれ成長させて第1のゲート絶縁膜を形成する。次
に、図3(d)に示すように、第1の多結晶シリコン膜
をCVD法で形成した後、これをドライ法により所定の
形状にパターニングして第1電荷転送電極109を形成
する。その後フォトレジストと第1電荷転送電極109
をマスクにp型不純物をイオン注入して光電変換部のn
型領域105の表面にこの領域を埋め込み型にするため
の浅いp型領域110を形成する。
Subsequently, as shown in FIG. 3C, a silicon oxide film 106 is formed to a thickness of 200 to 700 Å by a thermal oxidation method, and a silicon nitride film 1 is formed thereon by a CVD method.
07 is grown to a film thickness of 50 to 300Å, and the first CVD oxide film 108 is grown to a film thickness of 50 to 300Å by the CVD method to form a first gate insulating film. Next, as shown in FIG. 3D, after forming a first polycrystalline silicon film by a CVD method, this is patterned into a predetermined shape by a dry method to form a first charge transfer electrode 109. After that, the photoresist and the first charge transfer electrode 109
P-type impurities are ion-implanted using the mask as a mask
A shallow p-type region 110 is formed on the surface of the mold region 105 to make this region an embedded type.

【0012】次に、第1電荷転送電極109をマスクに
第1のCVD酸化膜108をウェット法で除去する。そ
の後、図4(a)に示すように、CVD法により第2の
CVD酸化膜111を50〜300Åの膜厚に形成し
て、シリコン酸化膜106、シリコン窒化膜107およ
び第2のCVD酸化膜111の積層体で第2のゲート絶
縁膜を形成する。次に、図4(b)に示すように、シリ
コン窒化膜107をマスクに熱酸化を行って第1電荷転
送電極109の表面に膜厚2000〜4000Åの第1
の層間絶縁膜112を形成する。続いて、図4(c)に
示すように、CVD法により第2の多結晶シリコン膜を
堆積しフォトリソグラフィ法により所定の形状にパター
ニングして第2の電荷転送電極113を形成する。
Next, the first CVD oxide film 108 is removed by a wet method using the first charge transfer electrode 109 as a mask. Thereafter, as shown in FIG. 4A, a second CVD oxide film 111 is formed to a thickness of 50 to 300 Å by the CVD method, and the silicon oxide film 106, the silicon nitride film 107, and the second CVD oxide film are formed. A second gate insulating film is formed with a stacked body of 111. Next, as shown in FIG. 4B, thermal oxidation is performed using the silicon nitride film 107 as a mask to form a first film having a film thickness of 2000 to 4000 Å on the surface of the first charge transfer electrode 109.
The interlayer insulating film 112 is formed. Subsequently, as shown in FIG. 4C, a second polycrystalline silicon film is deposited by a CVD method and patterned into a predetermined shape by a photolithography method to form a second charge transfer electrode 113.

【0013】次に、第2電荷転送電極113をマスクに
第2のCVD酸化膜111をウェット法で除去する。そ
の後、図5(a)に示すように、CVD法により第3の
CVD酸化膜114を50〜300Åの膜厚に形成し
て、第1、第2電荷転送電極で覆われていないシリコン
基板上にシリコン酸化膜106、シリコン窒化膜107
および第3のCVD酸化膜114の積層体からなる絶縁
膜を形成する。次に、図5(b)に示すように、シリコ
ン窒化膜107をマスクに熱酸化を行って第2電荷転送
電極113の表面に膜厚2000〜4000Åの第2の
層間絶縁膜115を形成する。続いて、図5(c)に示
すように、スパッタ法によりタングステンを被着しこれ
を所定の形状にパターニングして遮光膜116を形成す
る。このとき必要に応じて露出した第3のCVD酸化膜
114、シリコン窒化膜107を除去する。
Next, the second CVD oxide film 111 is removed by a wet method using the second charge transfer electrode 113 as a mask. Then, as shown in FIG. 5A, a third CVD oxide film 114 is formed to a thickness of 50 to 300 Å by a CVD method, and the third CVD oxide film 114 is formed on the silicon substrate not covered with the first and second charge transfer electrodes. Silicon oxide film 106 and silicon nitride film 107
Then, an insulating film made of a laminated body of the third CVD oxide film 114 is formed. Next, as shown in FIG. 5B, thermal oxidation is performed using the silicon nitride film 107 as a mask to form a second interlayer insulating film 115 having a film thickness of 2000 to 4000 Å on the surface of the second charge transfer electrode 113. . Subsequently, as shown in FIG. 5C, a light-shielding film 116 is formed by depositing tungsten by a sputtering method and patterning it into a predetermined shape. At this time, the exposed third CVD oxide film 114 and silicon nitride film 107 are removed if necessary.

【0014】以上好ましい実施例について説明したが、
本発明は上記実施例に限定されるものではなく、特許請
求の範囲に記載された本願発明の要旨内において各種の
変更が可能である。例えば、実施例では、ゲート絶縁膜
にシリコン窒化膜を用いていたが必ずしも窒化膜を用い
る必要はなく、シリコン酸化膜とエッチングに選択性が
ありかつ熱酸化に対するマスク性のある絶縁膜であれば
窒化膜に代替することができる。また、第3のCVD酸
化膜114の形成を省略することができる。これにより
シリコン基板−遮光膜間の距離を一層短縮することがで
きる。また、実施例では、2層の多結晶シリコン膜によ
り電荷転送電極を形成していたが、1層あるいは3層の
多結晶シリコン膜を用いて電荷転送電極を構成する場合
にも本発明は適用しうるものである。また、遮光膜をア
ルミニウム等他の金属材料を用いて形成することができ
る。
The preferred embodiment has been described above.
The present invention is not limited to the above-mentioned embodiments, and various modifications can be made within the scope of the present invention described in the claims. For example, in the embodiment, the silicon nitride film is used as the gate insulating film, but it is not always necessary to use the nitride film, as long as the insulating film is selective to the silicon oxide film and has an etching selectivity and a masking property against thermal oxidation. It can be replaced with a nitride film. Further, the formation of the third CVD oxide film 114 can be omitted. Thereby, the distance between the silicon substrate and the light shielding film can be further shortened. Further, in the embodiment, the charge transfer electrode is formed by the two-layer polycrystalline silicon film, but the present invention is also applied to the case where the charge transfer electrode is formed by using the one-layer or three-layer polycrystalline silicon film. It is possible. Further, the light shielding film can be formed using another metal material such as aluminum.

【0015】[0015]

【発明の効果】以上説明したように、本発明の固体撮像
素子は、光電変換部の一部の領域上を覆う遮光膜の下に
は層間絶縁膜は形成されておらず、シリコン基板と遮光
膜間の距離は、高々ゲート絶縁膜分程度であるので、本
発明によれば、遮光膜端部から斜め方向に入射して電荷
転送領域およびその近傍に侵入する光成分を十分に抑制
することができる。したがって、本発明によれば、光電
変換部外において生成される光電変換電荷が原因である
スミアを低く抑えることができる。
As described above, in the solid-state image pickup device of the present invention, the interlayer insulating film is not formed under the light shielding film that covers the partial area of the photoelectric conversion portion, and the solid-state image sensor does not interfere with the silicon substrate. Since the distance between the films is at most about that of the gate insulating film, according to the present invention, it is possible to sufficiently suppress the light component that enters obliquely from the end of the light shielding film and enters the charge transfer region and its vicinity. You can Therefore, according to the present invention, smear caused by photoelectric conversion charges generated outside the photoelectric conversion unit can be suppressed to a low level.

【0016】また、本発明によれば、電荷転送電極(多
結晶シリコン膜)の熱酸化時に電荷転送電荷の端部が反
り上がることがなくなり、基板表面の凹凸が緩和され、
エッチング残りの発生等の不都合が回避される。さら
に、第1電荷転送電極上の第1の層間絶縁膜は第2のゲ
ート絶縁膜の形成工程とは無関係に形成される膜である
ため、十分の膜厚に形成することができるようになり、
第1、第2電荷転送電極間の耐圧を向上させることがで
きる。
Further, according to the present invention, the end portion of the charge transfer charge does not warp during the thermal oxidation of the charge transfer electrode (polycrystalline silicon film), and the unevenness of the substrate surface is alleviated.
Inconveniences such as generation of etching residue are avoided. Further, since the first interlayer insulating film on the first charge transfer electrode is a film formed independently of the step of forming the second gate insulating film, it becomes possible to form the first interlayer insulating film with a sufficient film thickness. ,
The breakdown voltage between the first and second charge transfer electrodes can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の一実施例の平面図と断面図。FIG. 1 is a plan view and a sectional view of an embodiment of the present invention.

【図2】 本発明の一実施例の効果を説明するための特
性図。
FIG. 2 is a characteristic diagram for explaining the effect of one embodiment of the present invention.

【図3】 本発明の一実施例の製造方法を説明するため
の工程断面図の一部。
FIG. 3 is a part of a process cross-sectional view for explaining the manufacturing method according to the embodiment of the present invention.

【図4】 本発明の一実施例の製造方法を説明するため
の工程断面図の一部。
FIG. 4 is a part of a process cross-sectional view for explaining the manufacturing method according to the embodiment of the present invention.

【図5】 本発明の一実施例の製造方法を説明するため
の工程断面図の一部。
FIG. 5 is a part of a process cross-sectional view for explaining the manufacturing method according to the embodiment of the present invention.

【図6】 従来例の製造方法を説明するための工程断面
図の一部。
FIG. 6 is a part of a process cross-sectional view for explaining a conventional manufacturing method.

【図7】 従来例の製造方法を説明するための工程断面
図の一部。
FIG. 7 is a part of a process cross-sectional view for explaining a manufacturing method of a conventional example.

【符号の説明】[Explanation of symbols]

101、201 n型シリコン基板 102、202 第1のp型ウェル層 103、203 第2のp型ウェル層 104、204 電荷転送領域を構成するn型領域 105、205 光電変換部を構成するn型領域 106、206 シリコン酸化膜 107 シリコン窒化膜 108 第1のCVD酸化膜 109、209 第1電荷転送電極 110、210 p型領域 111 第2のCVD酸化膜 112、212 第1の層間絶縁膜 113 第2電荷転送電極 114 第3のCVD酸化膜 115、215 第2の層間絶縁膜 116、216 遮光膜 101, 201 n-type silicon substrate 102, 202 first p-type well layer 103, 203 second p-type well layer 104, 204 n-type region 105, 205 forming a charge transfer region n-type forming a photoelectric conversion unit Regions 106 and 206 Silicon oxide film 107 Silicon nitride film 108 First CVD oxide film 109 and 209 First charge transfer electrode 110 and 210 p-type region 111 Second CVD oxide film 112 and 212 First interlayer insulating film 113 2 charge transfer electrode 114 third CVD oxide film 115, 215 second interlayer insulating film 116, 216 light shielding film

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板の表面領域内に複数個の光電
変換部からなる光電変換部列と、該光電変換部列の信号
電荷を転送する電荷転送部の電荷転送領域とが設けら
れ、半導体基板上に前記光電変換部の電荷転送電極と該
電荷転送電極および前記光電変換部上の一部を覆う遮光
膜とが形成されている固体撮像素子において、光電変換
部上を覆う部分の前記遮光膜と半導体基板との間にはゲ
ート絶縁膜と同等あるいはそれ以下の膜厚の絶縁膜が介
在しているのみであることを特徴とする固体撮像素子。
1. A semiconductor substrate is provided with a photoelectric conversion part array including a plurality of photoelectric conversion parts and a charge transfer region of a charge transfer part for transferring signal charges of the photoelectric conversion part array in a surface region of a semiconductor substrate. In a solid-state imaging device in which a charge transfer electrode of the photoelectric conversion unit and a light shielding film that covers the charge transfer electrode and a portion of the photoelectric conversion unit are formed on a substrate, the light shielding of the portion that covers the photoelectric conversion unit. A solid-state imaging device, wherein an insulating film having a film thickness equal to or less than that of a gate insulating film is interposed between the film and the semiconductor substrate.
【請求項2】 ゲート絶縁膜および前記遮光膜と半導体
基板との間に介在する絶縁膜が、シリコン酸化膜と、シ
リコン酸化膜とはエッチング性が異なりかつ熱酸化に対
するマスク作用のある絶縁膜とを含む積層体であること
を特徴とする請求項1記載の固体撮像素子。
2. The gate insulating film and the insulating film interposed between the light shielding film and the semiconductor substrate are a silicon oxide film and an insulating film having a different etching property from the silicon oxide film and having a masking action against thermal oxidation. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is a laminated body including.
【請求項3】 ゲート絶縁膜および前記遮光膜と半導体
基板との間に介在する絶縁膜が、シリコン酸化膜、窒化
シリコン膜およびシリコン酸化膜の積層体であることを
特徴とする請求項1記載の固体撮像素子。
3. The gate insulating film and the insulating film interposed between the light shielding film and the semiconductor substrate are a laminate of a silicon oxide film, a silicon nitride film and a silicon oxide film. Solid-state image sensor.
【請求項4】 半導体基板の表面領域内に複数個の光電
変換部からなる光電変換部列と、該光電変換部列に並
ぶ、該光電変換部列の信号電荷を転送する電荷転送部の
電荷転送領域とを形成する工程と、半導体基板上にシリ
コン酸化膜、耐酸化性膜およびシリコン酸化膜からなる
ゲート絶縁膜を形成する工程と、前記電荷転送領域上を
覆う第1層の電荷転送電極を形成する工程と、前記第1
層の電荷転送電極上のみに第1の層間絶縁膜を形成する
工程と、前記電荷転送領域上に第2層の電荷転送電極を
形成する工程と、前記第2層の電極転送電極上にのみ第
2の層間絶縁膜を形成する工程と、前記第1層および第
2層の電荷転送電極上を覆い、かつ前記光電変換部上の
一部を覆う遮光膜を形成する工程と、を含むことを特徴
とする固体撮像素子の製造方法。
4. A photoelectric conversion section array comprising a plurality of photoelectric conversion sections in a surface region of a semiconductor substrate, and a charge of a charge transfer section arranged in the photoelectric conversion section array for transferring signal charges of the photoelectric conversion section array. A step of forming a transfer region, a step of forming a gate insulating film made of a silicon oxide film, an oxidation resistant film and a silicon oxide film on a semiconductor substrate, and a first layer charge transfer electrode covering the charge transfer region. And a step of forming
Forming the first interlayer insulating film only on the charge transfer electrode of the layer, forming the second charge transfer electrode on the charge transfer region, and only forming the electrode transfer electrode of the second layer A step of forming a second interlayer insulating film, and a step of forming a light shielding film that covers the charge transfer electrodes of the first layer and the second layer and partially covers the photoelectric conversion unit. And a method for manufacturing a solid-state image sensor.
【請求項5】 前記第1層および第2層の電荷転送電極
が多結晶シリコン膜から構成され、前記第1および第2
の層間絶縁膜の形成工程が前記第1層および第2層の電
荷転送電極の熱酸化工程であることを特徴とする請求項
4記載の固体撮像素子の製造方法。
5. The charge transfer electrodes of the first layer and the second layer are formed of a polycrystalline silicon film, and the first and second charge transfer electrodes are formed.
5. The method for manufacturing a solid-state image sensor according to claim 4, wherein the step of forming the interlayer insulating film is the step of thermally oxidizing the charge transfer electrodes of the first layer and the second layer.
JP5285757A 1993-10-07 1993-10-21 Method for manufacturing solid-state imaging device Expired - Lifetime JP2621773B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP5285757A JP2621773B2 (en) 1993-10-21 1993-10-21 Method for manufacturing solid-state imaging device
US08/319,101 US5492852A (en) 1993-10-07 1994-10-06 Method for fabricating a solid imaging device having improved smear and breakdown voltage characteristics
KR1019940025760A KR100218849B1 (en) 1993-10-07 1994-10-07 Manufacturing method of solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5285757A JP2621773B2 (en) 1993-10-21 1993-10-21 Method for manufacturing solid-state imaging device

Publications (2)

Publication Number Publication Date
JPH07122721A true JPH07122721A (en) 1995-05-12
JP2621773B2 JP2621773B2 (en) 1997-06-18

Family

ID=17695661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5285757A Expired - Lifetime JP2621773B2 (en) 1993-10-07 1993-10-21 Method for manufacturing solid-state imaging device

Country Status (1)

Country Link
JP (1) JP2621773B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011204992A (en) * 2010-03-26 2011-10-13 Sony Corp Solid-state image sensor and method of manufacturing the same, and electronic apparatus

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS648664A (en) * 1987-06-30 1989-01-12 Toshiba Corp Solid-state image sensing device and manufacture thereof
JPH03190272A (en) * 1989-12-20 1991-08-20 Matsushita Electron Corp Solid-state camera device
JPH04137763A (en) * 1990-09-28 1992-05-12 Sony Corp Fit-type solid-state image sensing device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS648664A (en) * 1987-06-30 1989-01-12 Toshiba Corp Solid-state image sensing device and manufacture thereof
JPH03190272A (en) * 1989-12-20 1991-08-20 Matsushita Electron Corp Solid-state camera device
JPH04137763A (en) * 1990-09-28 1992-05-12 Sony Corp Fit-type solid-state image sensing device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011204992A (en) * 2010-03-26 2011-10-13 Sony Corp Solid-state image sensor and method of manufacturing the same, and electronic apparatus
US8530945B2 (en) 2010-03-26 2013-09-10 Sony Corporation Solid-state image pickup element, method of manufacturing the same, and electronic apparatus
US8901618B2 (en) 2010-03-26 2014-12-02 Sony Corporation Solid-state image pickup element, method of manufacturing the same, and electronic apparatus

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