JP2006253480A - Solid-state imaging element and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin, high-breakdown-voltage, solid-state imaging element which reduces a reading voltage, and stable and reliable, and also to provide a method for manufacturing the element. <P>SOLUTION: The solid-state imaging element comprises a photoelectric converter formed on a semiconductor substrate and a charge transfer element (CCD) for transferring an electric charge generated by the photoelectric converter. An imaging region is formed in the imaging element. The entire surface of the semiconductor substrate except for part of the imaging region on the substrate is covered with a film (ONO) of a stacked layer structure including: a bottom oxide film made of a silicon oxide (SiO) film formed on the semiconductor substrate; a silicon nitride (SiN) film formed on the bottom oxide film; and a top oxide film made of a silicon oxide (SiO) film formed on the silicon nitride film. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a solid-state imaging device and a method for manufacturing the same, and more particularly to a structure of a gate oxide film.

  A conventional solid-state imaging device includes a photodiode portion and a charge transfer device (CCD) in a p-well (not shown) formed on the surface of the semiconductor substrate 1 as shown in an example of a cross-sectional structure in FIG. A transfer channel formed of an n-type impurity region (not shown) by applying a voltage to the charge transfer electrode of the charge transfer unit. And reading out sequentially. In the charge transfer unit, the charge generated in the photodiode unit is guided to a transfer channel including an n-type impurity region, and a silicon oxide film (SiO) 2a, a silicon nitride film (SiN) 2b, and a silicon oxide film 2c are formed on the upper layer. A structure in which voltage is sequentially applied by applying a voltage to a gate electrode (charge transfer electrode) 3 as a charge transfer electrode and readout electrode (hereinafter referred to as readout electrode) formed through a gate oxide film 2 having a three-layer structure. It has become.

  Thus, the gate oxide film under the readout electrode of the solid-state imaging device has a so-called ONO structure in which a silicon nitride film that is a high breakdown voltage gate is sandwiched between silicon oxide films. In recent solid-state imaging devices that have been miniaturized, a thin and high-breakdown-voltage gate oxide film is indispensable, and the use of this structure, that is, a gate oxide film having an ONO structure (hereinafter referred to as an ONO film) is for gate thinning. It is an essential structure. Further, a silicon oxide film 5 formed by thermal oxidation and a silicon oxide film 6 formed by CVD are formed on the upper layer of the charge transfer electrode of the charge transfer unit 40, and a light shielding with an opening formed in a region corresponding to the photodiode 30 above. A membrane 7 is provided. Reference numeral 10 denotes a BPSG film as a flattening film, 70 denotes a flattening film, and 50 denotes a color filter. A microlens 60 is formed on the color filter 50 via a flattening film 80.

In the solid-state imaging device having this structure, when light is incident on the pixel portion, photoelectric conversion is performed in the n-type impurity region to generate a signal charge, and a readout pulse is applied to the gate electrode 3 that is a charge transfer electrode and readout electrode. And move to the transfer channel.
In this structure, signal charges generated in the vicinity of the substrate surface are accelerated and read out by an electric field generated by a read pulse.

  In addition, in order to improve the initial characteristics, in order to suppress dark current in the photodiode portion (photoelectric conversion portion) and stabilize the characteristics, heat treatment is performed while supplying hydrogen sufficiently immediately before forming the color filter. The so-called hydrogen annealing for performing is an extremely important part for stabilizing the initial characteristics of the device (Patent Document 1). Therefore, on the photodiode, the upper two layers of the ONO film 2, that is, the silicon nitride film 2b are removed to form a single layer film to form a hydrogen passage. However, an antireflection film is essential on the photodiode, and a method of re-forming a silicon nitride film as an antireflection film on the photodiode is employed.

JP 2003-332556 A

  By the way, in the logic device, the ONO film is about 20 nm, whereas in the CCD, the applied voltage is high as described above, so the gate oxide film must be formed thick and may be 80 nm or more. . Accordingly, the bottom oxide film may be about 5 nm in the logic device, but may be 25 nm or more in the CCD.

  By adopting a structure using such a thick gate oxide film, a high breakdown voltage can be achieved. However, in the readout section for readout of charges, the readout of charges is performed through this gate oxide film, and it is necessary to increase the readout voltage.

  Further, as described above, in order to suppress the dark current in the photodiode portion and stabilize the characteristics, in order to form a hydrogen passage in hydrogen annealing, the silicon nitride film of the gate oxide film is once removed, A method of forming a hydrogen passage for hydrogen annealing and re-forming a silicon nitride film as an antireflection film on the photodiode is employed. This requires formation of an antireflection film and a patterning process in addition to photolithography and etching for removal.

  As described above, in a conventional solid-state imaging device, there is a problem that a read voltage increases when an attempt is made to obtain a high breakdown voltage gate structure. On the other hand, it is necessary to realize hydrogen annealing for improving initial characteristics. The removal of the gate oxide film and the re-formation of the silicon nitride film as the antireflection film have hindered the reduction in man-hours.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a thin high-voltage solid-state imaging device with stable initial characteristics and high reliability.
Another object of the present invention is to provide a solid-state imaging device having a high breakdown voltage and a low readout voltage.

  It is another object of the present invention to provide a method for manufacturing a solid-state imaging device that is easy to manufacture and highly reliable.

A solid-state imaging device of the present invention includes a photoelectric conversion unit formed on a semiconductor substrate and a charge transfer device (CCD) that transfers charges formed by the photoelectric conversion unit, and forms a solid-state imaging region. An imaging device, wherein the entire surface of the semiconductor substrate excluding a part of the imaging region on the surface of the semiconductor substrate is a bottom oxide film made of a silicon oxide (SiO) film formed on the surface of the semiconductor substrate, and the bottom oxidation A laminated structure (ONO) film including a silicon nitride (SiN) film formed on the film and a top oxide film made of a silicon oxide (SiO) film formed on the silicon nitride film is covered.
According to this configuration, since the gate oxide film is substantially composed of an ONO structure, the silicon nitride of the gate oxide film plays the role of an antireflection film without forming an antireflection film separately. It is possible to provide a solid-state imaging device excellent in the above. In particular, if the gate oxide film has a single layer structure in the read region, the read voltage can be reduced.

The solid-state imaging device of the present invention includes one in which the entire surface of the photoelectric conversion unit in the imaging region is covered with an ONO film.
According to this configuration, if the entire surface of the photoelectric conversion unit that requires the antireflection film is covered with the ONO film, the reliability can be improved.

The solid-state imaging device of the present invention includes one in which the charge extraction region of the imaging region is composed of a gate oxide film made of a single layer film.
According to this configuration, the read voltage can be reduced as described above, and a hydrogen passage in the hydrogen annealing performed for stabilizing the initial characteristics is formed in this single layer film portion.

The solid-state imaging device of the present invention includes a solid-state imaging device in which a gate oxide film is formed of a single layer film at at least one location in the imaging region.
The region where the gate oxide film is formed as a single layer film is desirably a charge extraction region, that is, a read gate portion, but is not necessarily a read gate portion and can be changed as appropriate. In this case, a hydrogen passage in the hydrogen annealing is formed in the single layer film portion, so that the initial characteristics can be stabilized.

The solid-state imaging device of the present invention includes a solid-state imaging device in which a gate oxide film is formed of a single layer film at at least one position of the photoelectric conversion portion in the imaging region.
In this case, if a single-layer film portion is provided at least at one location of the photoelectric conversion portion, hydrogen can pass through the single-layer film portion more efficiently in the hydrogen annealing step, and the initial characteristics can be stabilized. I can.

According to the method of the present invention, in the method of manufacturing a solid-state imaging device in which an imaging region for forming a photoelectric conversion unit and a charge transfer device that transfers a charge formed by the photoelectric conversion unit is formed on a semiconductor substrate, the semiconductor substrate Forming a gate oxide film of the charge transfer element on the semiconductor substrate surface, a bottom oxide film made of a silicon oxide (SiO) film, and a silicon nitride (SiN) film formed on the bottom oxide film; And a step of sequentially stacking a top oxide film made of a silicon oxide (SiO) film formed on the silicon nitride film to form a laminated structure (ONO) film, and combining the silicon nitride film and the top oxide film together. A step of selectively removing at a part,
A laminated structure film is formed on the entire surface of the semiconductor substrate excluding a part of the peripheral portion of the imaging region on the surface of the semiconductor substrate.

  According to such a configuration, the laminated structure film is formed on the entire surface of the semiconductor substrate, and the imaging region is covered with the antireflection film (only part of it needs to be removed). It is not necessary to form an anti-reflection film, the workability is good, contamination due to etching is prevented, and a pure and highly transparent anti-reflection film can be maintained.

  Desirably, a thermal oxidation process is used as a process for forming a silicon oxide film as a bottom oxide film, so that a dense bottom oxide film with good film quality can be obtained.

  Further, if the step of forming the silicon oxide film includes the step of forming the silicon oxide film by the CVD method, it can be formed at a lower temperature.

  Preferably, the gate oxide film under the readout gate electrode may have a single layer structure. As a result, since the silicon nitride film is completely removed under the read gate electrode, there is no hot carrier trap.

  Preferably, the selective removal step is chemical dry etching (CDE), so that the silicon nitride film can be easily removed with good controllability.

  Desirably, the selective removal step is isotropic etching using phosphoric acid, whereby the silicon nitride film can be easily removed with good controllability.

  Preferably, after removing the silicon nitride, an oxidation process is performed so that the region from which the silicon nitride has been removed is covered with a silicon oxide film, so that a highly reliable solid-state imaging device can be formed very easily. Is possible.

As described above, according to the solid-state imaging device of the present invention, it is possible to prevent deterioration of initial characteristics and to prevent occurrence of white scratches in the dark. In addition, it is possible to form a solid-state imaging device that is easy to manufacture and has a low readout voltage.
Further, according to the method for manufacturing a solid-state imaging device of the present invention, since the entire substrate surface excluding a part of the imaging region is composed of the gate oxide film (ONO film), there is no need to reattach the antireflection film. An accurate and reliable solid-state imaging device can be formed.

Embodiments of the present invention will be described below with reference to the drawings.
(Embodiment 1)
In this solid-state imaging device, a gate electrode 3 as a charge transfer electrode made of a doped amorphous silicon film is formed through a gate oxide film having an ONO structure on the surface of a silicon substrate 1 as shown in a schematic sectional view in FIG. The gate oxide film is formed on the entire surface of the silicon substrate 1, and includes a bottom oxide film 2a made of a silicon oxide film, a silicon nitride film 2b formed on the bottom oxide film 2a, and a silicon nitride film 2b. It is composed of a laminated structure film composed of a top oxide film 2c made of a silicon oxide film formed thereon, and only the read gate portion 14 on the transfer channel is formed as a single layer film of the bottom oxide film 2a, and the read voltage It is characterized in that the reduction of the above is achieved. Here, the bottom oxide film 2a has a thickness of 10 nm, the silicon nitride film 2b has a thickness of 50 nm, and the top oxide film 2c has a thickness of 8 nm.

  FIG. 1 is a cross-sectional view showing the main part of the solid-state image sensor, and FIG. 2 is a plan view. In this solid-state imaging device, a p-well (not shown) and an n-type semiconductor layer (not shown) are formed on the surface of the element region separated by the element isolation region. A plurality of charge transfer electrodes 3 (3a, 3b) arrayed on the surface of the silicon substrate 1 via the gate oxide film 2 are formed on the gate oxide film 2 at predetermined intervals. The light receiving region of the photodiode 30 serving as a photoelectric conversion portion is covered with a light shielding film 7 having an opening, and the opening is a planarizing film 10 made of a BPSG film formed as an upper layer. Covered with.

  The upper layer of the planarizing film 10 is made of a silicon nitride film (not shown) formed by plasma CVD, and the upper layer is covered with a planarizing film 70 made of a light-transmitting organic film. The upper layer is provided with a color filter 50 and a microlens 60. A microlens 60 is formed on the color filter via a planarizing film 80.

  A plurality of photodiodes 30 are formed on the silicon substrate 1, and a charge transfer unit 40 for transferring signal charges detected by the photodiodes is formed so as to have a meandering shape between the photodiodes 30. . Although not shown, the charge transfer channel through which the signal charge transferred by the charge transfer unit 40 moves is formed to have a meandering shape in a direction intersecting with the direction in which the charge transfer unit 40 extends.

  A photodiode 30 having a pn junction, a charge transfer channel, a channel stop region, and a charge readout region are formed in the silicon substrate 1 in which the p-well is formed. A gate oxide film 2 is formed on the surface of the silicon substrate 1. Is formed. On the surface of the gate oxide film 2, an interelectrode insulating film 4 made of a silicon oxide film and a charge transfer electrode 3 (charge transfer portion 40) are formed.

  In the charge transfer unit 40, the gate oxide film 2 is formed on the surface of the silicon substrate 1. On the surface of the gate oxide film 2, a first electrode made of the first layer doped amorphous silicon film 3a constituting the charge transfer electrode and a second electrode made of the second layer doped amorphous silicon film 3b are formed from the silicon oxide film. The inter-electrode insulating film 4 is laminated to form a two-layer electrode structure.

  A silicon oxide film 6 having a thickness of 30 nm formed by the CVD method is formed on the upper layer of the second electrode through the silicon oxide film 5 formed by the thermal oxidation method. A tungsten thin film 7 having a thickness of 200 nm is formed on this upper layer.

  Next, the formation process of the gate oxide film in the manufacturing process of the solid-state imaging device will be described with reference to FIGS. 3 (a) to (c) to FIGS. 6 (a) to (c). In this example, in order to form an n-type impurity region for forming a photodiode region, a p-type impurity diffusion region, and an n-type impurity region as a transfer channel, after performing ion implantation, a gate oxide film and a gate electrode are formed. . At this time, it is necessary to set the diffusion time on the assumption that the diffusion length is extended by heating in the subsequent process. In the following steps, the photodiode region and the transfer channel formed in the semiconductor substrate are omitted for simplification.

First, in the p-well formed on the surface of the n-type silicon substrate 1, a silicon oxide film having a thickness of 25 nm is formed as a bottom oxide film 2a by thermal oxidation. Here, oxidation was performed by heating to 950 ° C. in an HCl / O ₂ = 1 slm / 10 slm atmosphere.

Thereafter, a silicon nitride film 2b having a thickness of 50 nm is formed on the bottom oxide film 2a by CVD. Here, the deposition conditions were set to 780 ° C. in an atmosphere of SiH ₂ Cl ₂ / NH ₃ = 0.09 slm / 0.9 slm (0.5 Torr).

Further, a silicon oxide film having a thickness of 8 nm is formed as a top oxide film 2c on the silicon nitride film 2b by a CVD method to form a gate oxide film having a three-layer structure. (FIG. 3A). Here, the CVD conditions were set to 800 ° C. in a SiH ₄ / H ₂ O = 0.05 slm / 2.5 slm (1.2 Torr) atmosphere.

  Subsequently, a resist R0 is applied to form a resist pattern having an opening in a region corresponding to the readout gate (FIG. 3B).

  Then, using the resist R0 as a mask, the top oxide film 2c and the silicon nitride film 2b in the region corresponding to the read gate are removed to form a bottom oxide film single layer (FIG. 3C).

Subsequently, a gate electrode 3 is formed on the gate oxide film 2 (FIG. 4A).
That is, a phosphorus doped first layer doped amorphous silicon film 3a having a thickness of 0.4 μm is formed on the gate oxide film 2 by a low pressure CVD method using SiH ₄ to which PH ₃ and N ₂ are added as a reactive gas. Form. The substrate temperature at this time shall be 600-700 degreeC.

  Subsequently, a positive resist is applied to the upper layer and exposed by photolithography using a desired mask to form a resist pattern and, if necessary, a dummy resist pattern.

Thereafter, the first layer doped amorphous silicon film 3a is selected by reactive ion etching using a mixed gas of HBr and O ₂ with the mask pattern as a mask and the silicon nitride film 2b of the gate oxide film 2 as an etching stopper. The first electrode and peripheral circuit wiring are formed by etching. Here, it is desirable to use an etching apparatus such as an ECR (Electron Cyclotron Resonance) system or an ICP (Inductively Coupled Plasma) system.

  Then, the resist pattern is removed by ashing.

  Subsequently, an interelectrode insulating film 4 made of a silicon oxide film having a thickness of 80 nm is formed on the first electrode pattern by a thermal oxidation method.

Then, a second layer doped amorphous silicon film having a thickness of 0.4 to 0.7 μm is formed as a second layer conductive film by a low pressure CVD method using a reactive gas obtained by adding PH ₃ and N ₂ to SiH ₄ gas. 3b is formed.

  Thereafter, a resist pattern for forming the second layer electrode and the peripheral circuit is formed, and using the resist pattern R2 as a mask, the second layer doped amorphous silicon film 3b on the photodiode region 30 is removed by etching and the peripheral circuit is formed. The pattern as the wiring is left. Then, by removing the resist by ashing, the second-layer doped amorphous silicon film 3b is formed so as to cover a part of the solid-state imaging element forming portion and the peripheral circuit portion.

  In this way, the second electrode composed of the second layer doped amorphous silicon film 3b is formed, and a charge transfer electrode having a two-layer structure is formed. Then, an insulating film 5 made of a silicon oxide film having a thickness of 70 nm is formed on the second electrode pattern by a thermal oxidation method (FIG. 4A).

  Then, after forming a silicon oxide film 6 by the CVD method on this upper layer (FIG. 4B), a tungsten film as a light shielding film 7 is sequentially laminated to form a resist pattern R1 (FIG. 4C), Using this resist pattern R1 as a mask, the pattern of the light shielding film 7 is patterned together with the insulating film 6 (FIG. 4D). Here, for example, the resist pattern R1 is formed by applying a positive resist so as to have a thickness of 0.5 to 1.4 μm and exposing the resist pattern by photolithography using a desired mask.

  Then, the resist pattern R1 is removed by ashing (FIG. 5A), a 700 nm-thick BPSG film 10 is formed (FIG. 5B), and reflowed at 850 ° C. for planarization (FIG. 5C). ).

  Finally, the planarization layer 70, the filter layer 50, the planarization layer 80, and the lens 60 are formed to form the solid-state imaging device shown in FIG.

  According to the solid-state imaging device formed as described above, the gate oxide film 2 is formed to be as thick as 80 nm and has a high breakdown voltage, but the silicon nitride film and the top oxide film are formed in the read gate portion. Since the opening O is formed and the gate oxide film in this portion is a single bottom oxide film, the read voltage can be lowered. In addition, since the other region is a three-layer film, it is not necessary to re-form the antireflection film, so that the production workability is improved and the reliability is also improved. In addition, a hydrogen passage in hydrogen annealing is firmly secured, and a substrate that is easy to manufacture and highly reliable can be provided.

  In addition, it can be formed without any special process.

The bottom oxide film is desirably 2 to 10 nm thick.
The silicon nitride film effectively functions as an oxidation stopper when the thickness is about 5 to 50 nm.
Furthermore, charge injection from the substrate can be suppressed by setting the bottom oxide film to 2 to 50 nm.

(Embodiment 2)
In the first embodiment, the gate oxide film 2 in the region corresponding to the read gate is a single layer, but as shown in FIG. 6, a single-layer gate oxide film is formed so as to slightly cover the photodiode side. A region may be formed.
This makes it difficult to reduce the read voltage, but on the other hand, the path of hydrogen in the hydrogen treatment is sure.

(Embodiment 3)
In the first and second embodiments, a region in which the gate oxide film 2 is formed as a single layer is formed for each element. However, as shown in a plan view in FIG. A region to be a gate oxide film of the layer may be formed.
Thereby, the way of hydrogen in hydrogen treatment is secured.

  In the above-described embodiment, the solid-state imaging device in which the gate oxide film is composed of the ONO film has been described. Needless to say.

  As described above, according to the solid-state imaging device of the present invention, since it is possible to form a gate oxide film that is easy to manufacture and has a low readout voltage, it can be applied to various solid-state imaging devices. .

Sectional drawing which shows the solid-state image sensor of Embodiment 1 of this invention The top view which shows the solid-state image sensor of Embodiment 1 of this invention The figure which shows the manufacturing process of the solid-state image sensor of Embodiment 1 of this invention. The figure which shows the manufacturing process of the solid-state image sensor of Embodiment 1 of this invention. The figure which shows the manufacturing process of the solid-state image sensor of Embodiment 1 of this invention. The figure which shows the solid-state image sensor of Embodiment 2 of this invention. The figure which shows the solid-state image sensor of Embodiment 3 of this invention. The figure which shows the solid-state image sensor of a prior art example

Explanation of symbols

1 Silicon substrate 2a Silicon oxide film (bottom oxide film)
2b Silicon nitride film 2c CVD oxide film (top oxide film)
3 Gate electrode 4 Interelectrode insulating film 5 Insulating film 6 Insulating film 7 Light shielding film

Claims (8)

A solid-state imaging device comprising a photoelectric conversion unit formed on a semiconductor substrate and a charge transfer device (CCD) for transferring charges formed by the photoelectric conversion unit, and forming an imaging region,
The entire surface of the semiconductor substrate, excluding a part of the imaging region on the surface of the semiconductor substrate,
A bottom oxide film made of a silicon oxide (SiO) film formed on the surface of the semiconductor substrate, a silicon nitride (SiN) film formed on the bottom oxide film, and a silicon oxide (SiN) formed on the silicon nitride film ( A solid-state imaging device covered with a laminated structure (ONO) film including a top oxide film made of a (SiO) film. The solid-state imaging device according to claim 1,
A solid-state imaging device in which the entire surface of the photoelectric conversion unit in the imaging region is covered with an ONO film. The solid-state imaging device according to claim 1,
A solid-state imaging device in which a charge extraction region of the imaging region is configured by a gate oxide film made of a single layer film. The solid-state imaging device according to claim 1,
A solid-state imaging device in which a gate oxide film is formed of a single layer film in at least one location of the imaging region. The solid-state imaging device according to claim 1,
A solid-state imaging device in which a gate oxide film is formed of a single layer film in at least one place of a photoelectric conversion unit in the imaging region. In a manufacturing method of a solid-state imaging device in which an imaging region for forming a photoelectric conversion unit and a charge transfer device that transfers charges formed by the photoelectric conversion unit is formed on a semiconductor substrate.
Forming a gate oxide film of the charge transfer element on the semiconductor substrate;
A bottom oxide film made of a silicon oxide (SiO) film, a silicon nitride (SiN) film formed on the bottom oxide film, and a silicon oxide (SiO) formed on the silicon nitride film on the semiconductor substrate surface A step of sequentially laminating a top oxide film made of a film to form a laminated structure (ONO) film;
A step of selectively removing the silicon nitride film and the top oxide film in part,
A method for manufacturing a solid-state imaging element, wherein a laminated structure film is formed on the entire surface of the semiconductor substrate excluding a part of a peripheral portion of the imaging region on the surface of the semiconductor substrate. It is a manufacturing method of the solid-state image sensing device according to claim 6,
The step of forming the silicon oxide film as the bottom oxide film is a method for manufacturing a solid-state imaging device including a thermal oxidation step. It is a manufacturing method of the solid-state image sensing device according to claim 6,
The step of forming the silicon oxide film as the bottom oxide film includes a step of forming a silicon oxide film by a CVD method.

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