JPH07120788A - Semiconductor device - Google Patents

Abstract

PURPOSE:To decrease the high-frequency noises generated in a power source line and to prevent the generation of faulty operations of circuits, such as fluctuation of signal levels, malfunction and signal delay, by providing the semiconductor device with a capacitance forming electrode of a reference potential disposed partly to face the power source line and a dielectric substance for forming the capacitance disposed between the power source line and capacitance forming electrode arranged to face each other. CONSTITUTION:This semiconductor device is provided with the capacitance forming electrode 4 of the reference potential disposed at least partly to face the power source line 3 and the dielectric substance 10 for forming the capacitance disposed between the power source line 3 and capacitance forming electrode 4 arranged to face each other. A capacitor having the power source line 3 and the capacitance forming electrode 4 as electrodes is formed. A CR filter is equivalently formed by the resistance possessed by the power source line 3 handled as distribution constant circuit and the capacitor, by which the impedance of the power source line 3 is lowered. The high-frequency noises generated in the power source line 3 are decreased by the CR filter, i.e., low-pass filter.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device such as a liquid crystal display device, an information input device such as an image scanner, an information output device such as a sensor, an information input / output device such as an image sensor, and an information storage device such as a memory. The present invention relates to a semiconductor device used as a device such as a data driver or a scan driver for controlling transmission and storage of information.

[0002]

2. Description of the Related Art In an active matrix type image display device, a large number of data signal lines and a large number of scanning signal lines orthogonal to the data signal lines are formed on a glass substrate, and each intersection of these signal lines is formed. In the vicinity, semiconductor active elements such as thin film transistors (TFTs) are formed in a matrix to form a pixel portion.

The data signal line of the pixel section is connected to a data driver for sampling a display data signal represented by a video signal and transferring the sampled display data signal to the data signal line. On the other hand, the scan signal line is connected to a scan driver that outputs a scan signal.

In the case of a liquid crystal display device as an example, the connection between the data driver or scan driver and the substrate on which the pixel portion is formed is generally TAB (tape automated bond in).
driver LSI (large scale integratio) on flexible tape (flexible substrate)
n) is gang-bonded, and the flexible tape and the glass substrate forming the liquid crystal panel are bonded by thermocompression, for example.

However, in recent years, the pixel pitch has become narrower as the definition of liquid crystal display devices has become higher, and the pitch below the connection limit pitch of the above-mentioned TAB is required.
A method of directly mounting a driver LSI on a glass substrate of a liquid crystal display device, which is called (chipon glass), has been put into practical use.

Further, for example, polysilicon (hereinafter, referred to as "polysilicon (hereinafter referred to as a-Si)", which has much higher carrier mobility than conventional amorphous silicon (hereinafter referred to as a-Si) TFT.
There is also a movement to integrally form not only a pixel portion but also a driver portion on a glass substrate using a TFT (abbreviated as p-Si) to form a monolithic structure.

[0007]

By the way, as described above, when the driver is directly mounted (COG) or monolithically formed on the glass substrate, the driver is formed on the glass substrate.
It is necessary to wire a power supply line for supplying power from the external power supply to the driver and a signal line for transferring data.

As this wiring material, an a-Si TFT-LCD is used.
Taking tantalum (Ta) or tantalum nitride (TaNx) (specific resistance: ρ = 25 to 30 μΩ · cm) used in (liquid crystal display) as an example, when wiring is performed using the same wiring material, the wiring width Is 100 μm and the film thickness is 3000Å, the wiring resistance is 1 per cm.
It becomes 00 Ω · cm ⁻¹ . For example, in the case of an image display device of a diagonal 25 cm class, if the device is wired from end to end in the horizontal direction (horizontal direction), the wiring length is about 20 cm, and the wiring width and film thickness are the same. When you wire
The total wiring resistance is about 2 kΩ and about 1 kΩ even in the 13 cm diagonal class.

When this wiring is used as a power supply line, for example, as shown in FIG. 26, the voltage supplied from the power supply decreases as the distance from the power supply input end increases. Approximately 2k even if the power supply current is 1mA
When passing through the Ω power line, the voltage supplied from the power source drops by about 2V. Such a voltage drop causes an irregular operation such as a circuit malfunction and a signal level fluctuation.

As one means for improving this, it is conceivable to use aluminum (Al) or aluminum alloy (Al-Si) as the wiring material. For example, when Al-Si having a specific resistance ρ = 0.6 μΩ · cm is used as a wiring material and the wiring material is wired with the above wiring width and film thickness, the wiring resistance is 1 when Ta or TaNx is used. / 50, for example, the total wiring resistance when applied to an image display device of diagonal 25 cm class is about 40.
Ω, about 20Ω in the diagonal 13 cm class. In this case, when considering the same load condition (power supply current 1 mA) as described above, the voltage drop due to the wiring material in the diagonal 25 cm class can be about 40 mV.

However, in reality, it is rare that the power supply current is constant at 1 mA as previously assumed, and ON / OFF of each active element such as a transistor connected to the power supply line is rare.
As a result, the power supply current fluctuates at high frequency, and at a certain point of the power supply line, for example, as shown in FIG. 27, a voltage waveform that fluctuates at high frequency is shown. In such a case, considering a system in which the fluctuation of the display data signal level with respect to the voltage fluctuation is one to one, at a certain point on the screen, for example, the brightness is large when the voltage fluctuation is maximum and when the voltage fluctuation is minimum. It will change. This tendency becomes more remarkable as the number of active elements that are turned on / off increases and as the impedance of the power supply line increases.

Further, although the display data signal is described as an example here, the fluctuation of the power supply voltage, in other words, the high frequency noise generated in the power supply line is not only the display data signal but also the clock signal or the like. Needless to say, it affects not only the voltage level of the signal but also other elements such as the response time (operating speed) of the circuit and malfunctions.

For the purpose of reducing high frequency noise, conventionally, as shown in FIG. 28, a capacitor 54 is mounted outside a display substrate 52 on which a pixel portion, a power supply line 51, etc. are formed, for example, on a flexible substrate 53. The capacitor 54
And a method of connecting to the power supply line 51 are used. However, this method is intended to reduce high-frequency noise generated outside the display substrate 52, and includes a voltage variation caused by a current variation caused by ON / OFF of each active element connected to the power supply line 51. It must be said that this is insufficient for reducing the high-frequency noise generated in 52.

The present invention has been made in view of the above, and an object thereof is to reduce high-frequency noise generated in a power supply line in a substrate in which a semiconductor active element and a power supply line are provided with a simple structure. It is an object of the present invention to provide a semiconductor device which can significantly reduce the occurrence of circuit irregularities such as signal level fluctuations, malfunctions, and signal delays as compared with the related art.

[0015]

A semiconductor device according to the invention of claim 1 is provided with a semiconductor active element and a power source line for supplying power source to the semiconductor active element on a substrate. In order to solve the above problems, the following means are taken.

That is, in the above semiconductor device, at least a part of the capacitor forming electrode having a reference potential is arranged so as to face the power source line, and between the power source line and the capacitance forming electrode which are disposed so as to face each other. And a capacitor-forming dielectric that is arranged.

A semiconductor device according to a second aspect of the present invention has a plurality of substrates, and a semiconductor active element on at least one of the substrates, and a power supply for supplying power to the semiconductor active element. And a line is provided, and the following means are taken to solve the above problems.

That is, a capacitor forming electrode having a reference potential is arranged on a substrate facing the substrate on which the power supply line is provided so that at least a part thereof faces the power supply line. In addition, the capacitance forming dielectric is disposed between the power supply line and the capacitance forming electrode which are arranged to face each other.

According to a third aspect of the invention, in the semiconductor device according to the second aspect of the invention, a liquid crystal is provided between the substrate on which the power supply line is provided and the substrate on which the capacitance forming electrode is provided. Are arranged, and the capacitance forming dielectric is a liquid crystal.

In the semiconductor device according to a fourth aspect of the present invention, in the configuration of the third aspect of the invention, the liquid crystal used for display and the liquid crystal used as the capacitance forming dielectric are separated by a partition member. It is characterized by that.

According to a fifth aspect of the present invention, in the semiconductor device according to the second aspect, the capacitance forming dielectric is provided with a substrate on which a power supply line is provided and the capacitance forming electrode. It is characterized in that it is a sealing member for sealing the space between the substrate and the substrate.

According to a sixth aspect of the present invention, in the semiconductor device according to any one of the first to fifth aspects of the present invention, the semiconductor active element is monolithically formed on a substrate on which a power supply line is provided. It is characterized by that.

According to a seventh aspect of the present invention, in the semiconductor device according to any one of the first to fifth aspects of the present invention, the semiconductor active element is provided in a semiconductor chip, and the semiconductor chip comprises: It is characterized in that it is mounted on a substrate on which a power supply line is provided.

According to an eighth aspect of the present invention, in the semiconductor device according to the seventh aspect, the semiconductor chip is
A chip substrate, the semiconductor active element formed on the chip substrate, a power supply line wired on the chip substrate for supplying power to the semiconductor active element, and at least a part of the power supply line A second capacitance forming electrode having a reference potential, which is arranged so as to face the second capacitance forming electrode, and a second capacitance forming dielectric arranged between the power supply line and the second capacitance forming electrode, which are arranged so as to face each other. It is characterized by having.

[0025]

According to the structures of the inventions of claim 1 and claim 2, a capacitor having a power supply line and a capacitance forming electrode as an electrode is formed, and the power supply line has a resistance which is treated as a distributed constant circuit; Equivalent to CR with a capacitor
A filter is formed and the impedance of the power supply line is lowered. The CR filter, that is, the low-pass filter, turns ON / O each semiconductor active element connected to the power supply line.
High-frequency noise that occurs in the power supply line, such as voltage fluctuations caused by current fluctuations associated with FFs, is reduced, and the occurrence of circuit irregularities such as signal level fluctuations, malfunctions, and signal delays is more pronounced than in the past. It is possible to significantly reduce it.

The invention of claim 2 can be applied to a semiconductor device such as an image display device including a liquid crystal display device. In the case of a liquid crystal display device, for example, it is arranged between a power supply line and a capacitance forming electrode. A liquid crystal can be used as the capacitance forming dielectric as described in claim 3. In this case, when the liquid crystal used for display and the liquid crystal used as the capacitance forming dielectric are separated by the partition member, the liquid crystal used as the capacitance forming dielectric is displayed. Since the liquid crystal can be different from the liquid crystal used for the display, the liquid crystal used as the dielectric material for forming the capacitance can be selected without the requirement of being suitable for display. Also,
If the capacity forming liquid crystal and the display liquid crystal are separated by the partition member, the display liquid crystal is not deteriorated by the application of the DC voltage.

According to a second aspect of the present invention, the power supply line is provided on one substrate and the capacitance forming electrode is provided on the other substrate which are arranged to face each other, and the seal member is provided between the two substrates. In the case of a semiconductor device hermetically sealed with, for example, a liquid crystal display device in which liquid crystal is sealed between both substrates, a plasma display panel in which gas is sealed between both substrates, or the like, as shown in claim 5, capacitance formation If the dielectric for use is also used as the seal member, the effective display area ratio of the display device can be improved.

In the semiconductor device according to any one of the first to fifth aspects of the invention, as described in the sixth aspect,
The semiconductor active element may be monolithically formed on the substrate, or a semiconductor chip containing the semiconductor active element may be mounted on the substrate. When a semiconductor chip containing a semiconductor active element is mounted on a substrate, a power supply line for supplying power to the semiconductor chip is formed on the substrate, and power is also supplied to the semiconductor active element inside the semiconductor chip. A power supply line for this purpose will be formed. In this case, as shown in claim 8, also for the semiconductor chip mounted on the substrate, similarly to the configuration of claim 1, the second capacitance forming electrode facing the power supply line and having the reference potential is formed. And a second capacitance forming dielectric between the power supply line and the second capacitance forming electrode to form a CR filter, thereby reducing high frequency noise in the entire substrate of the semiconductor device. Can be achieved.

[0029]

【Example】

[Embodiment 1] One embodiment of the present invention will be described with reference to FIGS.
The following is a description based on item 5.

The basic concept of the semiconductor device according to this embodiment is shown in FIGS. As shown in FIG. 2, the semiconductor device of the present embodiment is provided with a semiconductor active element 2 and a power supply line 3 for supplying power to the semiconductor active element 2 on a substrate 1. is there. In this embodiment, the capacitors C ₁ , C ₂ ,.
, And the power supply line 3 treated as a distributed constant circuit and the capacitors C ₁ , C ₂ , ... Form a CR circuit in a distributed constant manner as shown in FIG. By holding the electrode on the side opposite to the reference potential, for example, the ground potential, a CR filter is equivalently formed, and high frequency noise generated in the power supply line 3 is reduced.

It should be noted that FIGS. 2 and 3 described above merely show the basic concept, and the number of input terminals of the power supply line 3 and the number of power supply lines may be plural, and the potential of each power supply line is not limited. May also be different. Also, C (capacity) and R (resistance)
It does not matter even if it includes components other than the above, for example, L (inductance) component. More specifically, the electrode on the side opposite to the power supply line in each capacitor is held at a power supply potential different from the power supply line 3 even if it is not held at the ground potential, in other words, a power supply having a potential different from the power supply line 3. You can use it as a line.

4 and 5 show this more specific concept. FIG. 4 shows an example in which a linear capacitance forming electrode 4 is provided so as to face the power supply line 3, and a capacitance forming dielectric 5 is sandwiched between these electrodes 3 and 4, while FIG. An example is shown in which a plurality of capacitance forming electrode groups 4 '... Are provided facing each other (intersecting) at intervals and the capacitance forming dielectric 5 is sandwiched between these 3 and 4'. In these examples, the power supply line 3 and the linear capacitance forming electrode 4 or the capacitance forming electrode group 4 ′ are arranged on both sides of the capacitance forming dielectric 5,
A capacitor is formed by using these 3.4 or 3.4 'as electrodes.

4 and 5 show the basic structure, and the distance between the power supply line 3 and the capacitance forming electrode (group) 4 ', that is, the thickness of the dielectric 5 is shown. a is
The portions do not have to be the same, and the thickness a of the capacitance forming dielectric 5 may partially change. Further, the width and thickness of the power supply line 3 and the capacitance forming electrodes (groups) 4 and 4'need not be constant, and they may be different at each place. Further, the capacity forming electrodes (groups) 4 and 4'need to be held at the reference potential as described with reference to FIG. 2, but as shown in FIG. 5, a plurality of capacity forming electrode groups 4 '... When divided, the reference potentials of the capacitance forming electrodes 4'may be different.

In the following description, the potential of the capacitance forming electrode (group) is not particularly described, but the description will proceed assuming that the capacitance forming electrode (group) is held at the reference potential.

FIG. 1 shows an example of a wiring configuration of a power supply line 3 for supplying electric power to a circuit including a semiconductor active element formed on an insulating substrate 1. In this semiconductor device, in order to prevent entry of Na ⁺ ions or the like into a semiconductor layer, a liquid crystal layer, or the like on an insulating substrate 1 such as a glass substrate, for example, SiO ₂ or SiN _{x is formed} by plasma CVD (chemical vapor deposition) or the like. A so-called base coat 8, which is an insulating thin film made of, for example, is formed.

Further, a polysilicon (hereinafter, referred to as
LPCVD (low pressure CVD) is performed on an intrinsic semiconductor layer (so-called i layer) such as a p-Si film or an amorphous silicon (hereinafter a-Si) film.
Alternatively, the film is formed by PECVD (plasma enhanced CVD) or the like. Then, this semiconductor layer is used to form an active element such as a transistor. Since the semiconductor layer is to be removed by etching in a later step in the portion where the power supply line 3 is formed, the description will be given here focusing on the method of forming the constituent elements of the portion where the power supply line 3 is formed. Proceed.

On the base coat 8, SiO ₂ or Si
The gate insulating film 9 made of N _x or the like is formed by PECVD or the like.

Next, the power supply line 3 is formed at the same time as the gate wiring, for example. This is, for example, Al, Nb, Ta, M
This is done by forming a film of o, Cr, Al-Si, or an alloy thereof by sputtering, vapor deposition, or the like, patterning the film by a photolithography process, and removing the film at an extra portion by an etching process. .

Thereafter, SiO _{2 is formed on the} power supply line 3 above.
An interlayer insulating film 10 corresponding to the above-described capacitance forming dielectric 5 made of SiN _x or the like is formed by PECVD or the like.

Further, a capacitance forming electrode 4 is formed on the interlayer insulating film 10 at a portion facing the power supply line 3. As with the power supply line 3 described above, the capacitance forming electrode 4 is formed of Al, Nb, Ta, Mo, Cr, Al-Si, or an alloy thereof on the interlayer insulating film 10 by sputtering or vapor deposition. Then, this film is patterned by a photolithography process, and the film of an excessive portion is removed by an etching process. It is efficient to form the wiring of the capacitance forming electrode 4 at the same time as the source / drain wiring.

The method of forming each of the above layers may be appropriately changed depending on the structure of the semiconductor manufacturing process, the structure of the active element such as TFT, and the like. For example, there is a configuration in which the gate electrode is closer to the insulating substrate 1 side than the intrinsic semiconductor layer. In this case, when Ta is used for the gate electrode, the oxide insulating film of Ta ₂ O ₅ is used as a base coat by anodizing this. Can be formed.

By the way, the power supply line 3 often comes into contact with a wiring of another layer through an insulating film in order to connect to a circuit including an active element. In this case, for example, as shown in FIG. 6, a method of shifting the positional relationship between the power supply line 3 and the capacitance forming electrode 4 at the portion where the power supply line 3 makes contact with the upper wiring 11 and the contact hole 12 is used. You can use it. As this example, the ones shown in FIGS. 7 to 10 can be considered. FIG. 7 shows an example in which the capacitance forming electrode 4 is laid out with a width that does not cover the contact portion of the power supply line 3, FIG. 8 shows an example in which the power supply line 3 is projected only at the contacting portion, and FIG. FIG. 10 shows an example in which the capacitance forming electrode 4 is removed only in the contact portion of the power supply line 3, and FIG. 10 shows an example in which the capacitance forming electrode 4 bypasses the contact portion of the power supply line 3.

Although only the contact of the power supply line 3 is touched here, it is needless to say that the same consideration as above is required when the capacitance forming electrode 4 makes contact with another layer.

When the electrodes forming the capacitor (that is, between the power supply line 3 and the capacitance forming electrode 4) are separated from each other, in other words, when the film thickness of the interlayer insulating film 10 is increased,
The capacity as a capacitor is reduced, and the effect of the CR filter may be reduced. In such a case, as shown in FIG. 11, the wiring 11 connected to the power supply line 3 and the capacitance forming electrode 4 are not formed in the same layer, and the space between the power supply line 3 and the capacitance forming electrode 4 is It may be narrower than the space between the power supply line 3 and the other wiring 11. In this case, after forming the power supply line 3, the interlayer insulating film 10a as the capacitance forming dielectric 5 is formed, the capacitance forming electrode 4 is formed on the interlayer insulating film 10a, and then the interlayer insulating film 10b is formed. Interlayer insulating film 10b
Another wiring 11 is formed on top.

Further, as described above, the power supply line 3 and the capacitance forming electrode 4 are not always arranged so as to face each other.
As shown in FIG. 3, the power supply line 3 and the capacitance forming electrode 4 are partially overlapped, that is, even if the capacitor is not formed over the entire power supply line 3 but is partially formed. Good. In this case, since the capacitors are formed in a lumped constant, for example, the respective overlapping portions 4a are formed so that the respective capacitors formed by the respective overlapping portions 4a of the capacitance forming electrode 4 have substantially the same capacitance. Area and each overlapping part 4
It is also possible to intensively remove high frequency noise of a predetermined frequency by setting the distance between a and the power supply line 3.

In the above description, the power supply line 3 is formed first,
After that, an example is shown in which the interlayer insulating film 10 and the capacitance forming electrode 4 are formed in this order, but the vertical positional relationship between the power supply line 3 and the capacitance forming electrode 4 is not limited to this.
As shown in FIG. 13, the capacitance forming electrode 4 may be formed first, and then the interlayer insulating film 10 and the power supply line 3 may be formed in this order.

The power supply line 3 is, as shown in FIG.
The first layer portion 3a and the second layer which are arranged to face each other with the insulating film 13 interposed therebetween.
It may be a two-layer wiring having a structure in which the layer portion 3b and the layer portion 3b are connected by a contact hole 3c. Of course, the capacitance forming electrode 4 may be a two-layer wiring having the same configuration as described above.

Further, as shown in FIG. 15, the main body portion 4b of the capacitance forming electrode 4 is formed in the same layer as the power supply line 3, and the overlapping portion which partially overlaps the power supply line 3 in another layer. 4c may be formed to connect the main body portion 4b and each of the overlapping portions 4c ... With a contact hole 4d. In this case, the manner in which the overlap portion 4c and the power supply line 3 overlap with each other is not particularly limited. For example, as in the overlap portion 4c ₁ , the tip portion thereof extends outside the power supply line 3, and the overlap portion. 4c ₂ , the tip of which exists in the region of the power supply line 3,
Alternatively, the tip portion may be aligned with the end portion of the power supply line 3 like the overlap portion 4c ₃ .

It is needless to say that each of the above-mentioned examples shows only the basic configuration of the present invention, and that other components are added as necessary.

The present invention is not limited to the configurations shown in the above figures. For example, as to how the power supply line 3 and the capacitance forming electrode 4 overlap with each other, various patterns can be considered as shown in FIG. Further, the layout of the power supply lines 3 and the capacitance forming electrodes 4 may be a combination based on the configurations of the respective figures described above. Further, the power supply line 3 and the capacitance forming electrode 4 need not be formed linearly, but may be formed in a curved line. Further, the capacitance forming electrode 4 does not have to be linear, and may have any other shape such as a flat plate. Further, the capacity may not be added to the power supply line 3 as a whole, but the capacity may be added to only a part of the power supply line 3.

As described above, the semiconductor device of this embodiment is
The semiconductor active element 2 and the semiconductor active element 2 are provided on the substrate 1.
A power source line 3 for supplying power source power to the power source line 3, and at least a part of the power source line 3 is provided.
Electrode 4 for forming a capacitance having a reference potential, which is arranged so as to face with
And a capacitance forming dielectric 5 disposed between the power supply line 3 and the capacitance forming electrode 4 which are arranged opposite to each other.

As a result, the power supply line 3 and the capacitance forming electrode 4 are formed.
A capacitor having the electrodes as electrodes is formed, and a CR filter is equivalently formed by the resistance of the power supply line 3 which is treated as a distributed constant circuit and the capacitor, and the impedance of the power supply line 3 is lowered. The CR filter, that is, the low-pass filter reduces high-frequency noise generated in the power supply line 3, including voltage fluctuations caused by current fluctuations caused by ON / OFF of each semiconductor active element 2 connected to the power supply line 3. Accordingly, it is possible to significantly reduce the occurrence of irregular operation of the circuit such as fluctuation of signal level, malfunction, signal delay, etc., as compared with the conventional case.

[Second Embodiment] The following will describe another embodiment of the present invention with reference to FIGS. 16 to 25. For convenience of explanation, members having the same configurations and functions as those shown in the drawings of the first embodiment are designated by the same reference numerals, and the description thereof will be omitted.

In the first embodiment, the method of forming a capacitor by mainly providing the power supply line 3 and the capacitance forming electrode 4 on the same substrate has been described, but in the present embodiment, the power supply line 3 is used.
A method of forming the capacitor forming electrode 4 and the capacitor forming electrode 4 on different substrates will be described. An example thereof will be described by taking an image display device having a plurality of substrates arranged opposite to each other, particularly a liquid crystal display device using an active element as an example.

A liquid crystal display device as a semiconductor device according to this embodiment, as shown in FIG. 16, is provided with an active element formation substrate 21 on which semiconductor active elements such as TFTs are formed, and an active element formation substrate 21 facing the active element formation substrate 21. The counter electrode forming substrate 22 and the liquid crystal 23 injected between both substrates 21 and 22 and sealed by a sealing member are provided. It should be noted that although other constituent elements such as the above-mentioned base coat and an alignment film for controlling the alignment state of the liquid crystal are not shown (depicted) in the figure, it goes without saying that these are provided if necessary. There is no. This is also the case thereafter.

The active element formation substrate 21 is a circuit including semiconductor active elements such as a pixel portion, a data driver (image display control means) and a scan driver (image display control means) on a transparent insulating substrate such as a glass substrate. Is monolithically formed. The semiconductor active element may be an a-Si TFT or a p-Si TFT, but a p-Si TFT is particularly preferable.

In the pixel portion, a large number of band-shaped data signal lines made of a transparent conductive film are formed in parallel with each other on a transparent insulating substrate, and are made of a transparent conductive film so as to be orthogonal to these data signal lines. A large number of band-shaped scanning signal lines are formed, and a pixel electrode formed of a semiconductor active element such as a TFT and a transparent conductive film connected to each semiconductor active element in the vicinity of each intersection of the data signal line and the scanning signal line. Are formed in a matrix.

The data driver is connected to each data signal line of the pixel section, samples a display data signal represented by a video signal, and transfers the sampled display data signal to the data signal line. Circuit.

Further, the scan driver is a circuit which is connected to each scan signal line of the pixel section and outputs a scan signal for line-sequentially scanning each scan signal line to each scan signal line.

The counter electrode forming substrate 22 is formed on a transparent insulating substrate such as a glass substrate by forming a counter electrode made of a transparent conductive film which is arranged so as to face each of the above pixel electrodes and is a common electrode for each pixel electrode. It was done.

The active element forming substrate 21 is provided with a power supply line 3 for supplying electric power from an external power supply to the data driver and the scan driver. Around this power supply line 3, SiN _x , Si containing B and P
O ₂ film (BPSG: boron-doped phospho-silicate gla
ss), P-containing SiO ₂ film (PSG: phospho-silica)
te glass) and a protective film 24 made of a transparent insulating film such as SiO ₂ .

On the other hand, on the counter electrode forming substrate 22, a capacitance forming electrode 4 is formed at a position facing the power supply line 3, and the protective film 24 is formed around the capacitance forming electrode 4. A protective film 25 having a similar structure is provided.

Then, the active element forming substrate 21 is formed.
A liquid crystal 23 as a capacitance-forming dielectric 5 is interposed between the power supply line 3 formed on the substrate 2 and the capacitance-forming electrode 4 formed on the counter electrode formation substrate 22 to form a capacitor.

As described above, the liquid crystal 2 used for display is
3 is used as the capacitance forming dielectric 5, the liquid crystal 23
However, in the case of a liquid crystal that is deteriorated by electrolysis when a DC voltage is applied, it is necessary to invert the polarity of the capacitance forming electrode 4 with respect to the power line 3. still,
There is a liquid crystal display device in which the potential of the power supply line 3 is periodically changed with a predetermined amplitude.
The potential of the capacitance forming electrode 4 may be set to an intermediate potential of the oscillating potential of.

Further, in the case of the structure shown in FIG. 16, it is conceivable that a capacitor is formed as shown in FIG. In this case, since it is equivalent to connecting three capacitors in series, it is necessary to select the material by paying attention to the dielectric constants ε ₁ , ε _2, and ε ₃ of the protective film 25, the liquid crystal 23, and the protective film 24. There is.

By the way, when the power supply line 3 and the capacitance forming electrode 4 are made of a material which does not require the above-mentioned protective films 24 and 25, for example, ITO (indium tin oxide) or the like, FIG.
As shown in, the protective film can be omitted.

When the above ITO is used, for example, the impedance of the portion corresponding to this ITO is high, and it may be difficult to use the ITO as it is as the power supply line 3 or the capacitance forming electrode 4. In such a case, for example, as shown in FIG. 19 or 20, the power supply line 3 or the capacitance forming electrode 4 may have a two-layer structure of an ITO film 27 and a metal film 25. FIG. 19 shows that the metal film 2 is formed on the substrate 21 (22).
5, the insulating film 26 is formed thereon, the ITO film 27 is further formed thereon, and the ITO film 27 and the metal film 25 are connected by the contact hole 28 to form the power supply line 3 or the capacitor. The example which formed the electrode 4 for use is shown. Figure 2
0 forms a metal film 25 on the substrate 21 (22) at several places, and forms an ITO film 27 so as to cover these metal films 25, thereby forming the power supply line 3 or the capacitance forming electrode 4. An example is shown.

Further, as shown in FIG. 21, the counter electrode 29 formed on the counter electrode formation substrate 22 is extended to a position facing the power supply line 3 formed on the active element formation substrate 21 to thereby obtain the capacitance. The forming electrode is the counter electrode 2
It can be shared with 9.

If the liquid crystal used for display may be deteriorated by application of a DC voltage, as shown in FIG. 22, a partition (partition member) 30 is provided to display the liquid crystal 23a for display. The liquid crystal 23b as the capacitance forming dielectric 5 may be separated. A seal member for sealing the display liquid crystal 23a between the active element formation substrate 21 and the counter electrode formation substrate 22 can be used as the partition wall 30. In this way, in the case of the structure in which the liquid crystal 23a for display and the liquid crystal 23b for CR filter are separated, the liquid crystal 2
Different liquid crystals can be used for 3a and liquid crystal 23b.

Further, even in the liquid crystal display device, it is not particularly necessary to use liquid crystal as the capacitance forming dielectric 5, and of course, other materials may be used. For example, as shown in FIG. 23, the capacitance forming dielectric 5 can be shared with the seal member 31, and in this case, there is also an effect of improving the effective display area ratio of the display device.

The capacitance-forming electrode can also be used as another component of the display device, for example, a light-shielding means made of a metal layer for preventing light from reaching the semiconductor layer.

As described above, the semiconductor device of this embodiment is
Active element formation substrate 2 on which semiconductor active elements are formed
1 and a counter electrode forming substrate 22, and a power source line 3 for supplying power source power to a semiconductor active element is provided on the active element forming substrate 21. On the counter electrode forming substrate 22 arranged so as to face the counter electrode 21, the capacitance forming electrode 4 having the reference potential is arranged so that at least a part thereof faces the power source line 3, and is also arranged so as to face the power source line 3. In this configuration, the capacitance forming dielectric 5 is arranged between the power supply line 3 and the capacitance forming electrode 4.

As a result, similarly to the first embodiment, a capacitor having the power supply line 3 and the capacitance forming electrode 4 as an electrode is formed, and the resistance of the power supply line 3 treated as a distributed constant circuit and the capacitor Thus, a CR filter is equivalently formed, and the impedance of the power supply line 3 can be lowered. The CR filter reduces high-frequency noise generated by the power supply line 3, and can significantly reduce the occurrence of irregular circuit operation such as signal level fluctuation, malfunction, and signal delay, as compared with the related art. It will be possible.

In the above embodiments, the image display device having a structure in which the power supply line 3 is formed on an insulating substrate such as a glass substrate, particularly a liquid crystal display device has been described as an example of the semiconductor device. The display device is not limited to the liquid crystal display device, and other image display devices such as electroluminescence (EL) and plasma display panel (PDP).
l), a display device including a fluorescent display device and a light emitting diode, and the like.

The substrate on which the power line is wired is not limited to an insulating substrate such as a glass substrate. For example,
The semiconductor device may have a structure in which the power supply line is formed on a semiconductor substrate having an insulating film formed on the surface of a single crystal silicon substrate or the like.

Further, in the above-mentioned embodiment, the example in which the circuit requiring the power supply line 3 such as the data driver and the scan driver is formed monolithically on the same substrate as the pixel portion has been shown.
The present invention is applicable to all semiconductor devices that require the power supply line 3 to be formed on the substrate. For example, as shown in FIG. 24, a semiconductor chip 32 that requires a power supply line such as a data driver or a scan driver is mounted on a substrate 1 on which a pixel portion is formed (for example, when the substrate is a glass substrate, In the case of mounting by a so-called COG mounting method), a power supply line for supplying power to the semiconductor chip 32 is provided on the substrate 1 as in the case where each semiconductor element is monolithically formed on the substrate. Therefore, the application of the present invention is effective.

The semiconductor chip 32 mounted on the above-mentioned substrate 1 is not limited to one in which a semiconductor active element is formed on a semiconductor substrate typified by a single crystal silicon substrate having an insulating film formed on the surface, It may be a semiconductor chip formed of a semiconductor active element formed on an insulating substrate, for example, a semiconductor chip formed by forming a TFT on a glass substrate.

Also in such a semiconductor chip 32,
Since the power supply line for supplying power to the semiconductor active element formed on the chip substrate is formed on the chip substrate, the power supply line is formed by using the various methods shown in the first embodiment. A capacitor can be formed for the power line. That is, the semiconductor chip comprises a chip substrate, the semiconductor active element formed on the chip substrate, and a power supply line wired on the chip substrate, in the semiconductor chip, At least a part of the second capacitance forming electrode having the reference potential is arranged to face the power supply line, and a second capacitance is formed between the power supply line and the second capacitance forming electrode which are arranged to face each other. The dielectric for use is arranged. Here, the potential of the second capacitance forming electrode may be different from the potential of the capacitance forming electrode described above.

When the semiconductor chip 32 is mounted on the substrate 1 as described above, a power supply line for supplying electric power to the semiconductor chip 32 is formed on the substrate 1, and a semiconductor active element is also provided in the semiconductor chip 32. Although a power supply line for supplying power is formed, as described above, by forming the CR filter not only on the power supply line on the substrate 1 but also on the power supply line in the semiconductor chip 32, It is possible to reduce high-frequency noise of the entire device.

The wiring width of the semiconductor device is generally 10 μm or less. For example, under the condition that the wiring width is 10 μm,
If the wiring material has a specific resistance ρ of 0.2 μΩ · cm and a film thickness of 1 μm (sheet resistance: 2 × 10 ⁻³ Ω / □), the wiring will be 1c.
The resistance is 2Ω with the wiring of m. Furthermore, assuming a device with fine wiring, and assuming the wiring width to be 2.5 μm, the resistance is 8Ω for a wiring of 1 cm. It is considered that the AC impedance of the power supply line has a limit of about 10 to 20Ω, and a semiconductor device having a length-width ratio of about 3: 4 is assumed. For example, as shown in FIG. Assuming that the power supply line 3 is wired vertically and horizontally from one side of the diagonal to the other along the edge,
If the diagonal is 1.8 cm and the resistance per cm is 8 Ω, the wiring resistance will be approximately 20 Ω. Therefore, in general, in a device with a diagonal of 1.8 cm or more, the present invention is applied to a power source. A large effect can be expected by reducing the impedance of the line 3. In particular, the application of the present invention is effective for a large-sized semiconductor device in which a semiconductor active element is formed on a substrate suitable for increasing the size of a substrate such as a glass substrate.

In the present invention, the semiconductor device is not limited to the image display device, and other devices such as an information input device such as an image scanner, an information output device such as a sensor, and an information input such as an image sensor. It may be an output device, an information storage device such as a memory or a capacitor array, a device such as a data driver or a scan driver that controls transmission and storage of information, or a device in which these are combined.

The above-mentioned examples are intended to clarify the technical contents of the present invention, and should not be construed in a narrow sense by limiting to such specific examples. Various modifications can be made within the scope of the claims.

[0083]

As described above, the semiconductor device according to the first aspect of the present invention is provided with the semiconductor active element and the power source line for supplying power source to the semiconductor active element on the substrate. A capacitor-forming electrode having a reference potential arranged so that at least a part thereof faces the power supply line,
In this configuration, the power supply line and the capacitance forming electrode that are arranged to face each other are provided between the capacitance forming electrodes.

Therefore, a capacitor having the power supply line and the capacitance forming electrode as an electrode is formed, and a CR filter is equivalently formed by the resistance of the power supply line treated as a distributed constant circuit and the above capacitor, and the power supply line is formed. The impedance of the power supply line decreases, and the CR filter reduces high-frequency noise generated in the power supply line, including voltage fluctuations caused by current fluctuations caused by ON / OFF of each semiconductor active element connected to the power supply line, It is possible to significantly reduce the occurrence of irregular operation of the semiconductor device such as level fluctuation, malfunction, and signal delay, as compared with the conventional case.

As described above, the semiconductor device according to the invention of claim 2 has a plurality of substrates, and the semiconductor active element and the power supply power to the semiconductor active element are provided on at least one of the substrates. In a semiconductor device having a power supply line for controlling, a capacitor for forming a reference potential, at least a part of which is formed on the substrate arranged to face the substrate on which the power supply line is provided. The capacitor forming dielectric is arranged so as to face the power supply line, and the capacitance forming dielectric is arranged between the power supply line and the capacitance forming electrode which are arranged so as to face each other.

Therefore, like the invention of claim 1,
A capacitor having a power supply line and a capacitance forming electrode as an electrode is formed, and a CR filter is equivalently formed by the resistance of the power supply line treated as a distributed constant circuit and the above capacitor. Therefore, it is possible to significantly reduce the occurrence of irregular operation of the semiconductor device such as fluctuation of signal level, malfunction, signal delay, etc., as compared with the related art.

As described above, in the semiconductor device of the invention of claim 3, in the structure of the invention of claim 2, a substrate provided with the power supply line and a substrate provided with the capacitance forming electrode. A liquid crystal is arranged between the two, and the capacitance forming dielectric is a liquid crystal.

Therefore, when the semiconductor device is used in a liquid crystal display device that drives liquid crystal to perform display, liquid crystal can be used as a capacitance forming dielectric, and no special dielectric is required. Play.

As described above, in the semiconductor device of the fourth aspect of the present invention, in the structure of the third aspect of the invention, the liquid crystal used for display and the liquid crystal used as the capacitance forming dielectric are separated by the partition member. It is a separated structure.

Therefore, the liquid crystal for display is not deteriorated by the application of the DC voltage.

As described above, in the semiconductor device of the invention of claim 5, in the structure of the invention of claim 2, the capacitance forming dielectric is a substrate on which a power source line is provided and the capacitance forming electrode. Is a sealing member for sealing the space between the substrate and the substrate.

Therefore, it is possible to improve the effective display area ratio of the display device by sharing the capacity forming dielectric with the sealing member.

As described above, the semiconductor device according to the sixth aspect of the present invention is the semiconductor device according to any one of the first to fifth aspects, wherein the semiconductor active element is provided on a substrate provided with a power supply line. It has a monolithic structure. As described above, in the semiconductor device of the invention of claim 7, in the structure of the invention of any one of claims 1 to 5, the semiconductor active element is provided in a semiconductor chip. This is a configuration in which the chip is mounted on the substrate on which the power supply line is provided.

As described above, the semiconductor active element is monolithically formed on the substrate on which the power source line is provided, or the semiconductor active element is provided in the semiconductor chip, and the semiconductor chip is provided with the power source line. Since the wiring of the power supply line can be miniaturized by mounting on the substrate, and the impedance of the power supply line increases with the miniaturization of the wiring, in such a case, any one of claims 1 to 5 above. The application of two inventions is very effective.

As described above, in the semiconductor device of the invention of claim 8, in the structure of the invention of claim 7, the semiconductor chip comprises a chip substrate, and the semiconductor active element formed on the chip substrate. A power supply line wired on the chip substrate for supplying power to the semiconductor active element, and a second capacitance forming electrode having a reference potential, at least a part of which faces the power supply line. When,
In this configuration, the power supply line and the second capacitance forming electrode that are arranged to face each other are arranged between the second capacitance forming dielectric.

Therefore, the CR filter is formed not only on the power supply line on the substrate but also on the power supply line in the semiconductor chip, and it is possible to reduce high frequency noise in the entire substrate of the semiconductor device. Play.

[Brief description of drawings]

FIG. 1 is a schematic vertical sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing the basic concept of the present invention.

FIG. 3 is an explanatory diagram showing an equivalent circuit of FIG.

FIG. 4 is an explanatory diagram showing a basic configuration of the present invention.

FIG. 5 is an explanatory diagram showing another basic configuration of the present invention.

FIG. 6 is a schematic vertical cross-sectional view showing a connection portion between a power supply line and a wiring of another layer in the semiconductor device of the present invention.

FIG. 7 is a schematic plan view showing a connection portion between a power supply line and a wiring of another layer in the semiconductor device of the present invention.

FIG. 8 is a schematic plan view showing a modified example of the connection portion between the power supply line and the wiring of another layer in the semiconductor device of the present invention.

FIG. 9 is a schematic plan view showing another modification of the connection portion between the power supply line and the wiring of another layer in the semiconductor device of the present invention.

FIG. 10 is a schematic plan view showing still another modified example of the connection portion between the power supply line and the wiring of another layer in the semiconductor device of the present invention.

FIG. 11 is a schematic vertical cross-sectional view showing a modified example of the connection portion between the power supply line and the wiring of another layer in the semiconductor device of the present invention.

FIG. 12 is a schematic plan view showing a modified example of partially overlapping the power supply line and the capacitance forming electrode in the semiconductor device of the present invention.

FIG. 13 is a schematic vertical cross-sectional view showing a modified example of the semiconductor device of the present invention in which the capacitance forming electrode is formed closer to the substrate than the power supply line.

FIG. 14 is a schematic vertical cross-sectional view showing a modification of the semiconductor device of the present invention in which the power supply line is a two-layer wiring.

FIG. 15 is a schematic plan view showing another modification for partially overlapping the power supply line and the capacitance forming electrode in the semiconductor device of the present invention.

FIG. 16 is a schematic vertical sectional view showing an example in which the semiconductor device of the present invention is applied to a liquid crystal display device.

17 is an explanatory diagram showing an equivalent circuit of FIG.

FIG. 18 is a schematic vertical cross-sectional view showing a modified example of the liquid crystal display device according to the present invention in which the protective film covering the power supply line and the capacitance forming electrode is omitted.

FIG. 19 is a schematic vertical cross-sectional view showing a modification of the liquid crystal display device according to the present invention in which the power supply line or the capacitance forming electrode has a two-layer structure of an ITO film and a metal film.

FIG. 20 is a schematic vertical cross-sectional view showing another modification of the liquid crystal display device according to the present invention in which the power supply line or the capacitance forming electrode has a two-layer structure of an ITO film and a metal film.

FIG. 21 is a schematic vertical cross-sectional view showing a modified example in which the capacitance forming electrode is also used as the counter electrode in the liquid crystal display device according to the present invention.

FIG. 22 is a schematic vertical cross-sectional view showing a modified example in which a display liquid crystal and a liquid crystal as a capacitance forming dielectric are separated by a partition in the liquid crystal display device according to the present invention.

FIG. 23 is a schematic vertical cross-sectional view showing a modified example in which the capacitance forming dielectric is also used as a seal member in the liquid crystal display device according to the present invention.

FIG. 24 is an explanatory diagram showing a modified example in which a semiconductor chip is mounted on a substrate on which a pixel portion is formed in the liquid crystal display device according to the present invention.

FIG. 25 is an explanatory diagram showing a wiring example of power supply lines provided on a substrate.

FIG. 26 is an explanatory diagram showing a relationship between a voltage of a power supply line from a power supply input end and a voltage.

FIG. 27 shows a conventional example and is an explanatory diagram showing a voltage waveform at a certain point of a power supply line.

FIG. 28 is an explanatory diagram illustrating a conventional method of reducing high frequency noise in which a capacitor is provided outside the display substrate and connected to a power supply line.

[Explanation of symbols]

 1 Substrate 2 Semiconductor Active Element 3 Power Supply Line 4 Capacitance Forming Electrode 5 Capacitance Forming Dielectric 10 Interlayer Insulating Film (Capacitance Forming Dielectric) 21 Active Element Forming Substrate (Substrate) 22 Counter Electrode Forming Substrate (Substrate) 23 Liquid Crystal ( Capacitance forming dielectric material 29 Counter electrode (capacity forming electrode) 30 Partition wall (partitioning member) 31 Sealing member (capacity forming dielectric material)

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location G09G 3/00 9378-5G H01L 21/82 29/786

Claims (8)

[Claims] 1. A semiconductor device having a semiconductor active element and a power source line for supplying power source to the semiconductor active element on a substrate, wherein at least a part of the semiconductor device faces the power source line. A semiconductor device comprising: a capacitance forming electrode having a reference potential arranged therein; and a capacitance forming dielectric arranged between a power supply line and a capacitance forming electrode which are arranged opposite to each other. 2. A semiconductor device having a plurality of substrates, wherein a semiconductor active element and a power supply line for supplying power to the semiconductor active element are provided on at least one of the substrates. In the above, on the substrate arranged facing the substrate on which the power supply line is provided, the capacitance forming electrode of the reference potential is arranged so that at least a part thereof faces the power supply line, and Between the power supply line and the capacitance forming electrode, which are arranged to face each other,
A semiconductor device characterized in that a dielectric for forming a capacitance is arranged. 3. A liquid crystal is arranged between a substrate on which the power supply line is provided and a substrate on which the capacitance forming electrode is provided, and the capacitance forming dielectric is liquid crystal. The semiconductor device according to claim 2. 4. The semiconductor device according to claim 3, wherein the liquid crystal used for display and the liquid crystal used as the capacitance forming dielectric are separated by a partition member. 5. The capacitance forming dielectric is a sealing member for sealing between a substrate on which a power supply line is provided and a substrate on which the capacitance forming electrode is provided. The semiconductor device according to claim 2. 6. The semiconductor device according to claim 1, wherein the semiconductor active element is monolithically formed on a substrate on which a power supply line is provided. 7. The semiconductor active element is provided in a semiconductor chip, and the semiconductor chip is mounted on a substrate on which a power supply line is provided. The semiconductor device according to claim 1. 8. A power supply line for supplying power to the semiconductor active element, wherein the semiconductor chip is a chip substrate, the semiconductor active element is formed on the chip substrate, and the semiconductor active element is wired on the chip substrate. A second capacitance forming electrode having a reference potential, which is arranged so that at least a part thereof faces the power supply line, and a second capacitance forming electrode which is arranged so as to face the power supply line. The semiconductor device according to claim 7, further comprising: a second capacitance forming dielectric.