JPH07120712B2 - Semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor chip including a multi-stage Darlington transistor and a base of the semiconductor chip in the same direction in order to increase the response speed of the multi-stage Darlington transistor. The present invention relates to a semiconductor device including a speed-up diode chip connected in sequence.

[Conventional technology]

FIG. 3 is a plan view showing an internal connection structure of a power transistor module which is one of conventional examples of this type of semiconductor device, and FIG. 4 is a circuit diagram showing an equivalent circuit of the power transistor module. Is. In FIG. 3, an insulating substrate 1 is bonded to a heat dissipation base plate (not shown), and on the insulating substrate 1, a semiconductor chip 2, a main current electrode terminal 3 extending toward the outside of the module, and The signal electrode terminal 4 and the internal connection terminals 5 and 6 limited to the inside of the module are joined. Although the detailed internal structure of the semiconductor chip 2 is not shown, this semiconductor chip 2 forms a four-stage Darlington transistor composed of four transistors Q1, Q2, Q3, Q4 shown in FIG. In addition, three speed-up diode chips D1, D2, D3 connected between the bases of adjacent transistors and used to increase the response speed of the four-stage Darlington transistor are provided with signal electrode terminals on their respective cathode sides. Four,
The internal connection terminals 5a and 5b are soldered and connected.

Base B of each transistor Q1 to Q4 on the semiconductor chip 2.
Four pad areas b1, b2, b3, b4 corresponding to 1, B2, B3, B4 are formed. The pad area b1 is an internal lead wire 7a made of an aluminum wire for the signal electrode terminal 4 and the pad area b2 is an internal area. Speed up diode D1 by lead wire 7b
, The pad area b3 is connected to the anode side of the speed-up diode D2 by the internal lead wire 7c, and the pad area b4 is connected to the anode side of the speed-up diode D3 by the internal lead wire 7d. The anode of diode D1 is an internal lead
7e is connected to the internal lead wire 5, and the anode of the speed-up diode D2 is connected to the internal lead wire 6 by the internal lead wire 7f. Also, a portion 8 on the semiconductor chip 2 corresponds to the emitter E of the transistor Q4 in FIG. 4, and the pad region e formed in this portion 8 is connected to the main current electrode terminal 3 by the internal lead wire 7g. ing. Part of the semiconductor chip 2 corresponding to the collector C of each of the transistors Q1 to Q4 in FIG. 4 is also electrically connected to another main current electrode terminal (not shown).

Each of the above members provided on the heat dissipation base plate is entirely surrounded by a resin case (not shown) separately provided on the heat dissipation base plate, and epoxy resin is injected into the resin case to be solidified and sealed for power. It is a transistor module.

In the internal connection structure of the power transistor module described above, the pad region b4 is connected to the anode of the speed-up diode D3 via the internal lead wire 7d, and the cathode of the diode D3 is the internal connection terminal 6 and the internal lead wire 7f. Since it is connected to the pad area b3 via the
As shown in the figure, the speed-up diode D is inserted between the bases B4 and B3 of the transistors Q4 and Q3.
The pad region b3 is connected to the anode of the speed-up diode D2 via the internal lead wire 7c, and the cathode of the diode D2 is connected to the internal connection terminal 5, the internal lead wires 7e, 7b.
Since it is connected to the pad region b2 via the transistor, the speed-up diode D2 is inserted between the bases B3 and B2 of the transistors Q3 and Q2 as shown in FIG. Further, the pad region b2 is connected to the anode of the speed-up diode D1 via the internal lead wire 7b, and the diode D1
Since the cathode of is connected to the pad region b1 via the signal electrode terminal 4 and the internal lead wire 7a, the speed-up diode D1 is interposed between the bases B2 and B1 of the transistors Q2 and Q1 as shown in FIG. It has been inserted.

On the other hand, the cathode of the speed-up diode D3 is connected to the anode of the speed-up diode D2 through the internal connection terminal 6 and the internal lead wire 7f, and the cathode of the diode D2 is connected through the internal connection terminal 5 and the internal lead wire 7e. Since it is connected to the anode of the speed-up diode D1, the three speed-up diodes D1 to D3 are also connected in series in the same direction as shown in FIG.

Therefore, in the 4-stage Darlington transistor shown in FIG. 4, when the transistors Q1 to Q4 are turned off,
The charge stored in the base B4 of the transistor Q4 is supplied as current i ₃ through the speed-up diode D3, and the charge stored in the base B3 of the transistor Q3 is supplied as current i ₂ through the speed-up diode D2 to the base B2 of the transistor Q2. The accumulated charges are extracted as current i ₁ to the signal electrode terminals 4 through the speed-up diode D1, and the response speed is increased.

[Problems to be Solved by the Invention]

However, in the semiconductor device having the above configuration, in order to connect the three speed-up diodes D1 to D3 to the 4-stage Darlington transistor, two internal connection terminals 5 and 6 are required in addition to the signal electrode terminal 4. There is a problem that the device becomes large.

The present invention has been made to solve such a problem, and is a semiconductor capable of reducing the number of internal connection terminals for connecting a diode for speed-up to a multi-stage Darlington transistor and downsizing the device. The purpose is to obtain the device.

[Means for Solving the Problems]

A semiconductor device according to the present invention includes a semiconductor chip including a multistage Darlington transistor having three or more stages, and a plurality of diode chips in which the base electrodes of the multistage Darlington transistor are connected in the same direction and sequentially. A plurality of diode chips adjacent to each other in the sequential connection, wherein one anode and the other cathode are installed on a common internal connection terminal. However, the internal connection terminals provide electrical connection between the diode chip pairs.

[Action]

In the present invention, the required number of internal connection terminals is reduced by interconnecting the diode chips adjacent to each other in the sequential connection through the common internal connection unit.

〔Example〕

FIG. 1 is a plan view showing an internal connection structure of a power transistor module which is an embodiment of a semiconductor device according to the present invention, and FIG. 2 is a circuit diagram showing an equivalent circuit of the power transistor module. . In FIG.
1 to 5,7g, 8, b1 to b3, e are exactly the same as the above conventional device, and the 4-stage Darlington transistor formed on the semiconductor chip 2 is completely different from the conventional device as shown in FIG. It is the same.

In this module, the diode D1 is the cathode of the three speed-up diode chips D1, D2, D3 that are connected between the bases of the adjacent four-stage Darlington transistors and are used to increase the response speed. Side is connected to the signal electrode terminal 4 by soldering the anode side of the diode D2 to the internal connection terminal 5 and the diode D3 of the cathode side is connected to the internal connection terminal 5 by soldering. That is, the internal connection terminal 5 is shared by the connection terminals of the two diodes D2 and D3, and the vertical relationship between the anode and the cathode of each of the diode chip pairs D2 and D3 is opposite to each other.
In other words, the diode chips D2 and D3 have mutually opposite characteristics in their arranged state. Therefore, one internal connection terminal 5 is sufficient.

The pad among the pad regions b1, b2, b3, b4 on the semiconductor chip 2 corresponding to the bases B1, B2, B3, B4 of the four transistors Q1, Q2, Q3, Q4 of the four-stage Darlington transistor Area b1 is an internal lead wire made of aluminum wire
9a to the signal electrode terminal 4, the pad area b2 to the anode side of the speed-up diode D1 via the internal lead wire 9b, the pad area b3 to the internal connection terminal 5 via the internal lead wire 9c, and the pad area b4 to the internal lead wire. 9d are connected to the anode side of the speed-up diode D3, respectively. Further speed-up diode D1
The anode of is connected to the cathode of the speed-up diode D2 by an internal lead wire 9e. Other configurations are the same as those of the conventional device, and therefore the description thereof is omitted here.

In the internal connection structure of the power transistor module described above, the pad region b4 is connected to the anode of the speed-up diode D3 via the internal lead wire 9d, and the cathode of the diode D3 is connected to the internal connection terminal 5 and the internal lead wire 9c. Since it is connected to the pad region b3 via the pin, the speed-up diode D3 is inserted between the bases B4 and B3 of the transistors Q4 and Q3 as shown in FIG. The pad region b3 is connected to the anode of the speed-up diode D2 via the internal lead wire 9c and the internal connection terminal 5, and the cathode of the diode D2 is connected to the internal lead wires 9e and 9b.
Since it is connected to the pad region b2 via the pin, the speed-up diode D2 is inserted between the bases B3 and B2 of the transistors Q3 and Q2 as shown in FIG. Further, the pad area b2 is connected to the anode of the speedup diode D1 via the internal lead wire 9b,
Since the cathode of D1 is connected to the pad area b1 via the signal electrode terminal 4 and the internal lead wire 9a, the speed-up diode D1 is provided between the bases B2 and B1 of the transistors Q2 and Q1 as shown in FIG. It has been inserted.

On the other hand, the cathode of the speed-up diode D3 is connected to the anode of the speed-up diode D2 via the internal connection terminal 5, and the cathode of the diode D2 is connected to the anode of the speed-up diode D1 via the internal lead wire 9e. Therefore, as shown in FIG. 2, the three speed-up diodes D1 to D3 are connected in the same direction and in series.

Therefore, in the 4-stage Darlington transistor shown in FIG. 2, when the transistors Q1 to Q4 are turned off,
In the same way as in the conventional device, the base of transistor Q4
The charge stored in B4 is a current i ₃ through the diode D3, the charge stored in the base B3 of the transistor Q3 is a current i ₂ through the diode D2, and the charge stored in the base B2 of the transistor Q2 is a current i 3 through the diode D1. _{As 1} is pulled out to the signal electrode terminals 4 respectively, and the response speed is accelerated. The electric charge accumulated in the base B1 of the transistor Q1 is extracted to the signal electrode terminal 4 side as a current i ₀ flowing through the internal lead wire 9a shown in FIG.

In other words, the number of internal connection terminals is reduced while maintaining the same operation as the conventional example of FIG.

〔The invention's effect〕

As described above, according to the present invention, connection is made in the same direction and sequentially, and for one pair of diode chips adjacent to each other, one anode and the other cathode are installed on a common internal connection terminal, The required number of internal connection terminals is reduced, and the semiconductor device can be downsized.

[Brief description of drawings]

FIG. 1 is a plan view showing an internal connection structure of an embodiment of a semiconductor device according to the present invention, FIG. 2 is a circuit diagram showing an equivalent circuit of the semiconductor device, and FIG. 3 is an internal connection structure of a conventional semiconductor device. 4 is a circuit diagram showing an equivalent circuit of the semiconductor device. In the figure, 2 is a semiconductor chip, 4 is a signal electrode terminal,
5 and 6 are internal connection terminals, 9a to 9e are internal lead wires, D1 to D3 are speed-up diodes (diode chips), Q1
~ Q4 is a 4-stage Darlington transistor. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A semiconductor chip including a multi-stage Darlington transistor having three or more stages, and a plurality of diode chips in which the base electrodes of the multi-stage Darlington transistor are connected in the same direction and sequentially. In the semiconductor device, in the plurality of diode chips, there are diode chip pairs that are adjacent to each other in the sequential connection, and one anode and the other cathode are installed on a common internal connection terminal, and the internal connection is performed. A semiconductor device characterized in that an electrical connection is made between the diode chip pair by a terminal.