JPH07107943B2 - Optical receiver circuit - Google Patents

Description

The present invention relates to an optical receiver circuit for handling digital signals used in optical data links and the like, and particularly to an amplifier circuit for converting a photocurrent obtained from a light receiving element into a voltage and amplifying it. The present invention relates to an improvement of an optical ATC circuit that controls the reference potential of a comparator that restores a binary digital signal depending on the magnitude of the output of the.

[Conventional technology]

As shown in FIG. 5, the basic configuration of an optical receiver circuit used for an optical data link, which handles a digital signal, includes an amplifier circuit 52 for converting a photocurrent obtained from the light receiving element 51 into a voltage and amplifying it, and a binary signal. Of the digital signal of FIG. 54 indicates an output signal terminal. The output signal of the amplifier circuit 52 is usually a large light receiving level indicated by I, II, and III depending on the light receiving level, as shown in FIG.
The response is different depending on whether it is small or medium, and when it is binarized by comparing it with the reference potential Vr of a constant level, the duty ratio of the output from the comparator 53 changes and there is a problem that the waveform distortion increases (conventional). Technology 1).

In order to solve this problem, the inventor of the present application has already invented an optical receiver circuit including means for binarizing after adding a differentiating circuit for detecting a change point of the output of the amplifier circuit 52 (Japanese Patent Laid-Open No. 58-20 / 1983).
1331, JP-A-59-96989) (Prior Art 2).

[Problems to be solved by the invention]

The prior art 2 has an effect of improving the waveform distortion in the prior art 1, but has a drawback that it is weak against noise. Therefore, it is possible to obtain an output signal with a small waveform distortion regardless of the level of the received light and at the same time, without using a method that is resistant to noise, that is, a differentiating method like the conventional technique 2.
It is desired to realize an optical receiver circuit that has a wide dynamic range, a small waveform distortion, and is resistant to noise.

[Means for solving problems]

There are usually the following two methods as means for solving the conventional problems.

(1) AGC (Automatic Gain Control) method that controls the gain of the amplifier circuit by the level of the received light level, (2) ATC (Auto Threshhold Contr) that controls the reference potential of the comparator by the level of the amplifier circuit output
ol) method The present invention relates to (2) the ATC method, which is a first current for converting a photocurrent obtained from a light receiving element into a voltage and amplifying it.
A voltage conversion unit, a second current-voltage conversion unit having a symmetrical structure with the first current-voltage conversion unit, a peak detection unit that detects and holds a peak value of the output of the first current-voltage conversion unit, From the output of the second current-voltage converter and the output of the peak detector, the first
And a comparator forming a reference potential creation unit that creates a median value of the output of the current-voltage conversion unit, and a reference potential of a comparator that restores the reference potential created by the reference potential creation unit into a binary digital signal. It is characterized by

[Operation] The light receiving circuit of the present invention detects the peak value of the amplifier circuit,
The median value is determined from the peak potential and the potential at the time of light input = 0, which is used as the reference potential of the comparator. That is, the reference potential of the comparator is always in the center of the amplitude regardless of the magnitude of the output of the amplifier circuit, in other words, regardless of the magnitude of the received light level. Further, the present system can be easily constructed by the discrete components of the capacitor C and the resistor R, but the present invention is constructed so as to be a monolithic IC. The hold time of the peak value is usually determined by the time constant of C / R. The larger the hold time, the longer the time the ATC function operates and the better. In the present invention, a small constant current source corresponding to small C and large R is used. With the configuration of the present invention, since the reference potential of the comparator is always at the center value of the comparator input, an output with a small waveform distortion is obtained, and even if the output waveform of the amplifier circuit is rounded, it is possible to perform comparison in the center, thereby providing a high-speed response. Is possible,
Moreover, since the peak detector is composed of a small capacitor and a minute constant current source, it is possible to make the peak detector having a long hold time into a monolithic IC. Embodiments will be described below with reference to the drawings.

〔Example〕

FIG. 1 shows a block configuration of the optical receiving circuit of the present invention. 1
Is a first current-voltage converter which converts a photocurrent obtained from the light receiving element 6 into a voltage and amplifies it, 2 is a second current-voltage converter having a symmetrical structure with the first current-voltage converter 1, 3 Is a peak detector that detects and holds the peak value of the output of the first current-voltage converter 1, and 4 is the first current from the output of the second current-voltage converter 2 and the output of the peak detector 3. A comparator 5 forming a reference potential creation unit that creates a median value of the output of the voltage conversion unit is an output signal terminal.

FIG. 2 shows a signal waveform diagram of each part in FIG. The delay time of the output signal depends on the rise and fall times of the output of the first current-voltage converter 1, but since the median value is always at the center of the output, the delay time of the rise and rise of the output signal is the same. And the waveform distortion is small.

The first current-voltage conversion unit 1 is based on the circuit that has been invented by the inventor of the present application (Japanese Patent Laid-Open No. Sho-6). The second current-voltage conversion unit 2 has a circuit configuration which is completely symmetrical to that of the first current-voltage conversion unit 1, and is biased when the optical input = 0. However, if it is made completely symmetrical, it is difficult to determine the DC level and it is easy to malfunction. Therefore, the value of the feedback resistor is made different to make a difference in bias.

FIG. 3 is a circuit diagram showing a concrete example of the configuration block of the present invention shown in FIG. Reference numeral 31 is a minute constant power source, 32 is a reference potential generating unit, and 33 is a differential amplifier. The values of the feedback resistors R4 and R16 for making the biases of the first current-voltage converter 1 (head amplifier) and the second current-voltage converter 2 (dummy amplifier) different are different, and the circuit of this embodiment is used. It is selected to be 20KΩ and 10KΩ respectively.

The circuit configuration of the present invention is characterized by the following two points.

The head and dummy amplifiers forming the first and second current-voltage converters 1 and 2 have a symmetrical structure, and in order to determine the DC level, only the values of the feedback resistors R4 and R16 are changed to make the bias different. .

As a circuit with a long hold time, a monolithic IC is used without using a large value of C or R for the peak detection unit 3.
Can be converted.

The operation of the peak detector 3 in this embodiment will be described with reference to FIG. The detection function of peak detector 3 is the collector of PNP transistor Q ₁₀ , capacitor C ₁ and capacitors C ₁ and P.
It consists of a small current flowing through the collector of NP transistor Q ₁₁ . Output of the head amplifier forming the first current-voltage conversion unit 1 The path to hold the lower limit value of is the emitter of PNP transistor Q ₁₁ , and the time to hold is the capacitor C ₁
It is decided by the current of the emitter of the PNP transistor Q ₁₁ and is quite fast.

On the other hand, head amp output When the potential becomes high, but the charge on the capacitor C ₁ is started, the transistor Q ₁₁ is for PNP, the constant current I ₁ only is supplied from the micro constant power supply 31, hold the potential be selected small constant current I ₁ Will take longer to return. In other words, according to this circuit configuration, the peak value is detected in a relatively short time, and once held, the output of the head amplifier is output. Even if is changed, the recovery time is long and good peak detection can be realized. Since the size of the capacitor C ₁ is immediately related to the chip size, only 1000 pF can be selected at most, but if the constant current I ₁ is selected to be several μA, a resistance of about Megohm (MΩ) is inserted in parallel with the capacitor C _1. It will be equivalent to, and it will be possible to hold in about 10 ^-3 seconds (m sec).

The output of the dummy amplifier forming the second current-voltage conversion unit 2 thus obtained (Or Output detected by peak detector 3 It is the reference potential creation unit 32 that creates the median value of the output of the head amplifier that forms the first current-current conversion unit 1. When the reference potential generator 32 receives a simple emitter-float configuration, the collector currents of the transistors Q ₁₀ and Q ₃₁ of the peak detector 3 are several μA, so the base current cannot be drawn. It has a circuit configuration that creates a reference potential by division.

〔The invention's effect〕

As described above, the optical receiving circuit according to the present invention has the following effects.

Since the reference potential of the comparator is always at the center value of the comparator input, it is possible to obtain an output with small waveform distortion.

Even if the output waveform of the increasing circuit is round, it is possible to perform high-speed response because it can be compared in the center.

The peak detector is a small capacitor, eg 1000pF
Since it is composed of the following capacitors and a minute constant current source, the peak detector having a long hold time can be formed into a monolithic IC.

Therefore, the present invention is a monolithic IC for the development of a monolithic IC of an optical receiving circuit for coping with the speeding up, downsizing and price reduction required in the rapidly developing and popularizing optical communication.
It is very effective when applied to development.

[Brief description of drawings]

FIG. 1 is a block diagram of the present invention, FIG. 2 is a waveform diagram of each part of the present invention, FIG. 3 is a circuit diagram of one embodiment of the present invention,
FIG. 4 is a diagram for explaining the operation of the peak detector of the present invention, FIG. 5 is a basic configuration diagram of a conventional optical receiving circuit, and FIG. 6 is an output waveform of an amplifier circuit of the conventional optical receiving circuit. 1,2 ... Current-voltage converter, 3 ... Peak detector, 4 ...
… Comparator, 5 …… Output signal terminal, 6 …… Light receiving element, 31 …… Micro constant power source, 32 …… Reference potential creation unit, 33 ……
Differential amplifier, 51 ... Light receiving element, 52 ... Amplifying circuit, 53 ...
Comparator, 54 ... Output signal terminal

Claims (3)

[Claims] 1. A receiving circuit of an optical data link for transmitting a binary digital signal, comprising: a first current-voltage converting section for converting a photocurrent obtained from a light receiving element into a voltage and amplifying the voltage, and the first current. -Second Current Having Symmetrical Structure with Voltage Converter-
A voltage converter, a peak detector that detects and holds a peak value of the output of the first current-voltage converter, an output of the second current-voltage converter, and an output of the peak detector from the output of the peak detector. And a comparator forming a reference potential creating unit for creating a median value of the output of the current-voltage converting unit of No. 1, and a comparator for restoring the reference potential created by the reference potential creating unit into a binary digital signal. An optical receiver circuit characterized by using a reference potential. 2. The optical receiving circuit according to claim 1, wherein the first current-voltage converting section and the second current-voltage converting section have different biases. 3. The peak detector connects a base to an output of the first current-voltage converter,
The optical receiver circuit according to claim 1, wherein the collector is grounded and the emitter is composed of a PNP transistor connected to a power source through a parallel body of a capacitor and a constant current circuit.