JPS62285537A - Optical reception circuit - Google Patents

Optical reception circuit

Info

Publication number
JPS62285537A
JPS62285537A JP61128579A JP12857986A JPS62285537A JP S62285537 A JPS62285537 A JP S62285537A JP 61128579 A JP61128579 A JP 61128579A JP 12857986 A JP12857986 A JP 12857986A JP S62285537 A JPS62285537 A JP S62285537A
Authority
JP
Japan
Prior art keywords
amplifier
output
detection section
comparator
head amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61128579A
Other languages
Japanese (ja)
Inventor
Takanori Sawai
沢井 孝典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP61128579A priority Critical patent/JPS62285537A/en
Publication of JPS62285537A publication Critical patent/JPS62285537A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60Receivers
    • H04B10/66Non-coherent receivers, e.g. using direct detection
    • H04B10/69Electrical arrangements in the receiver
    • H04B10/695Arrangements for optimizing the decision element in the receiver, e.g. by using automatic threshold control

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Optical Communication System (AREA)
  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To attain one chip circuit integration up to a signal processing section including a photodetector by providing a head amplifier, a dummy amplifier, a detection section, a differential amplifier and a comparator. CONSTITUTION:The dummy amplifier 2 having a constitution symmtrical to the 1st stage head amplifier 1, a peak detection section 3 detects a peak value of a head, the dummy amplifier 2 and the peak detection section 3 form an intermediate value of the head amplifier amplitude and the differential amplifier 5 receives the intermediate value and the output of the head amplifier 1 as the optical ATC circuit, and the comparator 7 binary-codes the output of the ATC circuit and the reference potential. Since the variation of the bias is expected for the ATC circuit and the reference potential to some degree, hysteresis is provided to the comparator 7. Thus, even when a mean value detection section 4 generating the reference potential of the comparator uses an externally mounted capacitor, a complete one chip integration is attained.

Description

【発明の詳細な説明】 3、発明の詳細な説明 〔産業上の利用分野〕 本発明は光データリンクなどに用いられるディジタル信
号を扱う光受信回路に関し、とくに受光素子と信号処理
部を一体に集積し、ダイナミックレンジが大きく、高速
応答が可能で、ノイズに強い所謂1チツプic化した光
受信ICに関するものである。
[Detailed Description of the Invention] 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an optical receiving circuit that handles digital signals used in optical data links, etc., and particularly relates to an optical receiving circuit that handles digital signals used in optical data links, etc. The present invention relates to a so-called one-chip optical receiver IC that is integrated, has a large dynamic range, is capable of high-speed response, and is resistant to noise.

〔従来の技術〕[Conventional technology]

光データリンクなどに用いられるディジタル信号を扱う
光受信回路の基本構成は、第4図に示すように、受光素
子41から得られる光電流を電圧に変換し増幅する増幅
回路42と、2値のディジタル信号に復元するコンパレ
ータ43から構成される。
As shown in FIG. 4, the basic configuration of an optical receiving circuit that handles digital signals used in optical data links, etc. includes an amplifier circuit 42 that converts the photocurrent obtained from the light receiving element 41 into voltage and amplifies it, and a binary It is composed of a comparator 43 that restores the digital signal.

44は出力信号端子を示す。44 indicates an output signal terminal.

増幅回路42の出力は、通常第5図に示すように受光レ
ベルの大・小により、たとえば1.  n、 mで示す
受光レベル大・中・小により出力信号波形のなまりの方
が異なるため、一定レベルの基準電位■「と比較し2値
化すると、コンパレータ43からの出力のデユーティ 
(duty)比が変化し、波形歪が増大するという問題
がある(従来技術1)。
The output of the amplification circuit 42 usually varies depending on the level of the received light as shown in FIG. 5, for example, 1. Since the roundness of the output signal waveform differs depending on the light reception level indicated by n or m (large, medium, or small), when compared with a constant level reference potential ■ and converted into a binary value, the duty of the output from the comparator 43 is
There is a problem that the (duty) ratio changes and waveform distortion increases (Prior Art 1).

この問題を解決するため、増幅回路42の出力の変化点
を検出する微分回路を付加し、さらに平均値を検出する
平滑回路を付加した後、ヒステリシス機能を有するヒス
テリシス付コンパレータで2値化する手段を含む光受信
回路を本願発明者は既に発明したく特開昭59−960
89号公報)(従来技術2)。
In order to solve this problem, a differentiating circuit is added to detect the changing point of the output of the amplifier circuit 42, and a smoothing circuit is further added to detect the average value, and then a means for binarizing with a hysteresis comparator having a hysteresis function is added. The inventor of the present application has already wished to invent an optical receiving circuit including
No. 89) (Prior Art 2).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来技術2においては、波形歪の増大に対しては解決す
ることができたが、なお次のような問題が残っている。
In prior art 2, although the increase in waveform distortion could be solved, the following problems still remain.

■ 微分方式を用いているため微小変化に追随する。す
なわちノイズに弱い。
■ It follows minute changes because it uses a differential method. In other words, it is susceptible to noise.

■ コンパレータの基準電位を発生する平均値検出部に
外付けのコンデンサ(0,1μF程度)を用いているた
め完全な1チツプ化が達成できない。
■ Since an external capacitor (approximately 0.1 μF) is used in the average value detection section that generates the reference potential of the comparator, complete integration into one chip cannot be achieved.

■ 使用するヒステリシス付きコンパレータは、ヒステ
リシス幅を決定する二つの定電流(PNPトラジスタ構
成の電流はき出しと、NPN トラジスタ構成の電流吸
い込み)の基準電流電源が個別に設定されているため、
温度変動や電圧変動に対して精度が出しにくい。
■ The comparator with hysteresis used has separate reference current power supplies for the two constant currents (current source for the PNP transistor configuration and current sink for the NPN transistor configuration) that determine the hysteresis width.
It is difficult to achieve accuracy with respect to temperature and voltage fluctuations.

■ 初段の電流−電圧変換部を構成するヘッドアンプに
リンギングが発生し、これを防止するため帰還抵抗と並
列に10pF程度のコンデンサが必要となり応答性が悪
くなる。
(2) Ringing occurs in the head amplifier constituting the first-stage current-voltage converter, and to prevent this, a capacitor of about 10 pF is required in parallel with the feedback resistor, resulting in poor response.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は従来技術2において、なお残された問題点を解
決するため、2値のディジタル信号を扱う光受信回路に
おいて、受光素子から得られる光電流を電圧に変換し増
幅するヘッドアンプと、ヘッドアンプと対称構造を有す
るダミーアンプと、ヘッドアンプの出力のピーク値を検
出し保持するピーク検出部と、ダミーアンプの出力とピ
ーク検出部の出力からヘッドアンプの出力の中央値を作
成する平均値検出部と、ヘッドアンプの出力と平均値検
出部の出力を差動増幅する差動アンプと、差動アンプの
出力のバイアス同一電位を与える基準電位発生部と、差
動アンプ出力と基準電位発生部の出力を比較し、その大
・小を識別しディジタル信号に復元するコンパレータと
を備えた構成を特徴とする。
In order to solve the problems still remaining in Prior Art 2, the present invention provides a head amplifier that converts and amplifies the photocurrent obtained from a light receiving element into voltage, and a head A dummy amplifier having a symmetrical structure with the amplifier, a peak detection section that detects and holds the peak value of the output of the head amplifier, and an average value that creates a median value of the output of the head amplifier from the output of the dummy amplifier and the output of the peak detection section. A detection section, a differential amplifier that differentially amplifies the output of the head amplifier and the output of the average value detection section, a reference potential generation section that provides the same bias potential for the output of the differential amplifier, and a differential amplifier output and reference potential generation. It is characterized by a configuration that includes a comparator that compares the outputs of the parts, distinguishes whether the output is large or small, and restores it to a digital signal.

〔作 用〕[For production]

本発明は初段のヘッドアンプと対称な構成を有するダミ
ーアンプを設け、ピーク検出部によりヘッドのピーク値
を検出し、ダミーアンプとピーク検出部からヘッドアン
プ振幅の中間値を作り、この中間値とヘッドアンプの出
力とを差動アンプで受ける、所謂光ATC回路を構成し
、コンパレータによりATC回路の出力と基準電位を2
値化する。なおATC回路および基準電位はバイアスの
ばらつきがある程度見込めるので、コンパレータにはヒ
ステリシスを付加する。以上の構成により、従来技術2
において残された問題点が解決された。
The present invention provides a dummy amplifier having a configuration symmetrical to the first-stage head amplifier, detects the peak value of the head by a peak detection section, creates an intermediate value of the head amplifier amplitude from the dummy amplifier and the peak detection section, and A so-called optical ATC circuit is constructed in which the output of the head amplifier is received by a differential amplifier, and the output of the ATC circuit and the reference potential are divided into two by a comparator.
Value. Note that since a certain degree of bias variation can be expected in the ATC circuit and the reference potential, hysteresis is added to the comparator. With the above configuration, conventional technology 2
The remaining problems have been resolved.

次に図面にもとづき実例について説明する。Next, an example will be explained based on the drawings.

〔実施例〕〔Example〕

第1図に本発明の一実施例のブロック構成図を示す、1
はヘッドアンプ、2はダミーアンプ、3はピーク検出部
、4は平均値検出部、5は差動アンプ、6は基準電位発
生部、7はヒステリシス付コンパレータ、8は受光素子
、9は出力信号端子で、ヘッドアンプ1、ダミーアンプ
2、ピーク検出部3、平均値検出部4、差動アンプ5、
基準電位発生部6、受光素子8で光ATC回路を構成す
る。ATC回路ではヘッドアンプ1の出力とその振幅の
平均値(中央値)とを差動アンプ5で増幅するため、波
形歪が小さく、かつノイズマージンの大きい波形を出力
することができる。差動アンプ・5の出力のバイアスを
与える部分を全く対称に別途基準電位発生部6により構
成し、基準電位発生部6により作られる電位を基準電位
としてヒステリシス付コンパレータ7へ入力する。
FIG. 1 shows a block diagram of an embodiment of the present invention.
is a head amplifier, 2 is a dummy amplifier, 3 is a peak detection section, 4 is an average value detection section, 5 is a differential amplifier, 6 is a reference potential generation section, 7 is a comparator with hysteresis, 8 is a light receiving element, and 9 is an output signal At the terminals, head amplifier 1, dummy amplifier 2, peak detector 3, average value detector 4, differential amplifier 5,
The reference potential generator 6 and the light receiving element 8 constitute an optical ATC circuit. In the ATC circuit, since the output of the head amplifier 1 and the average value (median value) of its amplitude are amplified by the differential amplifier 5, a waveform with small waveform distortion and a large noise margin can be output. A portion that applies a bias to the output of the differential amplifier 5 is completely symmetrically constituted by a separate reference potential generation section 6, and the potential generated by the reference potential generation section 6 is inputted to a comparator 7 with hysteresis as a reference potential.

ヒステリシス付コンパレータば、ヒステリシス幅の制度
を向上させるため、基準電流源を統一するか、または大
振幅の出力段からの回り込みを防ぐため、出力段とそれ
以外で用いる定電流源の基準電流源は切り分けるなどの
改良を施している。
In the case of a comparator with hysteresis, in order to improve the accuracy of the hysteresis width, the reference current source must be unified, or in order to prevent large amplitude feedback from the output stage, the reference current source of the constant current source used in the output stage and other parts may be Improvements have been made, such as cutting it apart.

第2図は本発明の一実施例の回路構成図で、第3図は本
発明のヒステリシス付コンパレータの実施例の回路構成
図である。第2図において定電流源回路は省略記号で示
しである。
FIG. 2 is a circuit diagram of an embodiment of the present invention, and FIG. 3 is a circuit diagram of an embodiment of a comparator with hysteresis of the present invention. In FIG. 2, the constant current source circuit is indicated by an omitted symbol.

本発明の第2図の実施例の回路について特徴・動作など
について以下説明する。本回路の特徴は次のとおりであ
る。
The features and operation of the circuit according to the embodiment of the present invention shown in FIG. 2 will be described below. The features of this circuit are as follows.

■ 受光素子と信号処理部を一体に集積(1チツプ化)
した光受信IC用の回路を提供すること。
■ Integration of photodetector and signal processing unit (one chip)
To provide a circuit for an optical receiving IC.

■ 上記ICの性能として 1 ダイナミックレンジが大きい、 ii  高速伝送(I Mbit / sec以上)が
可能、ii  波形歪みが小さい、 iv  ノイズに強い。
■ Performance of the above IC is as follows: 1. Large dynamic range, ii. High-speed transmission (more than 1 Mbit/sec) possible, ii. Low waveform distortion, iv. Strong against noise.

本実施例に基づく動作及び機能は次のとおりである。The operations and functions based on this embodiment are as follows.

■ ダイナミックレンジが大きい ヘッドアンプにリミッタ−(Q、に相当する)を付加し
ているごとによる。ヘッドアンプの出力振幅は、PDか
ら得られる電流(■。)と帰i=抵抗R4との積で与え
られるが、Q4 (ダイ1      オード)がある
ため、■□(中0.7 ■)以下に押えられる。ダイナ
ミックレンジが大きいので、種々の光量変化(伝送距離
の違いによる光量変化、LEDの温度特性経年変化等)
に無調整、すなわち外付は部品不要で対応できる。
■ This is due to the fact that a limiter (equivalent to Q) is added to the head amplifier, which has a large dynamic range. The output amplitude of the head amplifier is given by the product of the current (■.) obtained from the PD and the return i = resistance R4, but because of Q4 (diode 1), it is less than ■□ (medium 0.7 ■). be held down by Since the dynamic range is large, various changes in light intensity (changes in light intensity due to differences in transmission distance, changes in LED temperature characteristics over time, etc.)
No adjustment required, that is, no external parts are required.

■ 高速伝送が可能 伝送速度はI Mbit / sec以上程度、得られ
る。PD一体型光受信ICでは以下に述べる理由により
100 Kbit / secオーダが主流でM b 
i【へesオーダを達成した例は未だない。
■ High-speed transmission is possible Transmission speeds of IMbit/sec or higher can be obtained. For PD-integrated optical receiver ICs, 100 Kbit/sec order is mainstream for the reasons described below.
There is no example yet of achieving the i[es order.

PDと信号処理部を一体に準備し1チツプ化する場合S
iバイポーラ(Si −bipolar )プロセスで
同時に作り込む方法が主流で、この際PDの接合容量は
面積に比例し、IIIIlltで50〜100pF (
逆バイアス=o■として)程度の大きさとなり、応答性
を著しく悪くする要因となっていた。本発明では、この
点を改良する方法として、 i  PDの接合容量は逆バイアスを大きくがけると減
少する。
When preparing the PD and signal processing section as one chip S
The mainstream method is to simultaneously fabricate the PD using the i-bipolar (Si-bipolar) process. In this case, the junction capacitance of the PD is proportional to the area, and is 50 to 100 pF (
Assuming reverse bias=o■), this was a factor that significantly worsened the responsiveness. In the present invention, as a method to improve this point, the junction capacitance of i PD is reduced by applying a large reverse bias.

1iPDアノード、カソード間電位に入力依存性をもた
せず一定に保持すれば、応答性は改善される。
If the potential between the 1iPD anode and cathode is held constant without input dependence, the response will be improved.

以上の2点に着目して、ヘッドアンプを設計した。つま
り、Q3のベース電位を常に2■、6(1,4V)に固
定し、PDの逆バイアスとして3゜6■程度を常に印加
している。
We designed the head amplifier with the above two points in mind. That is, the base potential of Q3 is always fixed at 2.6.6 (1.4 V), and about 3.6.degree. is always applied as a reverse bias to the PD.

しかし、上記手段だけでは限界がある。R4はゲインを
与え、できる限り大きい方が望ましいが、(ダイオード
(Q4)の接合容量(lp F)との関係からも)大き
すぎると応答性を悪くする。立上り、立下りがどうして
もなまってしまう。そこで本発明では後述するATC機
能を付加して、アンプ光が波形の平均値(中間値)でス
ライスし、応答性、波形歪等の改善を行なっている。
However, the above means alone have limitations. R4 provides a gain and is preferably as large as possible; however, if it is too large (also from the relationship with the junction capacitance (lpF) of the diode (Q4)), the response will deteriorate. The rise and fall are inevitably sluggish. Therefore, in the present invention, an ATC function, which will be described later, is added to slice the amplifier light at the average value (intermediate value) of the waveform, thereby improving responsiveness, waveform distortion, etc.

■ 波形歪が小さい ATC機能を付加したため、出力波形のパルス歪は小さ
い。
■ Low waveform distortion Since the ATC function is added, the pulse distortion of the output waveform is small.

■ ノイズに強い ATC方式は波形歪を小さくできる利点があるが、DC
レベルの判別が難しく、誤動作を起こしやすい。本発明
では、ヘッドアンプと対称回路のダミーアンプとバイア
ス差を予め与えておきDCレベルの判別も容易にしてい
る。しかし、この差はあまり大きくとれず(受信感度が
悪くなるため)10mV程度である。
■ The noise-resistant ATC method has the advantage of reducing waveform distortion, but
Difficult to determine the level and prone to malfunction. In the present invention, a bias difference between the head amplifier and the dummy amplifier of the symmetrical circuit is given in advance to facilitate discrimination of the DC level. However, this difference cannot be made very large (because the receiving sensitivity deteriorates), and is about 10 mV.

ここでバイアス差をつけたとしても、後段(平均値検出
部、差導アンプ等)の■□のばらつき等を考慮すると最
終的に2値化するコンパレータ入力段ではかなりのバイ
アスのばらつきを考慮しておく必要がある。従って、前
の情報を保持し、それ以上の変化がないと反転しないヒ
ステリシス機能をコンパレータに付加する。このヒステ
リシス幅はR1と、定電流源(Q、。
Even if a bias difference is made here, considering the variations in ■□ in the subsequent stages (average value detection section, differential amplifier, etc.), there will be considerable bias variations in the comparator input stage that will ultimately be converted into binary data. It is necessary to keep it. Therefore, a hysteresis function is added to the comparator that retains the previous information and does not reverse unless there is a further change. This hysteresis width is R1 and a constant current source (Q,).

のコレクター電流)の積で与えられ30mV程度として
いる。
collector current), and is approximately 30 mV.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の光受信回路によると、受
光素子を含め、信号処理部まで完全に1チツプIC化が
可能であるとともに、次の利点がある。
As explained above, according to the optical receiving circuit of the present invention, it is possible to completely integrate the signal processing section including the light receiving element into a single chip IC, and it has the following advantages.

■ へラドアップの改良とATC方式を用いていること
から、高速伝送が可能であり、かつ波形歪の小さい出力
が得られる。
- By using an improved Radup and ATC method, high-speed transmission is possible and an output with low waveform distortion can be obtained.

■ ピーク検出部はホールドするまでの時間が比較的短
か(、一旦ホールドすると復帰するまでの時間が長いの
で、ホールド時間の長い良好なATC機能が達成できる
(2) Does the peak detection section take a relatively short time to hold (once it is held, it takes a long time to recover, so a good ATC function with a long hold time can be achieved).

■ 従来の微分方式に替え、波形の中央値で識別するA
TC回路を用いるため、ノイズにも強い。
■ Instead of the conventional differential method, A that identifies based on the median value of the waveform.
Since it uses a TC circuit, it is also resistant to noise.

■ ヘッドアンプにリミッタ回路を付加することにより
、ダイナミックレンジが大きい。
■ By adding a limiter circuit to the head amplifier, the dynamic range is large.

以上のように、本発明は、光通信の普及がますます進み
、今度、高速化、小型化、低価格化、さらに、たとえば
高速伝送が可能、ダイナミックレンジが大、ノイズに強
いなどの高性能の光受信のモノリシックICの要求に対
し適用してその効果が顕著である。
As described above, the present invention has been developed as optical communication is becoming more and more popular, and it is now possible to achieve faster speeds, smaller sizes, lower prices, and even higher performance such as high-speed transmission, large dynamic range, and resistance to noise. The effect is remarkable when applied to the requirements of monolithic ICs for optical reception.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のブロック構成図、第2図は
本発明の一実施例の回路図、第3図は本発明のヒステリ
シス付コンパレータの実施例の回路図、第4図は光受信
回路の基本構成図、第5図は増幅回路の出力波形である
。 1・・・ヘッドアンプ、2・・・ダミーアンプ、3・・
・ピーク検出部、4・・・平均値検出部、5・・・差動
アンプ、6・・・基準電位発生部、7・・・ヒステリシ
ス付コンパレータ、8・・・受光素子、9・・・出力信
号端子、41・・・受光素子、42・・・増幅回路、4
3・・・コンパレータ、44・・・出力信号端子 本発明の一実8%!例のプロ・ツク構成図第1図 光受信回路の基本構成図 ′M 4 図 1惺回路の出力波形 第5図
FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a circuit diagram of an embodiment of the present invention, FIG. 3 is a circuit diagram of an embodiment of a comparator with hysteresis of the present invention, and FIG. 4 is a circuit diagram of an embodiment of the present invention. FIG. 5, which is a basic configuration diagram of the optical receiving circuit, shows the output waveform of the amplifier circuit. 1...Head amplifier, 2...Dummy amplifier, 3...
- Peak detection section, 4... Average value detection section, 5... Differential amplifier, 6... Reference potential generation section, 7... Comparator with hysteresis, 8... Light receiving element, 9... Output signal terminal, 41... Light receiving element, 42... Amplifying circuit, 4
3... Comparator, 44... Output signal terminal 8% of the present invention! Example program block diagram Figure 1 Basic configuration diagram of optical receiver circuit 'M4 Figure 1 Output waveform of optical circuit Figure 5

Claims (4)

【特許請求の範囲】[Claims] (1)2値のディジタル信号を扱う光受信回路において
、 受光素子から得られる光電流を電圧に変換し増幅するヘ
ッドアンプと、 前記ヘッドアンプと対称構造を有するダミーアンプと、 前記ヘッドアンプの出力のピーク値を検出し保持するピ
ーク検出部と、 前記ダミーアンプの出力と前記ピーク検出部の出力から
前記ヘッドアンプの出力の中央値を作成する平均値検出
部と、 前記ヘッドアンプの出力と前記平均値検出部の出力を差
動増幅する差動アンプと、 前記差動アンプの出力のバイアスと同一電位を与える基
準電位発生部と、 前記差動アンプの出力と前記基準電位発生部の出力とを
比較し、その大・小を識別しディジタル信号に復元する
コンパレータとを備えてなる ことを特徴とする光受信回路。
(1) An optical receiving circuit that handles binary digital signals includes: a head amplifier that converts a photocurrent obtained from a light receiving element into voltage and amplifies it; a dummy amplifier having a symmetrical structure with the head amplifier; and an output of the head amplifier. a peak detection section that detects and holds the peak value of the head amplifier; an average value detection section that creates a median value of the output of the head amplifier from the output of the dummy amplifier and the output of the peak detection section; a differential amplifier that differentially amplifies the output of the average value detection section; a reference potential generation section that provides the same potential as the bias of the output of the differential amplifier; and an output of the differential amplifier and an output of the reference potential generation section. 1. An optical receiving circuit comprising: a comparator that compares the signals, distinguishes whether the signals are large or small, and restores it to a digital signal.
(2)前記ヘッドアンプと前記ダミーアンプはバイアス
に差をつけてなることを特徴とする特許請求の範囲第1
項記載の光受信回路。
(2) Claim 1, characterized in that the head amplifier and the dummy amplifier have different biases.
Optical receiver circuit described in section.
(3)前記ピーク検出部は、 ベースを前記ヘッドアンプの出力に接続し、コレクタを
接地し、 エミッタをコンデンサと定電流回路の並列体を介して電
源に接続したPNPトラジスタにより構成してなる ことを特徴とする特許請求の範囲第1項記載の光受信回
路。
(3) The peak detection section is constituted by a PNP transistor whose base is connected to the output of the head amplifier, whose collector is grounded, and whose emitter is connected to a power supply via a parallel body of a capacitor and a constant current circuit. An optical receiving circuit according to claim 1, characterized in that:
(4)前記コンパレータは、ヒステリシス機能を有して
なにことを特徴とする特許請求の範囲第1項記載の光受
信回路。
(4) The optical receiving circuit according to claim 1, wherein the comparator has a hysteresis function.
JP61128579A 1986-06-03 1986-06-03 Optical reception circuit Pending JPS62285537A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61128579A JPS62285537A (en) 1986-06-03 1986-06-03 Optical reception circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61128579A JPS62285537A (en) 1986-06-03 1986-06-03 Optical reception circuit

Publications (1)

Publication Number Publication Date
JPS62285537A true JPS62285537A (en) 1987-12-11

Family

ID=14988239

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61128579A Pending JPS62285537A (en) 1986-06-03 1986-06-03 Optical reception circuit

Country Status (1)

Country Link
JP (1) JPS62285537A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0715387A (en) * 1993-06-15 1995-01-17 Nec Corp Optical receiver
US6084232A (en) * 1997-11-13 2000-07-04 Matsushita Electric Industrial Co., Ltd. Optical receiver pre-amplifier which prevents ringing by shunting an input current of the pre-amplifier
WO2007007747A1 (en) * 2005-07-12 2007-01-18 Hamamatsu Photonics K.K. Photodetection circuit
JP2015076652A (en) * 2013-10-07 2015-04-20 ソニー株式会社 Optical reception circuit, optical reception device and optical transmission system
JP2016205973A (en) * 2015-04-21 2016-12-08 シャープ株式会社 Light pulse detection circuit and electronic apparatus
US9847842B2 (en) 2014-03-03 2017-12-19 Panasonic Intellectual Property Management Co., Ltd. Optical reception circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59257A (en) * 1982-06-25 1984-01-05 Pioneer Electronic Corp Digital modulating signal reader

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59257A (en) * 1982-06-25 1984-01-05 Pioneer Electronic Corp Digital modulating signal reader

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0715387A (en) * 1993-06-15 1995-01-17 Nec Corp Optical receiver
US6084232A (en) * 1997-11-13 2000-07-04 Matsushita Electric Industrial Co., Ltd. Optical receiver pre-amplifier which prevents ringing by shunting an input current of the pre-amplifier
WO2007007747A1 (en) * 2005-07-12 2007-01-18 Hamamatsu Photonics K.K. Photodetection circuit
JP2007027209A (en) * 2005-07-12 2007-02-01 Hamamatsu Photonics Kk Light detection circuit
US8143564B2 (en) 2005-07-12 2012-03-27 Hamamatsu Photonics K.K. Photodetection circuit
JP2015076652A (en) * 2013-10-07 2015-04-20 ソニー株式会社 Optical reception circuit, optical reception device and optical transmission system
US9847842B2 (en) 2014-03-03 2017-12-19 Panasonic Intellectual Property Management Co., Ltd. Optical reception circuit
JP2016205973A (en) * 2015-04-21 2016-12-08 シャープ株式会社 Light pulse detection circuit and electronic apparatus

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