JPS6085649A - Optical reception circuit - Google Patents

Abstract

PURPOSE:To attain a monolithic photodetecting circuit with wide dynamic range and small pulse distortion by constituting the circuit with a photocurrent-voltage converting circuit, a differentiation circuit, a reference voltage generating circuit, a comparator circuit and an output stage. CONSTITUTION:A signal (s) is obtained by the photocurrent-voltage converting circuit A, the signal (s) is conduct to a delay circuit comprising a resistor R3 and a capacitor C2, from which a signal (t) is obtained and a differentiation signal (u) is obtained at a collector of a transistor (Tr) 4 by applying differential amplification to the signal (t). Then a reference voltage Vc is generated so as to be equal to an average voltage of the differentiation signal (u). In this case, a potentialf at a connecting point (w) is made equal to an average value <u> of the differentiation outputs (u) and the result is used as the reference voltage Vc. a comparator circuit D compares the signal (u) with the voltage Vc and binary-codes it. A hysteresis is given to the signal (u) as follows: A differentiation signal U is a potential of an emitter of a TR8 and the subtraction of a prescribed voltage from the differentiation output (u). The reference voltage Vc is the subtraction of a prescribed voltage from a potential at the point (w). The Vc is compared with (U+DELTAV) at D=H, the output D is kept ''H'' or brought into ''L'', where DELTAV is the hysteresis, and the Vc is compared with (U-DELTAV) at D=L, and the D is kept to ''L'' or brought into ''H'' depending on the result.

Description

DETAILED DESCRIPTION OF THE INVENTION G) Technical Field The present invention relates to an optical receiving circuit in an optical communication system.

This is done by converting an optical communication signal into an optical signal, transmitting it through an optical fiber, and then converting the optical signal back into an electrical signal.

The receiving circuit includes a photoelectric conversion element such as a photodiode or an avalanche photodiode, and a circuit that amplifies the current flowing through the element and restores the signal.

The signal sent may be a digital signal or an analog signal. Here, we will deal with optical receiver circuits that target digital signals.

Since it is a digital signal, a signal identical to the original digital signal can be restored by amplifying the minute photocurrent in the receiving circuit and shaping the waveform through a binarization circuit including a comparator.

(b) Conventional technology and its problems FIG. 4 shows a conventional optical receiving circuit.

The cathode of the photodiode 20 is connected to the power supply Vcc, and the anode is connected to the inverting input of the operational amplifier 21. The inverting input of operational amplifier 21 is pulled above ground potential by battery 22.

The resistor 23 feeds back the output of the operational amplifier 21 to the inverting input.

The output voltage Vd is the DC voltage Vo of the battery 22 and the photocurrent I.
It becomes the sum of the product of p and the resistance (-Rf IP)-.The photodiode current is increased by the resistors R, f and the amplifier to
The voltage has been converted.

The reason for adding the DC voltage Vo is that the output voltage (2) d can fluctuate upward and downward between 0 to '' and Vcc, centering on (1)0, without becoming saturated.

The AC component of the output voltage Vd is the photodiode current I +
) and the resistance is given by the product of '.

Rf determines the amplification factor. If the amount of light incident on the photodiode is small, the alternating current portion of the output voltage Vd will become too small and fall below the threshold level of the next-stage comparator, making it impossible for the comparator to properly binarize it. .

Increasing Rf can alleviate such a problem with weak optical signals. However, conversely, when the optical power incident on the photodiode is large, the transistor in the amplification section becomes saturated.

This reduces the response speed and distorts the waveform.

Therefore, in such a circuit configuration, for example, when using a single 5V power supply, a large dynamic range (for example, 30d
Obtaining B) was extremely difficult.

Furthermore, if the entire circuit is to be made into a monolithic IC, it is difficult to create a high resistance. It is difficult to create a resistance of 100 KΩ. The photocurrent of the photodiode is 0.1
If it is μ8~100μA, using this resistor,
The alternating current portion of the output is 1QmV to IOV. When using a power supply of 5■, it will become saturated with large optical power.

When making a monolithic IC, the resistance should be between 20Ω and 30Ω.
A value less than or equal to Ω is selected. This is because it is easy to make products with such low values. However, in this case, weak signals cannot be sufficiently amplified.

If a large dynamic range is not required, saturation can be prevented by appropriately selecting the value of the negative feedback resistor Rf. However, even in this case, since the output voltage is proportional to the optical power incident on the light receiving element, it becomes difficult to set the reference voltage of the comparator.

This will be explained with reference to FIG. Suppose that three types of signals with different powers come in. From largest to largest, Sl, 5
2, S3. Suppose that the output after amplification appears as shown in FIG. 5 fa) in proportion to the intensity of the optical signal. The pulse width is the same in all cases, but SL, S2,
The pulse height is high at 1+H of S3.

Since they are originally digital signals and have the same pulse width, they must be waveform-shaped to have equal pulse widths. However, if the reference voltage Vc of the comparator is fixed to a constant value, this will not happen.

For example, suppose that 1/2 of the peak value of the output of the signal S3 corresponding to the minimum reception level is set as the reference potential "vc.The waveform after passing through the comparator is S3゜S2,S
Regarding l, it is not shown in (1)), (C), fd).

In SL with large optical power, V
c and returns to below Vc at a slow falling stage. (d)
This has the longest pulse width W1 as shown in FIG.

For S3, where the optical power is small, it is slow to exceed Vc and quick to return below Vc. As shown in (1)), it has the shortest pulse width W3.

In this way, if the power of the light is strong, the pulse width will be long, and if the power of the light is weak, the pulse width will be short.

However, since the original pulse widths are the same, they should not change to different pulse widths like this.

This is because the comparator reference voltage Vc of the comparison circuit is fixed regardless of the magnitude of the pulse signal.

It would be sufficient to change the reference voltage Vc according to the amplified output. For this purpose, ATC (Aut
o Tl1reshold Level Control
l) A method has already been devised. However, when trying to realize this circuit using a monolithic IC, there were problems such as (1) the circuit became complicated, and (11) external capacitors for storing maximum and minimum values were required.

The capacitor for storing the maximum value and minimum value must have a capacitance of, for example, 1 μF to 1 μF.

Currently, only 10 capacitors can be fabricated on a wafer using monolithic IC technology.
PF~20 PF or less.

(1) Purpose of the Invention The object of the present invention is to provide a monolithic optical receiver circuit with a wide dynamic range and low pulse distortion.

(1) Examples FIG. 1 is a diagram of an optical receiving circuit according to an embodiment of the present invention.

This circuit consists of a current-voltage conversion circuit A, a differentiation circuit B, a reference voltage generation circuit C1, a comparison circuit D, and an output stage E.

k1 to R13 are resistors. Tri to Tr 24 are transistors, and cl and C2 are capacitors. ■1~
113 indicates a constant current circuit.

All of these are monolithic IC circuit elements. Manufactured using a wafer process on a semiconductor single crystal substrate. It is not made by assembling individual parts on a printed circuit board.

Capacitor c1. C2 is a small capacitor, for example, C1 is about 5PF and C2 is about 10 pF, but these can be manufactured by a wafer process.

A constant current circuit is a combination of several transistors and resistors, and is already widely used in monolithic ICs. Since it can be configured using a well-known circuit, illustration of the internal circuit is omitted.

Although the power supply voltage is assumed to be 5■, this circuit always functions well no matter what the power supply voltage is, as long as the constants are changed appropriately.

The current-voltage conversion circuit A will be explained in order.

A. Current-Voltage Conversion Circuit ``A constant current circuit 11, the collector and emitter of the transistor Tri, and forward diodes Di, D, and 2 are connected between the power source Vcc and the ground.

A transistor rr2 and a constant current circuit I2 are connected in series between the power supply and the ground.

The base of the transistor Tr)2 is the transistor Trl
It is connected to the collector and constant current circuit (1). A photodiode PD is connected in the opposite direction between the base of the transistor Tri and the ground.

The photodiode PD includes the base-emitter voltage drop of the transistor Tri and the diode's pn junction (Dl, D2
) A voltage equal to the voltage drop is applied. For example, about 1.8■
That's about it.

the base of the transistor Tri, the transistor Tr2,
Between the connection points of constant current circuit ■2, there is a capacitor C1,
1 is connected to the resistor.

The capacitor C1 is for preventing oscillation and has a value of about 5 pF, for example.

The resistor 1 is a resistor for current-voltage conversion.

The larger the value, the higher the amplification factor, but since it is an element of a monolithic circuit, it is limited to 20Ω to 30I (Ω).

When the photocurrent 1p is O, constant currents II and I2 are flowing through both the transistors Tri and Tr2. transistor T
The value of the base current of rl is fixed to a constant value by step 1. Only this base current flows through the resistor R1. The emitter potential of the transistor Tr2 is Trl
The base emitter of Dl.

It is given by the sum of the forward voltage drop of D2 and R1×(base current).

Assume that an optical signal enters a photodiode PD.

A photocurrent Ip flows. Then, the emitter voltage of the transistor Tr2 increases by the product of Ip and R1.

This is the voltage signal. Since the potential at the connection point between the transistor Tr2 and the constant current circuit I2 is not determined by their own states, it can be determined by IpRl.

B. Differentiating circuit In the present invention, after the photocurrent is amplified, it is passed through a differentiating circuit instead of immediately entering a comparator circuit for binarization.

A differentiation circuit converts the rising edge of the signal into an upward pulse, and the falling edge of the signal into a downward pulse.

However, this is not entirely new; after amplification,
An optical receiving circuit that passes through a differential circuit has also been proposed.

Two transistors Tr3. Tr4 is balanced and used as a differential amplifier. The emitters of the two transistors are common and connected to ground via a constant current circuit I3. Transistor Tr 30:) The base is connected to the output of any current-voltage conversion circuit A via a resistor R2. The base of the transistor T r 4 is also connected to the output of the current-voltage conversion circuit A via the resistor R3.

However, the base of transistor Tr4 is further connected to ground via capacitor C2. Resistor R3 and capacitor C2 constitute a delay circuit.

The collector of the transistor T r 3 is connected to the power supply Vcc. The collector of the transistor Tr4 is a resistor R4.
It is connected to Vcc via.

The solid line in FIG. 2(a) shows the output signal of the current-voltage conversion circuit A. This is equal to the base voltage of transistor T r 3.

The change in the base voltage of transistor T r 4 is R3,
Since it is delayed due to C2, it changes as shown by the broken line of ia+.

Then, the solid line S and the broken line differ in the rising and falling edges of the pulse. At this time, two transistors Tr3
．． Tr4 becomes unbalanced. At equilibrium, approximately the same current flows through both transistors, but the diagonal line (
sL), the area becomes unbalanced and the resistance R4
The current flowing through changes.

Therefore, the collector voltage of T r 4 changes. This is a differential waveform as shown in FIG. 2 (bl, (C1).

The speed of temporal decay of the differential waveform is determined by R3C2. - In the example R3 is 3QKΩ and C2 is 10 pF.

If the power of the input optical signal is small, the differential waveform is fb)
If the power is large, the differential waveform (C) may be saturated at the top and bottom. However, since the product of R3 and C2 is narrower than the pulse width, the differential waveform always returns to its original level before one pulse ends. Therefore, there is no problem of delay in operation time due to saturation.

In this way, the collector u of transistor T r 4
Here, a differential waveform of the amplified signal appears.

C9 reference voltage generation circuit This converts the differential signal U to the next stage comparator rake at tT.
This is a circuit for generating a voltage Vc which becomes a reference for dividing into HI+ and 'L'.

If the average value of the differential signal is determined and used as a reference voltage, the pulse width can be a constant value regardless of the pulse height. In order to calculate the average value of the differential signal, it is sufficient to create a series body of a resistor and a capacitor, and use this to average the differential signal. The values thus obtained are exact average values.

To do this, the time constant of the resistor-capacitor averaging (smoothing) circuit must be much longer than the pulse repetition time. Therefore, the capacitor becomes too large.

I want to make the entire circuit monolithic, but if I have to attach a large capacitor, a monolithic circuit element will suffice, but I will have to use a capacitor externally.

Attaching an external capacitor increases the volume of the circuit and may reduce reliability.

Therefore, instead of directly averaging the differential signals, the average value is determined in advance.

Transistor T r 5 and constant current circuit I5 are connected to power supply V
Connect in series between cc and ground.

Resistor R7 and constant current circuit 6 are connected in series between Vcc and ground.

Connect resistor R7, constant current circuit 16, and -1-r 60:) heath. The potential of this connection point W is made equal to the average value <u> of the output U of the differentiating circuit.

To do this, it is sufficient that the average voltage applied to the resistor R4 and the voltage applied to R7 in the differentiator circuit l are equal, so 4I3 = R715. The right side is the potential at point W (from Vcc), and the left side is the potential at point U at equilibrium. At equilibrium, Tr3. Tr
4, the current flows by I3/2.

For example, in case of 3-6, R7 is set to 1/2 of R4.

The potential at point W is determined in this way. Transistor Tr5. Tr7 is in the form of an emitter follower, and provides a reference voltage Vc obtained by subtracting the base-emitter drop twice from this potential and inputs it to the comparator of the comparison circuit.

Since the voltage relationship must not change due to temperature changes, Tr5 and Tr6, Tr3 and Tr7, and resistors R5 and R5 are made to have the same characteristics.

There is a possibility that the voltage at point W given in advance and the average <u> of the differential signal U may be different. However, since the average of the differential is always 0, if there is a drift, it is the DC component that drifts.

The DC component is Tr3. As long as Tr4 is balanced, it will be a constant value and will not drift.

Therefore, the voltage at point W can always give the average value <u> of the differential signal U.

D. Comparison circuit This is a circuit that compares the differential signal obtained by the differential circuit with a reference voltage and converts it into two values (H and L).

If the differential waveforms shown in 28 ib) and fc) are directly compared with the reference voltage using a converter, the pulses will simply be shaped into a rectangular shape, and the pulse width will be so that it is equal to the original pulse,
Not restored.

Between the upward pulse and the downward pulse, II H11,
Between the downward pulse and the upward pulse, it must be converted to L''.

Therefore, we decided to give hysteresis to the differential signal.

With hysteresis, the upward pulse enters the comparator and the output remains H'' even if the input returns to O after it becomes jl [(II).

The output changes to "L" only when a downward pulse is input to the comparator.

To provide hysteresis, do the following: Let the differentiated signal be U. The potential of the emitter of T r 8 is the output U of the differentiator circuit minus a constant voltage.

Let the reference voltage be Vc. This is the W of the reference voltage generation circuit C.
It is the potential of a point minus a constant voltage.

If the output of the comparator circuit is D, then simply the signal U and the reference Vc
It does not mean that D is L or I (by comparing .

Assuming the hysteresis as Δ■, (i) When D-1-I, compare Vc and (toward U+8).

If the latter is large, D==I-I is left as is, and if the latter is small, 1) is changed to L.

When till D=L, compare Vc and (U-Δ■).

If the latter is small, D-L is left as is, and if the latter is large, D is changed to H.

The reference voltage VC obtained by the base voltage generating circuit C is applied to the base of the transistor Trll. The signal voltage of the differentiating circuit 5 is applied to the base of the transistor Tr12 through a resistor R5, a transistor Tr8, and a resistor R8.

The comparator is a transistor Trll.

Tr l 2 , transistors Tr l 3 and Tr l 4 whose emitters are connected to each other, and transistors Tr l 5 and T whose collectors are connected to each other.
It consists of r l 5, etc.

Transistor Tr9. TrlQ is for supplying constant current to these symmetrical comparators.

pnp type 1-transistor Tr9. The emitter of TrlQ is connected to Vcc, and the bases are connected to each other.

The collector of the transistor T r 9 is a constant current circuit 19
connected to earth through. The bases of transistors Tr l 3 and Tr l 4 in the symmetrical comparator are also connected to the collector of Tr 9.

The base and collector of the transistor T r l Q are connected. The collector is further connected to the collectors of two transistors Tr l l and Tr 12 of the comparator.

The emitters of the transistors Tr 15 and Tr l 5 are grounded, and the base and collector of the transistor Tr 15 are connected.

The transistors T r 9 to T r l 5 constitute a comparator, and the output becomes the collector of the transistor Trl'5.

The base voltages of transistors Tr l l and Tr l 2 are compared. The base voltage of Trll is Vc, Tr1
The base voltage of 2 is (U±Δ■).

If the base voltage of Trll is lower than that of Tr 12, the base currents of Tr 12 and Tr l 4 become Tr
ll.

It becomes larger than the base current of Tr13. T r l 3
Since the base current of T r l 3 decreases, the collector current of T r l 3 decreases and the collector voltage decreases. In other words, the voltage at the collector X of the transistor T r l 5 decreases.

If the base voltage of Trll is higher than that of T r 12, the voltage of X increases.

A constant current circuit 110 and a series transistor Tr17 are connected between the power supply Vcc and the ground.The base of the transistor Tr17 is connected to the X point.

The collector of transistor 1r17 is resistor R9.

Through R10, transistor Tr18. Tr21(D
connected to the base.

When the voltage at point X is low, the transistor Tr17 is off because no base current flows.

When the voltage at the X point is high, the transistor Tr17 is conductive. Accordingly, the transistor Tr l8. Tr21
Also works on and off accordingly.

The hysteresis circuit included in the comparison circuit includes constant current circuits 111 and 112, and an h transistor Tr18°Tr.
It consists of l 9 , Tr 2Q, and resistor R8.

The emitter of the transistor Tr18 is grounded, and the collector is connected to the power supply Vcc via a constant current circuit Ill.

The emitter of the transistor Tr19 is grounded, and the base and collector are connected to each other. The collector is a constant current circuit■
It is also connected to 11.

The emitter of the transistor Tr20 is grounded.

The collector is connected to Vcc l via a constant current circuit 112. The collector is connected to the base of the transistor Tr12 whose collector is simultaneously d, :] and i<.

Let e be the current flowing from the constant current circuit to the base of Tr12 and the resistor R8, and f be the current flowing to the collector and emitter of Tr2Q. e, E, 1.12 is e + f = I
12 (1).

The current flowing from constant current circuit Ill to Tr13 is g, T
Let h be the current flowing to r19. g, h.

Ill between g + h = I 11 (2) becomes true.

Tr19. The emitter of Tr20 is grounded, and the base voltage is always equal. Since they are made as equivalent transistors, the currents are always equal and there is a relationship of b = f' (3).

When Tr17 is off, Tr18 is saturated. Since all Ill flows through Tr18, r, 11 becomes O.

In other words, e=112, and this much current flows through R8.

Then, the base of transistor Tr12 becomes R811.
Rise astride. This is upward hysteresis.

When the base voltage of T r l 2 is higher than that of Trll, the voltage at point It is higher than the emitter U of r3 by R8112, giving upward hysteresis, cis+ΔV=R8112(4).

When the base voltage of Tr12 is lower than that of Trll,
The voltage at point X increases and Tr17 is turned on.

Since Tr18 is off, Ill is all T r l
Flows through 9. h becomes equal to Ill, (1), (
From equation 3), the feedback current e is e = I 12 - I 11 (5) . Set this so that it is negative.

Due to the negative feedback current, the base of Tr12
The downward hysteresis -ΔV= than the emitter voltage U of
It will descend by (112-Ill)R8(6).

112 = I 11 / 2 (7) If the equation is selected, the absolute values of the upward and downward hysteresis will be equal.

Let me give an example. I 11 = 20 μA, 112 = 10
When μA and R8=lKΩ, the hysteresis is ±Δ■
= ± lQ mV.

FIG. 3(a) shows the voltage waveform at the base of transistor T r 12. Above Vc, U+Δ■, and Vc
Below, it becomes U-ΔV. Since there is hysteresis in this way, the output U (or U) of the differentiating circuit is above Vc and U from the upward pulse to the downward pulse.
can be made to be lower than Vc between the downward pulse and the upward pulse.

E. Output stage This amplifies the output of the comparator. If the base of comparator Tr12 (U+ΔV) is higher than Vc, T r l 7 is off. On the contrary, (U−Δ
(2) is lower than Vc, T r l 7 is on.

The output stage E includes transistors Tr21 to -r r24, resistors R11 to R13, and a diode D3.

A constant current circuit 113)) A series body of transistors T r 21 is connected between V c c and ground.

The collector of T r 22 is connected to Vcc via resistor R11, and the emitter is connected to ground via R12. The base of T r 22 is connected to the collector of T r 21.

In the final stage, resistors R13 and T
A series body of r23, diode D3, and Tr24 is connected. The base of the output transistor Tr23 is connected to the base of the output transistor Tr22.
The base of Tr 24 is connected to the collector of Tr 24 and the emitter of Tr 22.

Diode D3 prevents reverse voltage from being present at the emitter and base of T r 23. The output E is taken out from the connection point between D3 and the collector of the transistor T r 24.

(i) When U+Δv>VC, the collector voltage of Tr17 increases. Tr21 is turned on. Tr22 is turned off. The base voltage of Tr 23 increases and the base voltage of Tr 24 decreases. T r 23 becomes conductive and T r 24 becomes non-conductive. Output E is 1'H"
become.

Scream U-ΔV (In the case of V c, the collector voltage of T r l 7 decreases. Tr21 turns off. T r 224i turns on. - r r 23
is turned off and Tr24 is turned on. The output E is tl
It becomes L″′.

Diode D3 reduces the collector voltage of T r 24 to T
From the emitter voltage of r23, the pn junction voltage drop (0,
By lowering the voltage by about 6 V), T r 23 is prevented from becoming partially conductive when Tr 22 is saturated.

D3 allows T r 23 to be turned off more completely.

FIG. 3 (bl is a graph showing the waveform of the output E.

, it can be seen that this restores the optical signal (see Figure 2 (als). Regardless of the strength of the optical signal, the width of the restored pulse is equal to the original pulse width. At that,
The part that emits differential pulses (upward and downward) is independent of the strength of the optical signal.

Since the signal is differentiated, the strength of the original optical signal cannot be directly reflected in the subsequent signal. Even if the optical power is too large, the equilibrium state (Tr3, Tr4) is quickly returned after a sharp pulse is output, so that the transistor does not become saturated due to a large signal and the operation becomes slow.

E) Structure of the present invention The optical receiver circuit of the present invention has the following features: (1) One or more diodes DI, . amplification transistor Tr
(2) a current-voltage conversion circuit A that converts a photocurrent into a voltage using a resistor 1 connected to the output of 2 and the base of the transistor Trl; (2) a current-voltage converted signal S and passing the signal to a delay circuit; and (3) a reference voltage generation circuit C that generates a constant reference voltage Vc predetermined to be equal to the average voltage of the differential signal. (4) A comparator that compares the differential signal plus a constant hysteresis voltage ±Δ■ with the reference voltage Vc, and a constant positive voltage (sufficient) added to the differential signal when the differential signal is higher than the reference voltage Vc. ΔV) and a hysteresis adding circuit that adds a constant negative voltage (-Δ■) to the differential signal when the differential signal is lower than the reference voltage V・c; and (5) the output of the comparison circuit. and an output stage E for amplification.

(Power) Effects The optical receiving circuit of the present invention can achieve the following excellent effects.

(1) A large dynamic range can be achieved.

This is because a differentiating circuit is used in the amplification section.

(2) Pulse distortion can be reduced.

This is because the differentiating circuit can accurately detect the changing points (rising, falling) of the input pulse. The pulse width does not vary depending on the magnitude of the optical power.

(3) The influence of dark current of the light receiving element can be canceled.

Since the dark current of a light-receiving element changes with temperature, it is difficult to eliminate the influence of dark current in conventional optical receiver circuits that perform DC amplification. In the present invention, since the signal passes through a differentiating circuit, all DC components such as dark current are cut off.

(4) Decrease in frequency characteristics caused by junction capacitance of the light-receiving element can be improved to some extent.

Connect the light receiving element to the base of the transistor in reverse bias,
This is because one or more (two in this example) diodes are connected to the emitter of this transistor in the forward direction.

Therefore, the reverse voltage applied to the light receiving element increases, and the frequency characteristics are improved.

In the conventional circuit shown in FIG. 4, the output Vd is always lower than the battery potential Vo. ■0 to widen the output range
Therefore, it was not possible to apply a sufficient reverse voltage to the light receiving element.

(5) Since a large capacitor is not required,
It can be in the form of a completely monolithic IC. This results in a small, reliable, and easy-to-use element.

[Brief explanation of drawings]

FIG. 1 is an optical receiving circuit diagram according to an embodiment of the present invention. FIG. 2 is a waveform side diagram of each circuit in the optical receiving circuit. The solid line S in fa) indicates the output S of the current-voltage conversion circuit,
The broken line [indicates the output of the delay circuit. +b) indicates the output U (or U) of the differentiating circuit when the optical power is small. (C) is the output U of the differentiator circuit when the optical power is large (
or U). FIG. 3 (at shows the base voltage waveform of one transistor constituting the comparator of the comparison circuit, and (bl shows the voltage waveform of the output E of the output stage.) FIG. 4 shows a conventional optical receiver circuit. 5 is a waveform diagram for explaining that the pulse width varies depending on the magnitude of the amplified signal. (a) shows the waveform of the amplified signals S1, S2, and S3. Pulse The width is the same.The reference voltage of the comparator is fixed at a constant value Vc. (bl, (C1, fdl are the signal Sa
, 52, St is the width of the actual binarized pulse binarized by the comparator. - A...Current-voltage conversion circuit B...Differentiating circuit C...Reference voltage generation circuit D...Comparison circuit E...Output Stage i1~113... Constant current circuit '1~R13
...Resistance Tri~Tr 24...Transistor I cl, c2...Capacitor D1-D3...Diode PD...Photodiode U... Signal VC from the differentiator circuit...Reference voltage of the comparator of the comparison circuit, ±
ΔV・・・Positive and negative hysteresis voltage Inventor
Takanori Sawai - Yoshinori Kobayashi Figure 2 Figure 3 U±/■ Figure 4 cc Figure 5

Claims (2)

[Claims] (1) One or more diodes Dl, . A current-to-voltage conversion circuit A converts photocurrent into voltage by connecting the current-to-voltage conversion circuit A, and differential amplification is performed by differentially amplifying the current-to-voltage converted signal S and the signal passed through a delay circuit. A differentiation circuit B that obtains a signal, a reference voltage generation circuit C that generates a constant reference voltage predetermined to be equal to the average voltage of the differential signal, and a constant hysteresis voltage ± of the differential signal.
A comparator that compares the sum of Δ■ and the reference potential Vc, and when the differential signal is higher than the reference voltage Vc, a constant positive voltage (+ΔV) is added to the differential signal, and when the differential signal is lower than the reference voltage Vc, the differential signal is An optical receiving circuit comprising a comparator circuit including a hysteresis applying circuit that applies a constant negative voltage (-ΔV), and an output stage E that amplifies the output of the comparator circuit. (2) The hysteresis adding circuit is the output U of the differentiating circuit B.
,l! :, resistor 1 (8
and a constant current circuit 111. 112, and a transistor Tr19 whose collector is connected to these and whose emitter is grounded.
．． Tr20, a transistor Tr18 whose collector is connected to the constant current circuit 1.11 and is turned on and off by the output of the comparator, and a base of the transistor Tr19,
The collectors are connected to each other, and the transistor T r
20 is connected to the long sword of the comparator and one end of the resistor R8, and when a total current of 111 flows through the transistor T r l 8, a constant current of 11 is generated from the constant current circuit 112.
2 flows through resistor R3 in the direction of the output of the differentiator circuit,
The optical receiver circuit according to claim 1, wherein a current (111-112) flows in the direction toward the transistor Tr20 through the resistor R8 when the transistor Tr18 is off.