JPS60263546A - Reference potential generating circuit of light reception circuit - Google Patents

Abstract

PURPOSE:To set a reference potential equal to the mean level of a differential signal by providing a reference potential generating part excluding a signal transmission part within a circuit that converts the current flowing to a photodetecting element into the voltage and differentiating and amplifying said voltage. CONSTITUTION:The current flowing to a photodetecting element 1 receiving the digital optical signal is converted into the voltage by a resistance R1 and transistors Tr1 and 2. This voltage is amplified by a differential amplifier consisting of Tr3 and 4 via a delay circuit consisting of a resistance R3 and a capacitor C1. Then a signal VIN is delivered. The capacitor C1 repeats charging and discharging with blinking of the light applied to the element 1. A signal VIN is equal to a signal obtained by differentiating the voltage that converted the current of the element 1. A reference potential generating part 3 has the same constitution as an amplifying part 2 excepting the signal transmission parts of the R1 and the C1 of the part 2. The new voltage is always applied to the bases S and T of the differential amplifying Tr3' and 4' of the part 3. Then an equal current flows to both Tr3' and 4'. The reference potential Vref outputted from the collector of the Tr4' is equal to the mean value of the signal VIN.

Description

[Detailed description of the invention] Example technology field The present invention relates to a reference potential generation circuit for an optical receiving circuit.

The optical receiving circuit is provided on the receiving side of the optical communication system.

The optical receiving circuit includes a photoelectric conversion element such as a photodiode, an avalanche photodiode, and a photodiode that converts light into an electrical signal.
An amplifier circuit that amplifies the current flowing through this, a binarization circuit that converts the amplified signal into two values of H and L and restores it to the original digital signal, and an output stage that provides an output at an appropriate level. It has become.

B) Conventional technology and its problems Since we are dealing with digital signals, we need to amplify minute signals,
By comparing it with a reference value using a comparator and binarizing it into H and L levels, the same original digital signal can be restored.

In this way, conventional optical receiving circuits receive input signals as they are.
It was binarized. However, this circuit has several drawbacks.

One is to pretend that a feedback resistor with a large value is necessary in order to increase the amplification factor.

There is no problem if it is made from individual parts, but if the whole is made monolithically, it is not possible to make a resistor with such a large value.

The other reason is that the magnitude of the light intensity is the interstitial
This means that the DC must be amplified. DC amplifier circuits are stacked in multiple stages to obtain a voltage signal proportional to the optical signal. In this case, DC noise components will be included in the signal.

Current flows through the photodiode even when the hexagonal light is zero. This is called dark current. Additionally, a differential amplifier circuit has a DC offset. Dark current is only a small current, but it changes significantly depending on temperature. These DC noise components are also amplified in the same way, so the DC noise components are included in the field.

Also, depending on the length of the optical fiber and the characteristics of the light emitting element,
The level of the light receiving element when an optical signal is present is also not constant. However, the H level on the light receiving side is also not constant.

On the light receiving side, both the L level and H level often fluctuate. On the light receiving side, the signal Vs is compared with a constant reference voltage Vc, and the signal is distinguished into H and L levels depending on its magnitude. Therefore, the reference voltage vc is often set to about half the H level of the minimum input signal.

Even if this is done, the length of time at H level will vary depending on the intensity of the hexagonal light, making it impossible to accurately restore what was transmitted.

(1) Optical receiving circuit using differential signals Therefore, the inventors of the present invention decided to differentiate the received signals once, instead of processing the received signals as they are. The original signal is a square wave signal with H level and L level, so when it falls from H to fiL, it has a negative differential pulse), and when it rises from L to H, it has a positive differential pulse. will occur. The reference value may be set to 0 level.

Since it is a differential signal, all DC noise such as dark current is removed. Also, whether it is a large signal or a small signal, a positive pulse is generated at the rising edge and a negative pulse is generated at the falling edge.If the reference value is set to 0, the H level will be correct regardless of the signal size. The time and the time at L level can be restored.

In this way, even minute signals can be processed correctly, resulting in a wider dynamic range and less distortion.

However, since it is converted into a differential signal and then binarized,
A signal cannot be binarized simply by using a fixed reference value Vc.

The differential signal generates a positive pulse when rising and a negative pulse when falling, but becomes 0 when there is no change. Even if the reference value VC is set to 0, if there is no change, this cannot be correctly discriminated.

The output should be H from the positive pulse to the negative pulse, and the output should be L from the negative pulse to the positive pulse. Therefore, hysteresis ±Δ is added to the differential signal W, but hysteresis ±Δ in the opposite direction is added to the reference value Vc.

Such binarization can be performed using a hysteresis comparator.

Hysteresis can be provided as follows, depending on whether the output of the comparator is high.

(a+ If the output of the comparator is H, set the reference value to Vc
-Δ (b) If the comparator output is L, set the reference value to VC
+Δ. This gives positive and negative hysteresis to the reference value, but hysteresis in the opposite direction may be given to the differential signal W.

Hysteresis due to current feedback As explained in the previous section, it is necessary to provide the same amount of positive and negative hysteresis to the reference value of the comparator.

Since VC is the average value of the differential signal, it cannot be said to be constant, but is a variable value.

Then, the same amount of positive and negative hysteresis must be provided around the fluctuation value. Since the hysteresis width limits the strength of the receivable signal, it is better to make it as narrow as possible. It is desirable that the voltage is about several tens of mV. In other words, it has to be applied vertically symmetrically around Vc with small hysteresis.

Therefore, the inventor of the present invention devised a circuit that can accurately add hysteresis using current feedback. For example, this circuit information can be found in Japanese Patent Application No. 58-194709 (Showa 58
(filed on October 17, 2017).

To provide hysteresis by current feedback, use two constant current circuits Ia and Ib, connect the power supply, Ia and Ib, and ground in series, and connect the connection point of Ia and rb to the reference value side input of the comparator. , is realized by connecting this input and the reference voltage VC through a resistor H. Here, I
Set b to be twice Ia.

The constant current circuit is switched depending on the output value of the comparator.

When Ib is connected to Ia and the input of the comparator,
The current Ia flows from the constant current circuit to the circuit 2 through the resistor R (2Ia=Ib).

Therefore, the voltage of the input on the reference value side becomes lower by RIa than Vc.

When Ib is disconnected from Ia and the input of the comparator, the entire current of constant current circuit Ia will flow through resistor R1 in the opposite direction. Therefore, the voltage of the input on the reference value side is higher than VC by RIa.

□ This is a current feedback type hysteresis circuit. Since a constant current circuit is used in combination, its voltage is not determined by itself, and a constant current can always flow. Therefore, by passing a current of ±Ia through R with VC as the center, positive and negative hysteresis ±RIa can be achieved. can be given.

Since the present invention does not relate to a circuit of a comparator with hysteresis, it will not be described in detail.

(3) Difficulty in setting reference potential Since the received signal is once differentiated and then binarized, it is necessary to input the signal and the reference value to a comparator and use this to compare the magnitude.

As already mentioned, the reference value is the fixed reference potential plus the positive and negative hysteresis ±Δ. Finally, there is the problem of how to apply the fixed reference potential Vc. This must be the average value of the differential signal. In other words,
Let the received signal be S, its derivative be D, and the average value be 〈
>, then D = S + F (11. F is the DC component of the differential signal. This depends on the circuit configuration, but does not depend on the magnitude or period of the signal S at all.

The reference potential Vc is Vc = <D> (21 It is.

Regarding the differential operation (1), a differential signal is obtained by combining a delay circuit and a differential amplifier circuit.

The operation of taking the average value in (2) is most simply carried out by using a smoothing circuit that combines a resistor and a capacitor.

A smoothing circuit averages the differential pulses to obtain an average voltage. However, in order to do this, the time constant determined by the product of the resistor and the capacitor must be much larger than the repetition period of the received pulse change. Then, the capacitance of the capacitor becomes 0.1 μF to 1 μF.
I often have to set it to F.

There is a demand for optical receiver circuits to be made monolithic as a whole in order to promote miniaturization and weight reduction and to obtain higher reliability.

When monolithic, the capacitor can only be made with a value of several tens of pF at most, so if it is a 0.1 μF capacitor, an external capacitor will inevitably be required. In this case, the whole thing becomes completely monolithic (MIG
: cannot be done.

In order to obtain the reference potential of the comparator, a circuit configuration that does not require the use of an external capacitor is highly desirable.

Purpose The present invention provides a method for setting a reference potential equal to the average value of a differential signal, which is the basis of a reference value to be input to one side of a comparator, without using a capacitor in an optical receiving circuit. The purpose is to provide a circuit with

(Composition) The present invention includes an amplifier circuit that converts a current flowing through a light-receiving element into a voltage, differentiates it, and amplifies it;
The reference potential generating section is provided with a reference potential generating section that is completely equivalent in other respects except for the portion where the signal component is transmitted, and is adapted to obtain the reference potential from this section.

The amplified differential signal and the reference potential are respectively applied to two inputs of a comparator with hysteresis to obtain a binarized output.

ri) Example FIG. 1 is a circuit diagram showing an embodiment of the present invention.

This shows a light receiving element 1, an amplifying section 2, and a reference potential generating section 3. In the latter stage, these outputs vin, Vref
K fm is provided with a comparator with hysteresis and an output stage. All of these are manufactured on one IC chip.

The light receiving element 1 is a photodiode, and a pn junction is used as a reverse bias. The anode is grounded, and the cathode is connected to the resistor R1, the cathode of the diode DI, and the base of the transistor Trl.

First, the amplifier section 2 will be explained.

11, I3 and I3 are constant current circuits. The emitter of the detector Tr1 is connected to ground by connecting the diode array D2 in the forward direction. The voltage drop across the pn junction (approximately 0.6 V) multiplied by the number of diodes is the voltage at the emitter, and the base-emitter drop added to this is the voltage at the photodetector 1. Becomes reverse biased.

The collector C of Tri is connected to the power supply VCC through the constant current circuit 11.
Two are connected. Collector C is connected to the base of F transistor Tr2.

The collector of Tr2 is connected to the power supply Vcc, and the emitter b is connected to the constant current circuit 2 (point d) via a diode array Da.

When there is no light, the light receiving element current is zero.

In this case, the base current xb of Tr2 flows through the resistor R1. Since the collector current of Tri is constant, Ib is also a building current.

The potential at point b becomes higher by RIIb than the other point.

This is the minimum value of the potential at point b.

When current Ip flows through the light receiving element, the potential at point b becomes IpR
It becomes higher than the minimum value by l.

In the diode array D3, only a constant DC component is dropped, so the voltage at point d includes a constant DC component and a signal component of IpRl.

Tr3 and Tr4 constitute a differential amplifier circuit. The collector of Tr3 is connected to VCC, but the output (here Mi
n ), R4 is connected between the collector g of Tr4 and VccO.

The emitters of Tr3 and Tr4 are common and grounded through a constant current circuit 3.

The inputs of this differential amplifier circuit are the base e of Tr3 and Tr4,
It is f. The potentials are abbreviated as e and f.

If 6=f, half of the current in step 3 will flow equally to the two transistors. In other words, the voltage at point g is lower than Vcc by JR4Ia/2.

If e (f), the entire current of ■3 flows through Tr4. The voltage at point g becomes lower than Vcc by R4l3.

On the other hand, if f (e), the entire current of I3 flows through Tr3. The voltage at point g is equal to Vcc.

Now, the voltage at point d passes directly through R2 to the base e of Tr3.
However, the base f of Tr4 delays the signal at point d and inputs it.

For the delay, resistor R3 and capacitor C1 are used.

One end of capacitor C1 is grounded, and the other end is the base f of Tr4.
connected to. A signal is transmitted from point d to base f by resistor R3, but the change in voltage at point f is delayed by the time required to charge and discharge C1.

If there is no change in the voltage at point d, e=f', and if the voltage at point d increases, then e)f. When the voltage at point d falls, f ) e.

In other words, regarding the potential at point d, (1) When increasing (at the rising edge of the pulse), g = Vc
c f3) (2) When there is no change (when the pulse value is H or high and does not change) g = Vcc - (R4l8)/2. (4) (3)
When decreasing (at the falling edge of the pulse), g = Vcc-
R4I8 (5) The value of g becomes the lowest.

This means that we have given the differential of the voltage at point d.

The voltage at point g is a differential signal, which is input to a comparator with hysteresis after appropriately increasing or decreasing the DC component. Therefore, the voltage at point g is written as Vin here.

The standard value ('/in:) must be obtained by calculating the average value of Min.

The present invention abandons the idea of smoothing Min and calculating the average value.

To obtain a reference potential, exclude the part that transmits the signal,
A reference voltage generating section 3 having the same circuit as the amplifying section 2 is provided.

The reference voltage generating section 3 also has the same transistor, diode, and resistor configuration. The same applies to constant current circuits. Therefore, corresponding elements are given the same number and a dash is added.

All constants are equal, It = It' (61 12=I2' R2=　R2'　(71 Ra := R37 shall be.

Similarly, constant current circuits II', Trl', and diode array D2' are connected in series between Vcc and ground.

Similarly, Tr2', D3', and I2' are connected in series between Vcc and ground.

Trl': IL"Evening and Tr2''<-7, Trl
It is also the same that the base of ' is connected to the cathode of the light receiving element 1.

The difference is that there is no resistor connecting the emitter j of Tr2' and point a, and there is no capacitor C1 in the delay circuit.

Since there is no resistor R1, the voltages at point h and point 5 are undefined.

The important thing is that there is no capacitor C1, and the differential amplifier circuit T
This means that the same voltage is always applied to /<-nus and t of r3' and Tr4'.

Since s=t always exists, currents equal to Tr3' and jr4' flow. Half the current of step 8 flows through both transistors.

The voltage at point U is constant and is expressed as follows: U = Vc - (R4Ia)/2 (8i).Here, the reason for the dash is because of the relationships (6) and (7).

Here, the potential at point U, written as Vref, is equal to the output g of the amplification section when the differential is 0, as shown in equation (4).

At the same time, the output g when the differential is positive is exactly the average of the output g when the differential is negative.

In other words, it can be seen that V ref is a constant voltage and is also the average value of the differential amplification signal Vin. In other words, Vr
ef'=<:Vin,> (9).

(2) Explanation of other circuit parts FIG. 2 shows an overall schematic diagram of the optical receiving circuit.

The amplification section 2 and reference potential generation section 3 are as already described.

The amplifying section 2 converts the current of the light receiving element 1 into a voltage, differentiates this, and amplifies this. For differentiation, a capacitor, a delay circuit such as a resistor, and a differential amplifier circuit are used.

The reference potential generating section 3 has almost the same circuit configuration as the amplifying section 2, but there is no delay circuit in the preceding stage of the differential amplifying circuit, so that the two outputs are always the same.

In this way, the differential amplification signal vin and the reference potential Vref are obtained. However, if the DC level I is not matched when inputted as is to the comparator, the DC level shift circuit 8.9
Depending on the situation, change the DC level μ appropriately. This may be done by a diode string, or by connecting a transistor with an emitter follower.

In this way, the differential signal Vs whose level has been adjusted and the reference values V and c are obtained. This is input to the comparator 4 with hysteresis. Differential amplifier circuit 5 via input resistor RSR
One of the resistors R is used to provide hysteresis ±Δ.

The output of the differential amplifier circuit 5 causes a hysteresis adding circuit 6.
The connection of constant current circuits Ia and Ib is switched. As already mentioned, this means that the current of Ib is I a (7) 2
Since it is twice as large, it is possible to provide equal amounts of positive and negative hysteresis.

The output stage 7 converts the binary signal from the differential amplifier circuit 5 into H level and L level of appropriate voltage.

(:I) Effect (1) All circuits can be completely integrated into MIC.

This is because there is no need to externally attach a smoothing capacitor (usually 0.1 to 1 μF).

(2) The DC level of the input stage of the comparator is
l: Can be matched closely.

This is because the reference potential is generated in such a way that all parts that determine the DC level of the amplifier output (differential waveform) are made common (circuit configuration and constants are made common).

In addition, by arranging completely symmetrical patterns within the same MIC, it is possible to manufacture with high precision.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the reference potential generation circuit of the present invention. FIG. 2 is a block diagram of the overall circuit configuration of an optical receiving circuit including a reference potential generation circuit according to the present invention. 1... Light receiving element 2... Amplifying section 3... Reference potential generating section 4 °...°゛ Comparator with hysteresis ■1~
Work 3... Constant current circuit II'-I3'... Constant current circuit R1-R4... Resistor R1'-R4'... Resistor D1-D3... Diode D2'-D3'... Diode Trl ,...Tri'... Transistor inventor: Takanori Sawai Patent applicant: Sumitomo Electric Industries, Ltd.

Claims (1)

[Claims] -f'' In the optical receiving circuit that receives the digital optical signal and converts it into a binary digital voltage signal, the light receiving element 1 converts the current of the light receiving element into a voltage using the resistor R1 and the transistors Trl and Tr2, and converts this voltage signal into a voltage signal. , this voltage signal is passed through a delay circuit consisting of a capacitor C1 and a resistor, and the difference between the delayed signal and the delay signal is amplified differentially. Part 2
A reference potential generating circuit for an optical receiving circuit, which is different from a reference potential generating section 3 having the same circuit configuration as the reference potential generating section 3.