JPH07106580A - Semiconductor device and its forming method - Google Patents

Abstract

PURPOSE:To form finely and uniformly an oxide layer in an anodic oxidation process, by constituting a gate electrode from material whose main component is Al, forming an oxide layer wherein the material is oxidized on the gate electrode surface, and incorporating a specified amount of Sc in the material. CONSTITUTION:A silicon oxide film 205 and a gate insulating film are formed by a plasma CVD method, and photo annealing is performed in an atmosphere of N2O or the like. An Al film is formed by a sputtering method. In the Al, 0.2wt.% So is contained. Rare earth elements in the periodic table group IIIa are used as the material which are contained in the Al. The content of the material is 0.1-0.25wt.%. The electrode surface of Al is anodized, and oxide layers 208, 210 are formed on the surface. By adding group IIIa elements to the material whose main component is group IIIb elements, the abnormal growth of the material whose main component is group IIIb elements can be prevented in an oxidizing process, and a fine anode oxide layer of uniform thickness can be formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a gate electrode of an insulating gate type field effect transistor and a manufacturing method thereof. Particularly, it relates to one using a thin film semiconductor.

[0002]

2. Description of the Related Art An insulating gate type field effect transistor (hereinafter simply referred to as TF) using a thin film semiconductor formed on an insulating substrate.
(T) is known. This TFT is used as a switching element of a pixel electrode of an active matrix type liquid crystal display device or a driving element of a peripheral driver circuit. It can also be used in image sensors and other integrated circuits.

As a structure of a TFT, a structure as shown in FIG. 1 has been proposed. FIG. 1 shows the glass substrate 11
A source 12 and a drain 14 formed of an amorphous or crystalline silicon thin film formed above, an active layer having a channel 13, a silicon oxide film serving as a gate insulating film 16, and a gate electrode containing aluminum as a main component. The TFT is provided with 17 and an oxide layer 18 around it, an interlayer insulating film 19, a source electrode 101, and a drain electrode 102. The crystalline silicon film referred to here is a film containing silicon as a main component and having an ordered structure such as a microcrystalline silicon film, a polycrystalline silicon film, or a semi-amorphous silicon film.

What is important in the structure shown in FIG. 1 is that the offset gate region 15 is formed by utilizing the thickness of the oxide layer 18 provided around the gate electrode 17. In the structure shown in FIG. 1, the source 12 and the drain 14 are formed by an ion implantation method or an ion doping method. At this time, the gate electrode 17 and the oxide layer 18 around it are used as a mask.

As a result, the region functioning as a channel does not function as a channel, as indicated by 15 on both sides of the portion 13, and does not function as a source / drain, or a combination of both. A region having is formed. This region 15 is called an offset gate region, and is between the channel and drain or the channel.
It has a function of relaxing electric field concentration between the sources. By providing this offset gate region, it is possible to reduce the OFF current at the time of applying the reverse bias and to turn it ON-OFF.
The effect of improving the ratio can be obtained. On the contrary, the width 103 of the offset gate region 15 (determined by the thickness of the oxide layer 18) can control the TFT characteristics to some extent. Therefore, if the thickness of the oxide layer 18 cannot be formed with good controllability, the TFT characteristics will vary.

After forming the gate electrode 17 of aluminum, the oxide layer 18 is formed on the gate electrode 17 by immersing the substrate in, for example, a 3% ethylene glycol solution of tartaric acid (pH adjusted to neutral with ammonia). It is formed by increasing the voltage to 120V at 5V / min, for example 4V / min. Generally, the oxide layer 18 has a thickness of 1000 to
It is set to about 2000Å. That is, the width 103 of the offset gate region 15 is 500Å to 1 μm, for example 1000.
It will be set to ~ 2000Å. Of course, it goes without saying that the width of the offset gate region 15 is determined according to need. On the other hand, in the manufacturing process of the TFT, a heating process and a process of irradiating with flash lamp light and laser light are required. In such a process, the oxide layer 18 is resistant (laser resistance, heat resistance). ) Is required.

According to various experiments by the present inventors, when a pure aluminum material is used as the gate electrode,
There has been a problem that abnormal growth of aluminum (called hillock) occurs in the anodizing process. Also,
In the structure in which the anodic oxide is formed on the surface of the aluminum film thus obtained, particularly when the anodic oxide is thin, the resistance to the irradiation of strong light such as laser light (laser resistance) is high. Weak, no heat resistance. (That is, hillocks are generated and the anodic oxide layer is destroyed.
Particularly, hillocks were remarkably generated in the heat treatment at 350 ° C. or higher. ) Has also become a problem.

It can be considered that the above problems are caused by the fact that aluminum atoms easily move around at the atomic level when a large amount of energy is applied. To solve this problem, a method of suppressing the movement of aluminum at the atomic level by adding a trace amount of a material having a melting point higher than that of aluminum can be considered. Therefore, a method of adding Si or Pd to aluminum can be considered. The addition of such an element suppresses the generation of hillocks and improves the heat resistance.

However, since Si and Pd have a lower ionization rate than aluminum, there is a problem that the anodic oxide cannot be thickened in the anodizing step. In addition, the periodic table IV
Si which is an element of group b and Pd which is an element of group VIII of the periodic table
However, there is a problem that the oxidation does not proceed uniformly, the thickness of the oxide layer is not uniform, and a dense oxide layer cannot be formed (see Example 3). As a result, the laser resistance is rather lowered. Further, when the TFT as shown in FIG. 1 is formed by using such an aluminum material, the thickness of the anodic oxide layer 18 varies depending on the place, so that the width of the offset region 15 varies. There is also.

[0010]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems. In particular, in the anodizing step, it is an object to form the oxide layer densely and uniformly with good reproducibility, and to increase the resistance in the subsequent heating step and laser beam irradiation step.

[0011]

According to the present invention, by adding a group IIIa element to a material containing a group IIIb element as a main component, abnormal growth of a material containing a group IIIb element as a main component in an oxidation step or a heating step is performed. Can be prevented. The group IIIa elements referred to here are Sc, Y, lanthanoids, and actinides, and the group IIIb elements are B, Al, Ga, In,
Refers to Tl. In particular, the present invention is characterized in that Sc (scandium) is added to aluminum in an amount of 0.05 wt% to 0.40 wt%, preferably 0.1 wt% to 0.25 wt%. In particular, if this amount is 0.05 wt% or less, preferably 0.1 wt% or less, the heat resistance is insufficient, and
Occurrence of hillocks can be seen at 0 ° C for 1 hour. For etching these materials, wet etching or dry etching can be used as in the conventional case. When dry etching is performed, if an additive element (scandium or the like) remains as a residue depending on the conditions, this amount is 0.4
If it is 0 wt% or more, preferably 0.25 wt or more, a residue may remain on the surface etched by dry etching, but this can be removed by washing with pure water.

[0012]

When the anodic oxidation is carried out by using the aluminum containing such impurities, a dense and uniform anodic oxide layer can be obtained. Further, it is possible to prevent abnormal growth of aluminum in the anodizing step. S
Besides c, Y, La and lanthanoids can be used. As a result, the anodic oxidation process can be performed with good controllability and reproducibility, and the TFT having the offset region as shown in FIG.
In the case of manufacturing, a TFT in which the width of the offset region is uniform (that is, the characteristics are uniform) can be obtained.

Sc has a higher ionization rate than aluminum and does not interfere with the oxidation of aluminum in the anodizing step. Therefore, a dense oxide layer can be formed. Further, since the effect of suppressing the movement of aluminum at the atomic level is also high, it is possible to suppress the generation of hillocks in the heating or anodizing process. The anodic oxide layer is dense and has a smooth surface.
Since the surface state of the interface between the anodic oxide layer and the aluminum film has few irregularities, it excels in light reflection and enhances laser resistance.

As described above, the thickness is 1200Å to 300.
It is also applicable when forming thin anodic oxides of Å or less. The conventional anodic oxide layer containing Si or Pd could not be expected to have heat resistance and laser resistance unless it has a certain thickness (usually 2000 Å or more). This is because the surface of the anodic oxide is uneven as described above, and the thickness of the anodic oxide is thin and thick, and the anodic oxide layer is destroyed from the thin part by heating and laser irradiation. Is. However, when the Group IIIa element of the present invention was added, anodic oxidation proceeded uniformly, so that the above-mentioned unevenness hardly occurred. Therefore, 3
Even a thin anodic oxide layer of 00 to 1200Å
A product having excellent heat resistance and laser resistance was obtained.

[0015]

[Embodiment] [Embodiment 1] This embodiment is shown in FIGS.
And a P channel type TFT (referred to as PTFT) using a crystalline silicon film formed on the glass substrate 201 shown in FIG.
This is an example of forming a circuit in which a channel type TFT (referred to as NTFT) is combined in a complementary type. The configuration of this embodiment is
It can be applied to a switching element of a pixel electrode of an active type liquid crystal display device, a peripheral driver circuit, an image sensor and a three-dimensional integrated circuit.

FIG. 2 shows a cross-sectional view of the manufacturing process of this embodiment. First, a base film 202 of silicon oxide having a thickness of 2000Å was formed on a substrate (Corning 7059) 201 by a sputtering method. The substrate is annealed at a temperature higher than the strain temperature before or after the formation of the base film, and then gradually cooled to the strain temperature or less at 0.1 to 1.0 ° C./min. There is little shrinkage of the substrate in the accompanying process (for example, irradiation with infrared light afterwards), and mask alignment is ready. For Corning 7059 substrate, 620-
0.1 to 1.0 after annealing at 660 ° C for 1 to 4 hours
C./min., Preferably 0.03 to 0.3.degree. C./min, and then slowly cooled, and taken out when the temperature is lowered to 400 to 500.degree.

Then, the plasma CVD method or the reduced pressure CV is used.
According to the D method, a thickness of 300 to 1500Å, for example 800
An intrinsic (I-type) amorphous silicon film 203 of Å was formed. Furthermore, a thickness of 100 to
A 800 Å, for example, 200 Å, silicon oxide film 204 or silicon nitride film 204 was deposited. This becomes a protective film in the following thermal annealing process and prevents the film surface from being roughened.

Next, in a nitrogen atmosphere (atmospheric pressure), 600 ° C.
Thermally annealed for 48 hours. By this thermal annealing, the amorphous silicon film 203 is crystallized and becomes a crystalline silicon film. To further enhance this crystallinity, this silicon film should be
1 × 10 ¹⁴ to 1 × 10 ¹⁶ cm by the ion implantation method in advance
It is also effective to implant silicon ions at a dose of ^-2 . (FIG. 2 (A)) As a method for enhancing the crystallinity,
Laser light or RTP (Rapid Thermal Process)
It is also effective to carry out crystallization using.

After this step, the silicon film was patterned to form the island-shaped active layer 205 of the TFT. Active layer 2
The size of 05 is determined in consideration of the channel length and channel width of the TFT. For small ones, 50μm × 20μ
m, and the larger one had a size of 100 μm × 1000 μm. Many such active layers were formed on the substrate.

0.6 to 4 μm, 0.8 in this case
Infrared light having a peak at ˜1.4 μm was irradiated for 30 to 180 seconds to promote crystallization of the active layer. The temperature is 800 ~
1300 ° C., typically 900 to 1200 ° C., for example 1
It was 100 ° C. Irradiation was carried out in an H ₂ atmosphere in order to improve the surface condition of the active layer. In this step, since the active layer is selectively heated, the heating of the glass substrate can be minimized. And, it is very effective in reducing defects and dangling bonds in the active layer. (Fig. 2 (B))

A halogen lamp was used as the infrared light source. The intensity of visible / near infrared light was adjusted so that the temperature on the single crystal silicon wafer of the monitor was 800 to 1300 ° C, typically 900 to 1200 ° C. Specifically, the temperature of the thermocouple embedded in the silicon wafer was monitored and fed back to the infrared light source. The temperature of the silicon surface on the glass substrate is about 2/3 of that.
It is estimated to be the degree.

During the irradiation of infrared light, it is preferable to form a silicon oxide or silicon nitride film as a protective film on the surface thereof. This is to improve the surface condition of the silicon film 205. In this embodiment, in order to improve the condition of the surface of the silicon film 205, it was carried out in an H ₂ atmosphere.
_The atmosphere may be mixed with 0.1 to 10% by volume of HCl, hydrogen halide, or a compound of fluorine, chlorine, or bromine.

Since this visible / near-infrared light irradiation selectively heats the crystallized silicon film, the heating of the glass substrate can be minimized. And, it is very effective in reducing defects and intangible bonds in the silicon film. Also, after the RTA process is completed, 200 to 50
Performing hydrogen annealing at 0 ° C., typically 350 ° C. is also effective in reducing defects. This is 1 × 1
The same effect can be obtained by ion-doping hydrogen with an amount of 0 ¹³ to 1 × 10 ¹⁵ cm ⁻² and further performing a heat treatment at 200 to 300 ° C.

After the RTA process, a silicon oxide film 206 having a thickness of 1000 Å was formed as a gate insulating film by the plasma CVD method. TEOS (tetra-ethoxy-silane, Si (OC ₂ H ₅ ) ₄ ) and oxygen were used as the source gas for CVD, and the substrate temperature during film formation was 300 to 550 ° C., for example 400 ° C.

A silicon oxide film 206 serving as the gate insulating film
After the film formation, the photo-annealing by irradiation with visible / near infrared rays was performed again in the N ₂ O or NH ₃ atmosphere under the same conditions as in the RTA step. By this annealing, it was possible to eliminate the levels mainly at the interface between the silicon oxide film 206 and the silicon film 205 and in the vicinity thereof. This is extremely useful for an insulating gate type field effect semiconductor device in which the interface characteristics between the gate insulating film and the channel formation region are extremely important.

Subsequently, by the sputtering method,
A film of aluminum having a thickness of 3000 to 8000 Å, for example, 6000 Å was formed. 0.2% in this aluminum
wt% Sc is included. As a material to be contained in this aluminum, a rare earth element of Group IIIa of the periodic table can be used. The content is 0.05 to
0.40 wt%, preferably 0.1-0.25 wt%
Can be

Then, the aluminum film was patterned and etched to form gate electrodes 207 and 209.
A dry etching method was used for etching. further,
The surface of the aluminum electrode was anodized to form oxide layers 208 and 210 on the surface. This anodization is
It was carried out in an ethylene glycol solution containing 1-5% tartaric acid. At this time, anodization was performed by increasing the voltage to 150 V at 4 V / min.

The thickness of the obtained oxide layers 208 and 210 was 2000Å. The oxides 208 and 210
Means that the thickness of the offset gate region is formed in the subsequent ion doping process, so that the length of the offset gate region can be determined by the anodizing process.

Next, an ion doping method (also called a plasma doping method) is used to mask the gate electrode portion (that is, the gate electrode 207 and the oxide layer 208 around it, the gate electrode 209 and the oxide layer 210 around it) as a mask.
Impurities that impart P or N conductivity type in a self-aligned manner were added to the silicon film 205. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas,
In the former case, the acceleration voltage is 60 to 90 kV, for example 80
kV, in the latter case 40-80 kV, for example 65 kV
And The dose amount was 1 × 10 ¹⁴ to 8 × 10 ¹⁵ cm ⁻² , for example, phosphorus was 2 × 10 ¹⁵ cm ⁻² and boron was 5 × 10 ¹⁵ . Upon doping, one region was covered with a photoresist to selectively dope each element. As a result, N-type impurity regions 214 and 21
6, P-type impurity regions 211 and 213 are formed, and a P-channel type TFT (PTFT) region and an N-channel type TF are formed.
A region with T (NTFT) could be formed.

After that, annealing was performed by irradiation with laser light. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but another laser may be used. The laser light irradiation conditions are energy density of 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ² and ² to 10 per place
Shot, for example, 2 shots were irradiated. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation of the laser light. (Fig. 2 (C))

Further, this step may be performed by lamp annealing with visible / near infrared light. In the visible / near infrared, crystallized silicon, phosphorus or boron is 10 ¹⁷ to 10 10.
It is easily absorbed by the amorphous silicon added with ²¹ cm ^-3.
Effective annealing comparable to thermal annealing at 000 ° C. or higher can be performed. When phosphorus or boron is added, the light is sufficiently absorbed even in the near infrared due to the impurity scattering. This can be fully inferred because it is black even when observed with the naked eye. On the other hand, since it is difficult to be absorbed by the glass substrate, it does not require heating the glass substrate to a high temperature and requires only a short treatment time, so it can be said that this is the most suitable method in processes where shrinkage of the glass substrate is a problem. .

Then, a silicon oxide film 21 having a thickness of 6000Å is formed.
7 was formed as an interlayer insulator by the plasma CVD method. As this interlayer insulator, polyimide or a two-layer film of silicon oxide and polyimide may be used. Further, a contact hole is formed, and a TFT electrode / wiring 2 is formed of a metal material, for example, a multilayer film of titanium nitride and aluminum.
18, 220, 219 were formed. Finally, anneal at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to complete the TFT.
We have completed a semiconductor circuit that has a complementary structure. (Fig. 2
(D)) The circuit shown above has a CMOS structure in which a PTFT and an NTFT are provided in a complementary type. In the above process, two TFTs are formed at the same time and cut at the center to form two independent TFTs. It is also possible to fabricate them at the same time.

[Embodiment 2] FIG. 3 shows a cross-sectional view of a manufacturing process of this embodiment. First, the substrate (Corning 7059) 30
A base film 302 composed of 2000 Å-thick aluminum nitride and a 200 Å silicon oxide film thereon was formed on 1 by a sputtering method. Furthermore, plasma C
According to the VD method, the thickness is 500 to 1500Å, for example 15
An intrinsic (I-type) amorphous silicon film of 00Å was deposited. Furthermore, the thickness is 200Å by the sputtering method.
The silicon oxide film of was deposited on the amorphous silicon film.

Then, this amorphous silicon film was annealed at 600 ° C. for 48 hours in a nitrogen atmosphere to be crystallized. After annealing, the silicon film was patterned to form an island-shaped silicon region 303, and a silicon oxide film 304 having a thickness of 1000 Å was deposited as a gate insulating film by a sputtering method. For sputtering, silicon oxide is used as a target, the substrate temperature during sputtering is 200 to 400 ° C., for example 250 ° C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.
It was set to 0.5, for example, 0.1 or less.

Subsequently, by the sputtering method,
An aluminum film having a thickness of 3000 to 8000Å, for example 4000Å, was deposited. For aluminum film, 0.05-
0.4 wt%, for example, 0.15 wt% scandium (Sc) was added. Further, on this aluminum film, a photoresist having a thickness of about 1 μm and a photoresist having good pressure resistance such as AZ1350 manufactured by Shipley Co. were formed by spin coating. Then, the gate electrode 305 was patterned by a known photolithography method. A wet etching method was used for etching, and a mixed acid of phosphoric acid and nitric acid was used as an etchant. As a result, the photoresist mask 306 remained on the gate electrode. A similar structure can be obtained by using a photosensitive polyimide (photonice) such as UR3800 manufactured by Toray Co., Ltd. instead of the photoresist. (Fig. 3
(A))

Next, the substrate is immersed in a 10% citric acid aqueous solution, and 10 to 50 V, for example, 10 to 50 V at a constant voltage of 10 V.
For 4 minutes, for example 30 minutes by anodizing
Thickness of 000Å ~ 10000Å (1μm), in this case about 5000Å of porous anodic oxide 307 ± 200Å
It was possible to form on the side surface of the gate electrode with the accuracy of. Alternatively, 30% to 40V anodic oxidation may be performed in an 8% oxalic acid solution. Since the mask material was present on the upper surface of the gate electrode, the anodic oxidation hardly proceeded. (Fig. 3 (B))

Next, the mask material was removed to expose the upper surface of the gate electrode, and the substrate was dipped in an ethylene glycol solution of 3% tartaric acid (neutral pH adjusted with ammonia), and an electric current was applied to this. 1-5V / min, for example 4V
The voltage was increased up to 80 V at a speed of / min to carry out anodization. At this time, not only the upper surface of the gate electrode but also the side surface of the gate electrode was anodized, and a dense anodic oxide 308 having a thickness of 1000 Å was formed. The withstand voltage of this anodic oxide is 5
It was 0 V or more. (Fig. 3 (C))

Next, impurities (phosphorus) were implanted into the silicon region 303 by plasma doping using the gate electrode as a mask. Phosphine (PH ₃ ) was used as a doping gas, and the acceleration voltage was set to 60 to 90 kV, for example, 80 kV. Dose amount is 1 × 10 ¹⁴ to 8 × 10 ¹⁵
cm ⁻² , for example, 2 × 10 ¹⁵ cm ⁻² . As a result,
N-type impurity region 309 was formed. (Fig. 3 (D))

Next, laser light was irradiated from the upper surface to carry out laser annealing to activate the doped impurities. As the laser, a KrF excimer laser (wavelength 248 nm, pulse width 30 nsec) was used, but in addition, XeCl excimer laser (wavelength 308
nm), ArF excimer laser (wavelength 193n
m), XeF excimer laser (wavelength 353 nm), etc. may be used. Laser energy density is 200 ~
The irradiation was performed at 400 mJ / cm ² , for example, 250 mJ / cm ² , and ² to 10 shots, for example, 2 shots were irradiated. At the time of laser irradiation, the substrate is heated to 200 to 300 ° C., for example 25
It was heated to 0 ° C. Thus, the impurity region 309 was activated. Although the porous anodic oxide 307 is left in FIG. 3D, the oxide 307 may be removed thereafter. Further, the gate insulating film 304 below the gate electrode may be removed except for the gate insulating film below the gate electrode. In this way, the porous anodic oxide 307 does not capture the charge and cause instability.

Then, a silicon oxide film 31 having a thickness of 6000Å is formed.
0 is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed therein, and a TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
The electrode / wiring 311 of the T source region and the drain region was formed. Finally, in a hydrogen atmosphere at 1 atm, 350 ℃, 30
It was annealed for a minute. The thin film transistor was completed through the above steps. (Fig. 3 (E))

Unlike the first embodiment, in this embodiment, the TF
The offset of T (distance between the gate electrode 305 and the end of the source / drain region 307) is about 5000Å (3000 Å porous anodic oxide + 1000 Å non-porous anodic oxide), resulting in a leakage current (I _OFF ). Was kept extremely low. In addition, since an excessive voltage is not applied to the gate insulating film during the anodic oxidation, the interface state density of the gate insulating film is small, and therefore the subthreshold characteristic (S value) of the TFT is extremely small. A steep characteristic was obtained. As described above, the TFT manufactured according to this example has a large on / off ratio and a small leak current, and thus is suitable for a pixel transistor of an active matrix liquid crystal display, for example.

[Embodiment 3] In this embodiment, 0.2 w of Si is used.
Under the same conditions as when the oxide layer was formed to a thickness of 2000 Å on the surface of the aluminum film added with t%, the surface of the aluminum film added with 0.2 wt% of Sc was oxidized by the anodization process under the same conditions. The case where the physical layer is formed is a comparative example. The aluminum film has a thickness of 6000Å and is formed by the sputtering method.
The anodic oxidation process is the same as that shown in Example 1, in an ethylene glycol solution containing 1-5% tartaric acid,
An oxide layer was formed to a thickness of 2000Å by raising the voltage to 150V at 4V / min.

FIG. 4A shows an electron micrograph showing a cross section when Si is added. FIG. 4 shows an island-shaped film containing aluminum as its main component and the state of the oxide layer formed on the surface of the film in the anodizing step. As can be seen from FIG. 4A, the surface of the oxide layer shows abnormal growth and is not a smooth surface. It is also understood that the film quality is extremely poor.

On the other hand, FIG. 4 (B) is an electron micrograph showing a cross section transferred when Sc is added. Figure 4
From (B), it can be seen that the oxide layer is dense and no trace of abnormal growth is observed on its surface. As described above, by adding Sc to aluminum,
It can be seen that the oxide layer formed by the anodizing process can be formed on the surface of the aluminum in a precise and controllable manner.

[0045]

[Effect] When an oxide layer is formed on the surface of aluminum in the anodizing step, S is added to the aluminum.
c is 0.05 wt% to 0.40 wt%, preferably
By adding 0.1 wt% to 0.25 wt%,
In the anodizing step, (1) abnormal growth (hillock) in the oxidized region can be prevented. (2) The controllability of the oxidized thickness can be improved. (3) A uniform oxide layer can be formed. (4) The heat resistance can be increased. (5) The laser resistance can be increased. (6) Especially when forming an offset region of the TFT, T
The characteristics of FT can be made uniform. (7) Since a dense oxide layer can be formed without abnormal growth, a thin oxide layer can be formed. It is possible to obtain such an effect.

[Brief description of drawings]

FIG. 1 shows a structure of a TFT having an offset gate region.

FIG. 2 shows a manufacturing process of an example.

FIG. 3 shows a manufacturing process of an example.

FIG. 4 is a photograph showing a state of a thin film formed by an anodizing process.

[Explanation of symbols]

 11 ... Glass substrate 12 ... Source 13 ... Channel 14 ... Drain 15 ... Offset gate region 16 ... Gate insulating film 17 ... Gate electrode 18 ...・ ・ ・ Oxide layer 19 ・ ・ ・ ・ Interlayer insulating film 101 ・ ・ ・ Source electrode 102 ・ ・ ・ Drain electrode

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akira Sugawara 398 Hase, Atsugi City, Kanagawa Prefecture, Semiconducting Energy Laboratory Co., Ltd. (72) Inventor Yukiko Uehara 398, Hase, Atsugi City, Kanagawa Prefecture, Semiconducting Energy Laboratory Co., Ltd.

Claims (4)

[Claims] 1. An insulated gate semiconductor device, the gate electrode of which is made of a material containing aluminum as a main component, and an oxide layer obtained by oxidizing the material is formed on the surface of the gate electrode. , Sc (scandium) is contained in an amount of 0.1 wt% to 0.25 wt%. 2. The Sc according to claim 1, wherein Sc is 0.05 wt.
% To 0.40 wt% is included in the semiconductor device. 3. An insulated gate semiconductor device, the gate electrode of which is made of a group IIIa material, and an oxide layer made of an oxide of the material is formed on the surface of the gate electrode. In the semiconductor device, an element of Group IIIb is added to. 4. The method for manufacturing a semiconductor device according to claim 3, wherein the step of forming the oxide is an anodic oxidation step.