JPH08339960A - Preparation of semiconductor device - Google Patents

Abstract

PURPOSE: To realize crystallization of an amorphous silicon film at a low temperature in a short time and obtain a crystalline silicon film which is free from clear crystal grain boundary by introducing a metallic element to an amorphous silicon film, carrying out hydrofluoric acid treatment and irradiating with laser light or strong light and then performing a heat treatment. CONSTITUTION: An amorphous silicon film 12 is formed on a substrate 11, hydrofluoric acid treatment is performed to remove stain and a natural oxide film and then an oxide film 13 is formed. The oxide film 13 is formed to improve wettability when acetate solution containing nickel is applied thereafter. An acetate solution mixed with nickel is dropped to a surface of the oxide film 13 on the amorphous silicon film 12 and an application process of nickel solution is carried out to form a layer containing nickel in a surface of the amorphous silicon film 12. Heat treatment is carried out to form the crystalline silicon film 12. Nickel element is removed by hydrofluoric acid treatment and further laser light is directed to obtain a crystalline silicon film of low concentration of a metallic element and small defect density.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a crystalline semiconductor and a method for manufacturing the semiconductor device.

[0002]

2. Description of the Related Art A thin film transistor (hereinafter referred to as TFT) using a thin film semiconductor is known. This TFT is formed by forming a thin film semiconductor on a substrate and using this thin film semiconductor. This TFT is used in various integrated circuits, and is particularly noted as a switching element provided in each pixel of an electro-optical device, particularly an active matrix type liquid crystal display device, and a driver element formed in a peripheral circuit portion. .

As a thin film semiconductor used for TFT,
Although it is easy to use an amorphous silicon film, there is a problem in that its electrical characteristics are low. In order to improve the characteristics of the TFT, a crystalline silicon thin film may be used. A crystalline silicon film is referred to as polycrystalline silicon, polysilicon, microcrystalline silicon, or the like. In order to obtain this crystalline silicon film, an amorphous silicon film may first be formed and then crystallized by heating.

However, crystallization by heating requires heating at a temperature of 600 ° C. or higher for 20 hours or longer, which makes it difficult to use a glass substrate as a substrate. For example, Corning 7059 glass used in an active type liquid crystal display device has a glass strain point of 593 ° C., and there is a problem in heating at 600 ° C. or higher in consideration of increasing the area of a substrate. That is,
When a Corning 7059 glass substrate, which is commonly used, is subjected to a heat treatment at a temperature of 600 ° C. or higher for 20 hours or longer, the shrinkage or bending of the substrate becomes remarkable.

In order to solve such a problem, it is necessary to perform heat treatment at a temperature as low as possible. On the other hand, it is required to shorten the time of the heat treatment step as much as possible for the purpose of improving productivity.

Further, when the amorphous silicon film is crystallized by heating, the entire silicon film is crystallized, so that it is partially crystallized or the crystallinity of a specific region is controlled. There is a problem that you can not.

As a method for solving this problem, a portion or a region to be a crystal nucleus is artificially formed in an amorphous silicon film, and then heat treatment is performed to selectively perform crystallization. The technique is described in JP-A-2-140915 and JP-A-2-260524. This technique is intended to generate crystal nuclei at a predetermined position in the amorphous silicon film.

For example, in Japanese Unexamined Patent Publication (Kokai) No. 2-140915, an aluminum layer is formed on an amorphous silicon film, and crystal nuclei are generated in a portion where the amorphous silicon and aluminum are in contact with each other. Further, it is described that a crystal is grown from this crystal nucleus by applying a heat treatment. Further, JP-A-2-260524 describes a configuration in which tin (Sn) is added to an amorphous silicon film by an ion implantation method, and crystal nuclei are generated in a region to which the tin ions are added.

However, Al and Sn are substitutional metal elements, form an alloy with silicon, and do not diffuse and penetrate into the silicon film. Then, crystallization proceeds in a form in which a portion where an alloy is formed with silicon serves as a crystal nucleus and crystal growth is performed from that portion. As described above, when Al or Sn is used, it is characterized in that crystal growth is performed from a portion into which Al or Sn is introduced (that is, an alloy layer of these elements and silicon). In general, crystallization proceeds through a two-step process of generating initial nuclei and growing crystals from the nuclei. The substitutional metal elements such as Al and Sn for silicon are effective for generating the initial nuclei, but have little effect on the subsequent crystal growth. Therefore, when Al or Sn is used, the temperature cannot be lowered and the time can not be shortened as compared with the case where the amorphous silicon film is simply crystallized by heating. That is, it is not significantly superior to the conventional crystallization process of an amorphous silicon film which is simply performed by heating.

BACKGROUND OF THE INVENTION According to the research conducted by the present inventors, a trace amount of an interstitial element such as nickel or palladium for silicon is deposited on the surface of an amorphous silicon film, and then heated. It has been found that crystallization can be performed at 550 ° C. for about 4 hours. In this case, not only the process of initial nucleation, but also the subsequent crystal growth can be facilitated, and the heating temperature can be greatly lowered and the heating time can be shortened as compared with the conventional method using only heating. can do.

In order to introduce such a trace amount of elements (metal elements that promote crystallization), plasma treatment, vapor deposition, or ion implantation may be used. Plasma treatment is a parallel plate type or positive column type plasma CVD apparatus in which a material containing a metal element is used as an electrode, and plasma is generated in an atmosphere of nitrogen, hydrogen, or the like to form a metal element in an amorphous silicon film. Is a method of adding.

As the metal element that promotes the above-mentioned crystallization, interstitial elements such as Fe, Co, Ni, Ru and R are used.
h, Pd, Os, Ir, Pt, Cu, Ag and Au can be used. These interstitial elements diffuse into the silicon film in the heat treatment step. Then, at the same time as the above-mentioned intrusion type element diffuses, crystallization of silicon proceeds. That is, the penetration type metal promotes the crystallization of the amorphous silicon film by the catalytic action even before it diffuses.

Therefore, the crystallization can be advanced by a method different from the case where the crystallization gradually proceeds from the crystal nucleus. For example, when heat treatment is performed after introducing the metal element into a specific place of the amorphous silicon film, crystallization proceeds from the region into which the metal element is introduced in a direction parallel to the film plane. This length is several tens of μm or more. Also,
By introducing the metal element into the entire surface of the amorphous silicon film, the entire film can be crystallized uniformly. Of course, in this case, the entire film has a polycrystal or microcrystal structure, but it does not have a structure having a clear grain boundary at a specific place. Therefore, a device having uniform characteristics can be formed by utilizing an arbitrary place on the film.

Further, since the above-mentioned intrusion type element diffuses rapidly into the silicon film, its introduction amount (addition amount).
Is important. That is, when the introduction amount is small, the effect of promoting crystallization is small, and good crystallinity cannot be obtained. If the amount of introduction is too large, the semiconductor characteristics of silicon will be impaired.

Therefore, there is an optimum amount of the metal element introduced into the amorphous silicon film. For example, when Ni is used as the metal element that promotes crystallization, the effect of promoting crystallization can be obtained if the concentration in the crystallized silicon film is 1 × 10 ¹⁵ cm ⁻³ or more. , And the concentration in the crystallized silicon film is 1 × 10 ¹⁹ cm ⁻³
It has been found that the semiconductor characteristics are not impaired if the following conditions are satisfied. The concentration here is defined by the minimum value obtained by SIMS (secondary ion analysis method). Further, with respect to the metal elements other than Ni listed above, the effect can be obtained in the same concentration range as Ni.

In order to make the concentration of the above-mentioned element such as nickel that promotes crystallization (the element that promotes crystallization is referred to as a metal element in the present specification) within the optimum range in the crystalline silicon film after crystallization. Therefore, it is necessary to control the amounts of these elements when they are introduced into the amorphous silicon film.

When nickel is the metal element,
When an amorphous silicon film was formed, nickel was added by a plasma treatment method to form a crystalline silicon film, and the crystallization process and the like were examined in detail, the following matters were found. (1) The nickel concentration is high in the region where nickel is directly introduced. (2) The nickel concentration is high in the tip portion of the region where crystals are grown in the direction parallel to the substrate from the region where nickel is directly introduced. (3) By the hydrofluoric acid treatment, numerous holes are opened in the region where the nickel concentration is high.

An optical micrograph of the above item (3) is shown in FIG. Further, a drawing schematically showing FIG. 10 is shown in FIG. FIG. 11 corresponds to FIG. The left side portion shown in the photograph of FIG. 10 is a portion into which nickel is directly introduced (corresponding to a region indicated by 801 in FIG. 11). Further, the central portion (the area indicated by 803 in FIG. 11) is an area where the crystal has been grown (as indicated by the arrow 802 in FIG. 11) in the direction parallel to the substrate from the area where nickel was directly introduced. . The region on the right side of FIG. 10 (corresponding to the region 805 of FIG. 11) is a region that remains amorphous.

As is apparent from FIG. 10, a region where crystal growth is performed parallel to the substrate (corresponding to 803 in FIG. 11).
There is a linear region having innumerable holes between the amorphous region and the amorphous region (corresponding to 805 in FIG. 11). This area is completely removed and has a hole. It has been found that this region (indicated by 804 in FIG. 11) is the tip of crystal growth in which nickel is present at a high concentration. Further, by further observing the state shown in FIG. 10 in an enlarged manner, it is confirmed that innumerable small holes are opened also in the region where crystal growth is performed in the direction parallel to the substrate, which is indicated by 803 in FIG.

The invention disclosed in this specification has been made in view of the above experimental facts. That is, the crystalline silicon film crystallized by heating by the action of the metal element is subjected to hydrofluoric acid (of course, buffer hydrofluoric acid may be used) treatment to remove the portion of the film having a high concentration of the metal element. Then
A crystalline silicon film having a low concentration of a metal element in the film is obtained.

[0021]

DISCLOSURE OF THE INVENTION The present invention is directed to the production of a crystalline thin film silicon semiconductor by heat treatment at 600 ° C. or lower using a metal element. Minimize the amount. (2) Use a method with high productivity. (3) Crystallinity higher than that obtained by heat treatment is obtained. (4) Minimize the concentration of the metal element in the crystalline silicon film. The challenge is to satisfy at least one of the above requirements.

[0022]

In order to satisfy the above object, the present invention uses the following means to obtain a crystalline silicon film. A metal element simple substance or a compound containing the metal element is held in contact with the amorphous silicon film to promote crystallization of the amorphous silicon film, and the amorphous silicon film contains the metal element simple substance or the metal element. When the compounds are in contact,
Heat treatment is performed to crystallize a part or all of the amorphous silicon film. Then, by performing hydrofluoric acid treatment (etching treatment) using hydrofluoric acid or buffer hydrofluoric acid or an etching solution containing hydrofluoric acid diluted to an appropriate concentration, localization (nickel segregates locally Of the metal element (which is considered to locally form silicide with the metal) is removed, and as a result, the concentration of the metal element in the film is reduced. Then, by irradiating with laser light or intense light, holes generated in the above-described etching process (the silicide of the localized metal and silicon is removed and countless holes are generated).
Are eliminated, and a silicon film having excellent crystallinity is obtained. In addition, the heat treatment is applied after the irradiation of the laser light to reduce the defect density in the film. As the solution for performing the hydrofluoric acid treatment, any solution that can etch silicide can be used. Of course, the one that etches silicon itself cannot be used.

In the above structure, the treatment by heating may be performed without irradiating the laser beam or the intense light. Alternatively, only irradiation with laser light or strong light may be performed. However, it is extremely useful to use the irradiation of laser light or intense light and the annealing process by heating in combination, because the synergistic effects thereof can be obtained. That is, particularly, by irradiating with laser light or intense light, the opening portion formed in the previous etching step (especially the lateral growth region (see FIG.
The effect of being able to eliminate the minute holes (formed in the area indicated by 03) to obtain a silicon film having good crystallinity and reducing the defects in the film by applying heat treatment. By obtaining the effect that can be made,
A crystalline silicon film having excellent crystallinity and few defects in the film can be obtained.

As a method of introducing the metal element that promotes crystallization, a method of applying a solution containing the metal element to the surface of the amorphous silicon film is useful. By using this method, it becomes easy to control the amount of the metal element.

The metal element may be introduced into either the upper surface or the lower surface of the amorphous silicon film. If the metal element is introduced onto the upper surface of the amorphous silicon film, the solution containing the metal element may be applied on the amorphous silicon film after forming the amorphous silicon film. If a metal element is introduced into the lower surface of the silicon film, a solution containing the metal element may be applied to the surface of the base before forming the amorphous silicon film, and the metal element may be held in contact with the surface of the base. Good.

The crystalline silicon film formed by using the invention disclosed in the specification of the invention is used to form PN, P of a semiconductor device.
It is useful to construct an active region having at least one I, NI or other electrical junction. Examples of the semiconductor device include a thin film transistor (TFT), a diode, and an optical sensor. Further, the present invention can be used to form a resistance and a capacitor.

As a method for applying a solution containing an element that promotes crystallization to the amorphous silicon film, an aqueous solution, an organic solvent solution or the like can be used as the solution. Here, the inclusion includes both the meaning of being contained as a compound and the meaning of being contained by simply dispersing.

As the solvent containing a metal element, a solvent selected from polar solvents such as water, alcohol, acid and ammonia can be used.

When nickel is used as a catalyst and this nickel is included in the polar solvent, nickel is introduced as a nickel compound. The nickel compound is typically nickel bromide, nickel acetate, nickel oxalate, nickel carbonate, nickel chloride, nickel iodide, nickel nitrate, nickel sulfate, nickel formate, nickel acetylacetonate, 4-cyclohexyl butyric acid. A material selected from nickel, nickel oxide, and nickel hydroxide is used.

As a solvent containing a metal element, benzene, toluene, xylene, carbon tetrachloride, which are nonpolar solvents,
It is possible to use one selected from chloroform and ether.

In this case, nickel is introduced as a nickel compound. As the nickel compound, one selected from nickel acetylacetonate and nickel 2-ethylhexanoate can be typically used.

It is also useful to add a surfactant to the solution containing the metal element. This is to enhance the adhesion to the surface to be coated and control the adsorptivity. This surfactant may be applied on the surface to be coated in advance.

When nickel alone is used as the metal element, it is necessary to dissolve it in acid to form a solution.

The above is an example of using a solution in which nickel, which is a metal element, is completely dissolved. However, even if nickel is not completely dissolved, a powder of nickel simple substance or a nickel compound is in the dispersion medium. A material such as an emulsion uniformly dispersed in the above may be used. Alternatively, a solution for forming an oxide film may be used. Examples of such a solution include OCD (Ohka Diffusion) of Tokyo Ohka Kogyo Co., Ltd.
Source) can be used. Using this OCD solution, a silicon oxide film can be easily formed by applying it on the surface to be formed and baking it at about 200 ° C. Further, it is also possible to add impurities so that it can be utilized in the present invention. In this case, a metal element is contained in the oxide film, the oxide film is provided in contact with the amorphous silicon film, and heating (350 ° C. to 400 ° C.) for diffusing the metal element into the amorphous silicon film is performed.
C.), the oxide film is removed, and then heat treatment for crystallization may be performed. The heat treatment for this crystallization is performed at a temperature of 450 ° C. to 600 ° C., for example, 550 ° C.
It only has to be done for about an hour.

The temperature for crystallization is 600 ° C.
(High temperature of crystallization of amorphous silicon film) to 1100 ° C. is useful for obtaining high crystallinity. It is important that the heating temperature at this high temperature is equal to or higher than the crystallization temperature of the amorphous silicon film that is the starting film. The crystallization temperature of this amorphous silicon film varies depending on the method of forming the amorphous silicon film and the film forming conditions. Generally, it is about 580 ° C to 620 ° C. Note that when performing heat treatment at this high temperature, it is necessary to use a glass substrate or a quartz substrate having high heat resistance.

The same applies to the case where a material other than nickel is used as the metal element.

When nickel is used as a metal element that promotes crystallization and a polar solvent such as water is used as a solution solvent containing nickel, when these solutions are directly applied to the amorphous silicon film, the solution becomes elastic. You may get burned. In this case, a thin oxide film having a thickness of 100 Å or less is first formed, and a solution containing a metal element is applied thereon, whereby the solution can be uniformly applied. A method of improving wetting by adding a material such as a surfactant to the solution is also effective.

Further, by using a non-polar solvent such as a toluene solution of nickel 2-ethylhexanoate as a solution, the solution can be directly applied to the surface of the amorphous silicon film. In this case, it is effective to pre-apply a material such as an adhesive used when applying the resist. However, if the coating amount is too large, the addition of the metal element to the amorphous silicon will be hindered, and therefore caution must be exercised.

The amount of the metal element contained in the solution depends on the type of the solution, but the general tendency is to set the amount of nickel to 200 ppm to 1 ppm, preferably 50 ppm to 1 ppm (weight conversion) relative to the solution. Is desirable. This is a value determined in consideration of the nickel concentration in the film and the hydrofluoric acid resistance after completion of crystallization.

By performing laser light irradiation after the heat treatment, the crystallinity of the silicon film crystallized by the heat treatment can be further increased. Further, in the case where crystallization is partially caused by the heat treatment, it is possible to further increase the crystal growth from that portion by irradiating the laser beam and realize a state of higher crystallinity.

As the laser light, a pulse oscillation type excimer laser light can be used. For example KrF
An excimer laser (wavelength 248 nm), a XeCl excimer laser (wavelength 308 nm), a XeF excimer laser (wavelengths 351 and 353 nm), an ArF excimer laser (wavelength 193 nm), a XeF excimer laser (wavelength 483 nm), or the like can be used. As the excitation method, a discharge excitation method, an X-ray excitation method, an optical excitation method, a microwave discharge excitation method, an electron beam excitation method, or the like can be used.

Instead of irradiating with laser light, a method of irradiating with intense light, especially infrared light may be adopted. Infrared light is difficult to be absorbed by glass and easily absorbed by a silicon thin film, so that the silicon thin film formed on the glass substrate can be selectively heated, which is useful. This method using infrared light is called rapid thermal annealing (RTA) or rapid thermal process (RTP).

In the invention disclosed in this specification, further heat treatment may be performed in addition to the promotion of crystallization by the irradiation of laser light. This heat treatment may be the same as the heat treatment condition for crystallizing the amorphous silicon film. Of course, it does not have to be exactly the same, and may be performed at a temperature of 400 ° C. or higher.

Defects in the crystalline silicon film can be reduced by the heat treatment performed after the irradiation of the laser beam or the intense light. FIG. 8 shows the result of measuring the spin density of the crystalline silicon film manufactured under the conditions described in the item of sample condition by the electron spin resonance method (ESR). What is described in the item of sample condition of FIG. 8 is
The heating temperature and the heating time in a nitrogen atmosphere, and LC is irradiation of laser light. Also Ni
Except for the samples shown as none, those crystallized using nickel as a metal element are shown. The g value is an index indicating the position of the spectrum, and g = 2.0055 is the spectrum caused by the dangling bond. Therefore, it can be understood that the spin density shown in FIG. 8 corresponds to the dangling bonds in the film.

It can be seen from FIG. 8 that the sample 4 has the lowest spin density and the number of dangling bonds in the film is small. This can be said to indicate that there are the fewest defects and levels in the film. For example, when the sample 3 and the sample 4 are compared, it can be seen that the spin density can be reduced by about one digit. That is, it can be seen that by performing heat treatment after irradiation with laser light, defects and levels in the crystalline silicon film can be reduced by one digit or more.

Further, as can be seen by comparing Sample 2 and Sample 3 in FIG. 8, spin density hardly changes even when laser light is irradiated. That is, it can be seen that irradiation with laser light has no effect on reducing defects in the film. However, it has been found from analysis by a transmission electron micrograph, etc. that there is an extremely high effect of promoting the crystallinity by the irradiation of laser light. Therefore, in order to promote the crystallinity of the crystalline silicon film once crystallized by heating,
Irradiation with laser light is extremely effective, and it is possible to perform heat treatment again on the film whose crystallinity is promoted.
It will be extremely effective in reducing defects in the film. Thus, a silicon film having excellent crystallinity and low defect density in the film can be obtained.

In the present invention, crystal growth can be selectively performed by selectively applying a solution containing a metal element. In this case, in particular, crystal growth can be performed in a direction substantially parallel to the surface of the silicon film from the area where the solution is applied, toward the area where the solution is not applied. In this specification, a region in which crystal growth is performed in a direction substantially parallel to the surface of the silicon film is referred to as a lateral crystal growth region.

It has been confirmed that the concentration of the metal element is low in the region where the crystal growth is performed in the lateral direction.
Although it is useful to use a crystalline silicon film as the active layer region of the semiconductor device, it is generally preferable that the concentration of impurities in the active layer region is low. Therefore, forming the active layer region of the semiconductor device by using the region in which the crystal growth is performed in the lateral direction is useful for device fabrication.

In the present invention, the most prominent effect can be obtained when nickel is used as the metal element, but other types of metal elements that can be used are preferably Fe, Co, Ni, Ru, Rh, and Pd, Os, I
r, Pt, Cu, Ag and Au can be used.

The method of introducing the metal element is not limited to the use of an aqueous solution or a solution such as alcohol, but a wide range of substances containing the metal element can be used.
For example, a metal compound or oxide containing a metal element can be used.

In the present invention, the laser beam or intense light irradiation step for improving the crystallization rate and the heat treatment step for reducing defects in the film may be alternately repeated two or more times. Good. It is also effective to irradiate the laser light a plurality of times. In this case, it is advisable to gradually increase the irradiation energy density every time the laser light is irradiated. For example, when the laser light irradiation is performed twice, the weak laser light may be first irradiated and then the strong laser light may be irradiated next. By doing this,
The influence of the remaining metal components can be reduced.

Further, it is effective to remove the metal element, organic matter and the like existing on the surface by washing the surface of the crystalline silicon film obtained by the action of the metal element. In particular, it is effective to carry out this cleaning after forming the island-shaped semiconductor region forming the active layer.

As such a cleaning method, a treatment step using a solvent having a strong oxidizing power such as ozone water, and an etchant (a hydrofluoric acid such as FPM containing a large effect of removing oxides after the step is included). A process consisting of an etching process using an etchant) is very effective.

In this step, organic substances and metal elements existing on the surface of the active layer are made into an oxide by a solvent having a strong oxidizing power, and the oxide is further removed by etching to clean the exposed surface of the active layer. In this state, it is very effective in suppressing the generation of trap levels due to organic substances and metallic elements. This effect can be seen as being remarkable in the characteristics of the actually manufactured thin film transistor.

[0055]

The crystallization of the amorphous silicon film can be performed at a low temperature in a short time by the action of the interstitial element which is an element that promotes crystallization. Specifically, it was impossible in the past 5
A crystalline silicon film can be obtained by performing heat treatment at 50 ° C. for about 4 hours. In addition, since an element that is interstitial to silicon promotes crystallization while diffusing into the silicon film, a crystalline silicon film without a clear grain boundary is obtained, unlike crystal growth from the crystal nucleus. You can

Further, the crystalline silicon film crystallized by heating by the action of the metal element is treated with hydrofluoric acid to remove the localized nickel silicide portion. That is, the region where the nickel concentration is locally high (the nickel silicide is formed in this region) can be removed. Then, the concentration of the metal element in the film can be lowered. Then, by irradiating with laser light or intense light after the treatment using the hydrofluoric acid, the minute openings formed in the film can be eliminated. Then, by further performing heat treatment, a silicon film with few defects in the film and high crystallinity can be obtained.

By performing the hydrofluoric acid treatment, the concentration of the metal element in the film can be reduced by about 1 to 2 digits. For example, the introduction amount of the metal element is 1 × 10 ¹⁵ to 1 × 10
^{Even with 19} cm ⁻³ , the concentration of the metal element in the film can be reduced to 1 × 10 ¹⁸ cm ⁻³ or less by performing the hydrofluoric acid treatment. Further, defects in the film can be reduced by further performing heat treatment after irradiation with laser light. A buffer hydrofluoric acid generally used may be used as an etchant for performing the hydrofluoric acid treatment, but it is more effective to use FPM which is a mixture of hydrofluoric acid, perhydrogen and water. The concentration of the metal element in this specification is SIMS (secondary ion analysis method).
It is defined as the minimum value of the concentration distribution obtained in.

Further, impurities such as metal elements and organic substances on the surface of the crystalline silicon film are oxidized using a solvent having a strong oxidizing power, and the impurities are removed by etching with an etchant containing hydrofluoric acid. The trap level density on the surface of the conductive silicon film can be reduced. And this can improve the characteristics of the thin film device.

[0059]

【Example】

Example 1 In this example, a metal element that promotes crystallization is contained in an aqueous solution and applied on an amorphous silicon film, followed by heating to crystallize and treatment with buffer hydrofluoric acid. The metal component localized in the crystallized silicon film is removed. Further, by irradiating a laser beam, the openings (defects) of the metal component parts that were previously removed are eliminated, and a silicon film having a low concentration of metal elements and excellent crystallinity is obtained. Is.

The process up to the point of introducing the metal element (here, nickel is used) will be described with reference to FIG. In this embodiment, Corning 7059 glass is used as the substrate. The size is 100 mm × 100 mm.

First, an amorphous silicon film is formed into an amorphous silicon film by plasma CVD or LPCVD.
It forms from 00 to 1500Å. Here, plasma CVD
The amorphous silicon film 12 is formed to a thickness of 1000 Å by the method. (Fig. 1 (A))

Then, a hydrofluoric acid treatment is carried out to remove dirt and a natural oxide film, and thereafter the oxide film 13 is removed by 10 to 50.
Deposit on Å. If dirt can be ignored, oxide film 13
Instead of the above, a natural oxide film may be used as it is.

Since the oxide film 13 is extremely thin, the exact film thickness is unknown, but it is considered to be about 20Å.
Here, the oxide film 1 is formed by irradiation with UV light in an oxygen atmosphere.
3 is deposited. The film forming conditions are UV in an oxygen atmosphere.
Was irradiated for 5 minutes. This oxide film 1
As the film forming method of No. 3, a thermal oxidation method may be used.
Alternatively, treatment with hydrogen peroxide may be used.

This oxide film 13 is for the purpose of spreading the acetate solution over the entire surface of the amorphous silicon film in the later step of applying the acetate solution containing nickel, that is, for improving the wettability. Is. For example, when the acetate solution is directly applied to the surface of the amorphous silicon film, the amorphous silicon repels the acetate solution, so that nickel cannot be introduced to the entire surface of the amorphous silicon film. That is, uniform crystallization cannot be performed.

Next, an acetate solution is prepared by adding nickel to the acetate solution. The concentration of nickel is 25 ppm. Then, 2 ml of this acetate solution is dropped on the surface of the oxide film 13 on the amorphous silicon film 12, and this state is maintained for 5 minutes. And spin dry (2000r
pm, 60 seconds). (Fig. 1 (C), (D))

The concentration of nickel in the acetic acid solution is 1
Practical use is achieved when the content is at least ppm, preferably at least 10 ppm. When a nonpolar solvent such as a toluene solution of nickel 2-ethylhexanoate is used as the solution, the oxide film 1
3 is unnecessary, and the metal element can be directly introduced onto the amorphous silicon film.

A layer containing nickel having an average film thickness of several Å to several hundred Å is formed on the surface of the amorphous silicon film 12 after spin drying by performing this nickel solution coating step once or plural times. Can be formed. In this case, nickel in this layer diffuses into the amorphous silicon film in the subsequent heating step and acts as a catalyst for promoting crystallization. Note that this layer is not necessarily a perfect film.

After applying the above solution, the state is maintained for 1 minute. The concentration of nickel contained in the silicon film 12 can be finally controlled also by the holding time, but the largest control factor is the concentration of the solution.

Then, in a heating furnace, heat treatment is performed at 550 ° C. for 4 hours in a nitrogen atmosphere. As a result,
It is possible to obtain the crystalline silicon thin film 12 formed on the substrate 11.

The above heat treatment can be performed at a temperature of 450 ° C. or higher, but if the temperature is low, the heating time must be lengthened and the production efficiency will be reduced. Further, if the temperature is 550 ° C. or more, the problem of heat resistance of the glass substrate used as the substrate is exposed.

In this embodiment, the method of introducing the metal element onto the amorphous silicon film has been described, but the method of introducing the metal element below the amorphous silicon film may be adopted. in this case,
The metal element may be introduced onto the base film using a solution containing the metal element before forming the amorphous silicon film.

Here, since nickel element is introduced into the entire surface, the entire film is crystal-grown in the direction perpendicular to the substrate. Silicon film 12 having crystallinity due to heat treatment
Once obtained, treatment is carried out using 1/100 buffer hydrofluoric acid. In this step, the nickel component localized in the film (existing as nickel silicide) is removed. Here, by removing the nickel component, the nickel concentration in the film can be reduced. And Kr
F excimer laser (wavelength 248 nm, pulse width 30 ns
ec) in a nitrogen atmosphere at 200 to 350 mJ / c
Irradiate several shots with a power density of m ² . By irradiating with this laser light, the nickel component portion (having fine openings) removed in the previous step can be eliminated.

This step may be performed by irradiation with infrared light as described above. In this step, it is effective to increase the pulse width of the excimer laser light. This is because it is possible to lengthen the melting time of the surface of the silicon film generated by the irradiation of the laser beam and promote the crystal growth in the minute portion.

By irradiating with this laser beam, the crystallinity of the silicon film can be further improved and, at the same time, the minute holes generated in the processing step using buffer hydrofluoric acid can be eliminated. Then, after the irradiation with the laser light is completed, the temperature is set to 550
After that, heat treatment is performed for 4 hours. This heat treatment is 400
It can be performed at a temperature of ℃ or more. By performing heat treatment after the irradiation with the laser light, defects in the silicon film can be reduced. In this way, a crystalline silicon film having a low nickel concentration in the film, excellent crystallinity, and few defects can be obtained.

[Embodiment 2] This embodiment is an example in which a 1200 Å silicon oxide film is selectively provided in the manufacturing method shown in Embodiment 1 and nickel is selectively introduced using this silicon oxide film as a mask. .

FIG. 2 shows an outline of the manufacturing process in this embodiment. First, the glass substrate (Corning 7059, 10c
A silicon oxide film 21 serving as a mask is formed on the (m square) to a thickness of 1000 Å or more, here 1200 Å. The film thickness of the silicon oxide film 21 is 5 according to experiments by the inventors.
It has been confirmed that there is no problem even with 00Å, and if the film quality is dense, it may be possible to make it thinner.

Then, the silicon oxide film 21 is patterned into a required pattern by a usual photolithographic patterning process. Then, a thin silicon oxide film 20 is formed by irradiation of ultraviolet rays in an oxygen atmosphere. This silicon oxide film 2
Production of 0 is performed by irradiating UV light for 5 minutes in an oxygen atmosphere. The thickness of the silicon oxide film 20 is considered to be about 20 to 50Å (FIG. 2 (A)). still,
The silicon oxide film for improving the wettability may be added just by the hydrophilicity of the silicon oxide film of the mask only when the size of the solution and the pattern match. However, such an example is special, and it is generally safer to use the silicon oxide film 20.

In this state, as in Example 1, 10
5 ml of an acetate solution containing 0 ppm of nickel is dropped (in the case of a 10 cm square substrate). At this time, spin coating is performed with a spinner at 50 rpm for 10 seconds to form a uniform water film on the entire surface of the substrate. In this state, 5
After holding for 2 minutes, using a spinner, 2000 rpm, 60
Perform a second spin dry. This holding may be performed while rotating the spinner at 0 to 150 rpm. (FIG. 2 (B))

Then, the amorphous silicon film 12 is crystallized by performing heat treatment at 550 ° C. (nitrogen atmosphere) for 4 hours. At this time, crystal growth is performed in the lateral direction from the region of the portion 22 into which nickel has been introduced to the region into which nickel has not been introduced, as indicated by 23. In FIG. 2C, 24 is a region in which nickel is directly introduced and crystallized, and 25 is a region in which lateral crystallization is performed. It has been confirmed that crystal growth is performed in the approximately <111> axis direction in the 25 regions. Also this 25
It has been confirmed by a TEM photograph (transmission electron microscope photograph) that the crystal growth progresses in a columnar or branched shape in a region parallel to the substrate.

After the crystallization step by the above heat treatment, 1 /
The localized crystal component is removed by using 100 buffer hydrofluoric acid. Here, 1/100 of buffer hydrofluoric acid was used, but its concentration may be set at a suitable time. As the etching solution used here, hydrofluoric acid or a solution containing hydrofluoric acid can be used. As this solution, a solution for etching silicon silicide or silicon oxide can be used.

Next, a XeCl laser (wavelength 308 nm)
Is used to further improve the crystallinity of the silicon film 12. By the laser light irradiation performed in this step, the opening portion formed in the previous etching step (formed as a result of removing the localized nickel silicide)
Can be extinguished. That is, the surface of the silicon film is brought into a molten state by the irradiation of the laser beam, and this opening can be eliminated. Further, in this step, in the previous heat treatment, crystallization progresses between the pillars or between the branches or between the pillars of the portion where the crystal is grown in the pillar shape or the branch shape in the direction parallel to the substrate. That is, the crystallization rate can be increased. Thus, by this step, the crystallinity of the laterally grown region 25 can be greatly enhanced.

In the laser light irradiation step,
It is effective to heat the substrate or the surface to be irradiated with laser light. The heating temperature is preferably about 200 ° C to 450 ° C.

After the irradiation of laser light is completed, heat treatment is performed for 4 hours at 550 ° C. (nitrogen atmosphere) to further reduce defects in the film.

In this example, the concentration of nickel in the region where nickel was directly introduced was changed from 1 × 10 ¹⁵ atoms cm ⁻³ to 1 by changing the solution concentration and the holding time.
The concentration can be controlled in the range of × 10 ¹⁹ atoms cm ⁻³ , and similarly, the concentration of the lateral growth region can be controlled to be lower than that.

The crystalline silicon film formed by the method shown in this embodiment is characterized by having a good hydrofluoric acid resistance. It is natural that this may be because hydrofluoric acid treatment is once performed.

For example, it is necessary to form a silicon oxide film functioning as a gate insulating film or an interlayer insulating film on a crystalline silicon film, and then perform a hole forming process to form an electrode and then form an electrode. It may be said that. In such a case, a process of removing the silicon oxide film with buffer hydrofluoric acid is usually adopted. However, when the hydrofluoric acid resistance of the crystalline silicon film is low, it is difficult to remove only the silicon oxide film, and there is a problem that the crystalline silicon film is also etched.

However, when the crystalline silicon film has a hydrofluoric acid resistance, a large difference (selection ratio) between the etching rates of the silicon oxide film and the crystalline silicon film can be obtained, so that the silicon oxide film can be made larger. Only this can be selectively removed, which is extremely significant in the manufacturing process.

As described above, the region in which the crystal has grown in the lateral direction has a low concentration of the metal element and has good crystallinity. Therefore, it is useful to use this region as the active region of the semiconductor device. For example, it is extremely useful to use it as a channel formation region of a thin film transistor.

[Embodiment 3] This embodiment is an example of obtaining a TFT by using a crystalline silicon film produced by the method of the present invention. The TFT of this embodiment can be used in a driver circuit or a pixel portion of an active matrix type liquid crystal display device. It is needless to say that the application range of the TFT is not limited to the liquid crystal display device but can be applied to a generally-known thin film integrated circuit.

FIG. 3 shows an outline of the manufacturing process of this embodiment.
First, an underlying silicon oxide film (not shown) is formed on the glass substrate by 2
Form a film with a thickness of 000Å. This silicon oxide film is provided to prevent the diffusion of impurities from the glass substrate.

Then, an amorphous silicon film is formed to a thickness of 500 Å by the same method as in the first embodiment. After the hydrofluoric acid treatment to remove the natural oxide film, remove the thin oxide film by 20Å
The film is formed to a thickness of about 10 nm by irradiation with UV light in an oxygen atmosphere. The method of forming this thin oxide film may be a method using perhydrogen treatment or thermal oxidation.

Then, an acetate solution containing 10 ppm of nickel is applied, held for 5 minutes, and spin-dried using a spinner. After that, the silicon oxide films 20 and 21 are removed by buffer hydrofluoric acid, and the silicon film is crystallized by heating at 550 ° C. for 4 hours. (Up to this point, it is the same as the manufacturing method shown in Example 1)

By performing the above heat treatment, a silicon film in which an amorphous component and a crystalline component are mixed can be obtained. This crystal component is a region where crystal nuclei are present. Then one
Hydrofluoric acid treatment is carried out using / 100 buffer hydrofluoric acid.
Furthermore, the KrF excimer laser light is 200 to 300 mJ.
By irradiating with, the disappearance of the holes generated by the hydrofluoric acid treatment and the crystallization of the silicon film are promoted. In the laser light irradiation step, the substrate is heated to about 400 ° C. By this step, crystal growth is performed with the crystal nuclei existing in the crystal component as nuclei.

Next, the crystallized silicon film is patterned to form island regions 104. This island area 10
Reference numeral 4 constitutes an active layer of the TFT. And thickness 200 ~
The silicon oxide 105 of 1500 Å, here 1000 Å, is formed. This silicon oxide film also functions as a gate insulating film. (Fig. 3 (A))

Attention must be paid to the formation of the silicon oxide film 105. Here, TEOS is used as a raw material, and the substrate temperature is 150 to 600 ° C., preferably 300 to 45, together with oxygen.
It was decomposed and deposited at 0 ° C. by the RF plasma CVD method. TE
The pressure ratio of OS and oxygen is 1: 1 to 1: 3, the pressure is 0.05 to 0.5 torr, and the RF power is 100 to 25.
It was set to 0W. Alternatively, by using TEOS as a raw material together with ozone gas by a low pressure CVD method or a normal pressure CVD method,
The substrate temperature is 350 to 600 ° C., preferably 400 to 55
It was formed as 0 ° C. After the film formation, annealing was performed at 400 to 600 ° C. for 30 to 60 minutes in an atmosphere of oxygen or ozone.

In this state, the KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) or strong light equivalent thereto may be irradiated to promote crystallization of the silicon region 104. In particular, RTA using infrared light
(Rapid thermal annealing) can selectively heat only silicon without heating the glass substrate, and can reduce the interface state at the interface between the silicon and the silicon oxide film. It is useful in the fabrication of a field effect semiconductor device.

After the irradiation of the laser beam is completed, heat treatment is performed at 550 ° C. for 4 hours in a nitrogen atmosphere.

After that, an aluminum film having a thickness of 2000 Å to 1 μm is formed by an electron beam evaporation method, and this is patterned to form a gate electrode 106. The aluminum may be doped with scandium (Sc) in an amount of 0.15 to 0.2% by weight. Next, set the substrate pH
It is immersed in an ethylene glycol solution of 7 to 1 to 3% tartaric acid, and anodization is performed using platinum as a cathode and this aluminum gate electrode as an anode. The anodization is completed by first raising the voltage to 220 V with a constant current and then maintaining that state for 1 hour. In the present embodiment, in the constant current state, it is appropriate that the voltage rising rate is 2 to 5 V / min. In this way, the anodic oxide 109 having a thickness of 1500 to 3500Å, for example 2000Å, is formed. (FIG. 3 (B))

After that, an impurity (phosphorus) was self-alignedly injected into the island-shaped silicon film of each TFT by an ion doping method (also called a plasma doping method) using the gate electrode portion as a mask. Phosphine (PH ₃ ) was used as the doping gas. The dose amount is 1 to 4 × 10
¹⁵ cm ^-2 .

Furthermore, as shown in FIG. 3C, a KrF excimer laser (wavelength 248 nm, pulse width 20 ns) is used.
ec) is applied to improve the crystallinity of the portion where the crystallinity is deteriorated by the introduction of the impurity region. The energy density of the laser is 150 to 400 mJ / cm ² , preferably 200 to 250 mJ / cm ² . Thus, the N-type impurity (phosphorus) regions 108 and 109 are formed. The sheet resistance in these regions was 200 to 800 Ω / □.

In this step, a flash lamp is used instead of laser light for 1000
Use high intensity light equivalent to so-called laser light such as so-called RTA (Rapid Thermal Annealing) (RTP, also called rapid thermal process) that heats the sample by raising it to ~ 1200 ° C (temperature of silicon monitor). May be.

After that, an interlayer insulator 110 is formed on the entire surface.
Plasma CVD with TEOS as raw material and oxygen
Method, low pressure CVD method with ozone, or atmospheric pressure CV
A silicon oxide film having a thickness of 3000 Å is formed by the D method. The substrate temperature is 250 to 450 ° C., for example 350 ° C.
After the film formation, this silicon oxide film is mechanically polished to obtain the flatness of the surface. (Fig. 3 (D))

Then, the interlayer insulator 110 is etched to form contact holes in the source / drain of the TFT as shown in FIG. 1E, and wirings 112 and 113 of chromium or titanium nitride are formed.

Conventionally, a crystalline silicon film into which nickel is introduced by plasma treatment has a lower selectivity to buffer hydrofluoric acid than a silicon oxide film, and is therefore etched in the step of forming the contact hole. There were many

However, when nickel is introduced by using an aqueous solution at a low concentration of 10 ppm as in this embodiment, since the hydrofluoric acid resistance is high, the formation of the contact hole can be stably performed with good reproducibility. it can.

Finally, in hydrogen at 300 to 400 ° C.
Anneal for 1-2 hours to complete hydrogenation of silicon. In this way, the TFT is completed. Then, a large number of TFTs manufactured at the same time are arranged in a matrix to complete an active matrix liquid crystal display device.
This TFT has source / drain regions 108/109 and a channel formation region 114. Also 115 is N
It becomes the electrical junction of I.

When the structure of this embodiment is adopted, the concentration of nickel existing in the active layer is about 3 × 10 ¹⁸ cm ⁻³ or less, 1 × 10 ¹⁵ atoms cm ^{−3 to} 3 × 10 5.
It is considered to be ¹⁸ atoms cm ^-3 .

The TFT manufactured in this example has a mobility of 150 cm ² / Vs or more in the N channel. It is also confirmed that V _th is small and that it has good characteristics. Furthermore, the variation in mobility is ± 10%.
It is confirmed to be within. It is considered that this small variation is due to the process of incomplete crystallization by heat treatment and promotion of crystallinity by irradiation of laser light. When only the laser light is used, an N-channel type having a light intensity of 150 cm ² / Vs or more can be easily obtained, but the variation is large and the uniformity as in this embodiment cannot be obtained.

[Embodiment 4] In this embodiment, as shown in Embodiment 2, nickel is selectively introduced, and electrons are emitted from the portion where crystals are grown in the lateral direction (direction parallel to the substrate). An example of forming a device is shown. When such a structure is adopted, the nickel concentration in the active layer region of the device can be further lowered, and the structure can be made extremely preferable in terms of electrical stability and reliability of the device.

FIG. 4 shows the manufacturing process of this embodiment. First,
The substrate 201 is washed, and a base film 202 of silicon oxide having a thickness of 2000 Å is formed by a plasma CVD method using TEOS (tetra-ethoxy-silane) and oxygen as source gases. Then, by the plasma CVD method, the thickness of 500 to
An intrinsic (I-type) amorphous silicon film 203 of 1500Å, for example 1000Å, is formed. Next, the thickness is continuously 500-2
A silicon oxide film 205 having a thickness of 000 Å, for example 1000 Å, is formed by a plasma CVD method. Then, the silicon oxide film 2
05 is selectively etched to form exposed regions 206 of amorphous silicon.

Then, according to the method shown in Example 2, a solution containing nickel element which is a metal element for promoting crystallization (here, an acetate solution) is applied. The concentration of nickel in the acetic acid solution is 100 ppm. In addition, the detailed process order and conditions are the same as those shown in the second embodiment.
This step may be according to the method shown in Example 3 or 4.

After that, in a nitrogen atmosphere, 500-620.
The silicon film 203 is crystallized by performing heat annealing at 4 ° C., for example, 550 ° C. for 4 hours. Crystallization proceeds from a region 206 where the nickel film and the silicon film are in contact with each other as a starting point, and crystal growth proceeds in a direction parallel to the substrate as indicated by an arrow. In the figure, a region 204 shows a portion crystallized by direct introduction of nickel, and a region 203 shows a portion crystallized laterally. The crystal in the lateral direction indicated by 203 is 2
It is about 5 μm. The crystal growth direction is roughly <11.
It has been confirmed that the direction is 1> axial. (Fig. 4
(A))

After the crystallization step by the above heat treatment, 1 /
Hydrofluoric acid treatment is performed using 100 buffer hydrofluoric acid. Further, the irradiation of infrared light promotes the anil of the opening (the portion where the localized nickel component (nickel silicide) is removed) generated in the hydrofluoric acid treatment and the crystallinity of the silicon film 203. This step is performed by irradiating infrared light having a wavelength of 1.2 μm. By this step, it is possible to obtain the same effect as that obtained by performing high temperature heat treatment for several minutes.

A halogen lamp is used as an infrared light source. The intensity of infrared light is adjusted so that the temperature on the monitor's single crystal silicon wafer is between 900 and 1200 ° C. Specifically, the temperature of the thermocouple embedded in the silicon wafer is monitored, and this is fed back to the infrared light source. In this embodiment, the temperature rise is constant, the speed is 50 to 200 ° C./sec, and the temperature fall is 20 to 100 by natural cooling.
℃. Since this infrared light irradiation selectively heats the silicon film, the heating of the glass substrate can be minimized.

Further, in a nitrogen atmosphere, 550 ° C., 4
Heat treatment is performed for a time to reduce defects in the film. Next, the silicon oxide film 205 is removed. At this time, the area 206
The oxide film formed on the surface of is also removed at the same time. And
After patterning the silicon film 204, dry etching is performed to form an island-shaped active layer region 208. At this time, FIG.
The region indicated by 206 in (A) is a region in which nickel was directly introduced, although nickel component was removed, and is a region in which nickel was present in a relatively high concentration. It has also been confirmed that nickel is present at a relatively high concentration at the tip of crystal growth. It has been found that the nickel concentration in these regions is higher than that in the intermediate region. Therefore, in this embodiment,
In the active layer 208, these regions having a high nickel concentration were prevented from overlapping the channel formation region. By doing so, a region having low nickel concentration and high crystallinity can be used as an active layer of the device.

Thereafter, 10% containing 100% by volume of water vapor.
The surface of the active layer (silicon film) 208 is oxidized by leaving it in the atmosphere of 500 to 600 ° C., typically 550 ° C. for 1 hour to oxidize the surface of the silicon oxide film 209.
To form. The thickness of the silicon oxide film is 1000Å. After forming the silicon oxide film 209 by thermal oxidation, the substrate is placed in an ammonia atmosphere (1 atm, 100%) at 400 ° C.
To hold. Then, in this state, the substrate is irradiated with infrared light having a peak at a wavelength of 0.6 to 4 μm, for example, 0.8 to 1.4 μm for 30 to 180 seconds, and the silicon oxide film 20 is irradiated.
A nitriding process is performed on 9. At this time, the atmosphere was 0.
1-10% HCl may be mixed. (Fig. 4 (B))

Subsequently, by the sputtering method,
A film of aluminum (containing 0.01 to 0.2% scandium) having a thickness of 3000 to 8000Å, for example, 6000Å is formed. Then, the aluminum film is patterned to form the gate electrode 210. (Fig. 2 (C))

Further, the surface of the aluminum electrode is anodized to form an oxide layer 211 on the surface. This anodic oxidation is performed in an ethylene glycol solution containing 1-5% tartaric acid. The resulting oxide layer 211 has a thickness of 2
It is 000Å. Since the oxide 211 has a thickness to form the offset gate region in the subsequent ion doping process, the length of the offset gate region can be determined by the anodic oxidation process. (Fig. 4
(D))

Next, the gate electrode portion, that is, the gate electrode 210 and the oxide layer 211 around it is used as a mask in the active layer region (which constitutes the source / drain and the channel) by the ion doping method (also called plasma doping method). An impurity (here, phosphorus) that imparts the N conductivity type is added in a self-aligning manner. Phosphine (PH ₃ ) is used as the doping gas, and the acceleration voltage is set to 60 to 90 kV, for example, 80 kV. Dose amount is 1 × 10 ¹⁵ to 8 × 10
^{It is set to 15} cm ^-2 , for example, 4 × 10 ¹⁵ cm ^-2 . As a result, N-type impurity regions 212 and 213 can be formed. As is clear from the figure, the impurity region and the gate electrode are in an offset state separated by a distance x. Such an offset state is particularly effective in reducing a leak current (also referred to as an off current) when a reverse voltage (negative in the case of an N-channel TFT) is applied to the gate electrode.
In particular, in the TFT for controlling the pixels of the active matrix as in the present embodiment, it is desired that the leak current is low so that the charges accumulated in the pixel electrode do not escape in order to obtain a good image, and therefore an offset is provided. That is valid.

After that, annealing is performed by irradiation with laser light. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used, but other laser may be used. The laser light irradiation conditions are energy density of 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ² and ² to 10 per place
Shot, for example, 2 shots were irradiated. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation of the laser light. (Fig. 4 (E))

Then, a silicon oxide film 21 having a thickness of 6000Å is formed.
4 as an interlayer insulator is formed by the plasma CVD method. Further, a transparent polyimide film 215 is formed by spin coating to flatten the surface.

Then, contact holes are formed in the interlayer insulators 214 and 215, and the electrodes / wirings 217 and 218 of the TFT are formed from a metal material, for example, a multilayer film of titanium nitride and aluminum. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete an active matrix pixel circuit having TFTs. (Fig. 4
(F))

Since the TFT manufactured in this embodiment can obtain high mobility, it can be used for a driver circuit of an active matrix type liquid crystal display device.

[Embodiment 5] FIG. 5 shows a cross-sectional view of a manufacturing process of this embodiment. First, the substrate (Corning 7059) 50
A base film 502 of silicon oxide having a thickness of 2000 Å is formed on the substrate 1 by sputtering. The substrate is annealed at a temperature higher than the strain temperature before or after the formation of the base film, and then gradually cooled to the strain temperature or less at 0.1 to 1.0 ° C./min. The shrinkage of the substrate in the accompanying steps (including the thermal oxidation step of the present invention and the subsequent thermal annealing step) is small, and mask alignment is ready. For Corning 7059 substrates, 1-4 at 620-660 ° C
After annealing for an hour, it is gradually cooled at 0.03 to 1.0 ° C./min, preferably 0.1 to 0.3 ° C./min, and 400 to 500.
It is recommended to take out when the temperature has dropped to ℃.

Next, a thickness of 5 is formed by the plasma CVD method.
An intrinsic (I-type) amorphous silicon film having a thickness of 00 to 1500Å, for example, 1000Å is formed. Then, nickel is introduced into the surface of the amorphous silicon film as a metal element that promotes crystallization by the method described in Example 1. Then, it is annealed in a nitrogen atmosphere (atmospheric pressure) at 550 ° C. for 4 hours to be crystallized. Then, hydrofluoric acid treatment is performed using 1/50 buffer hydrofluoric acid to remove the nickel component (nickel silicide) localized in the film. Further, it is irradiated with a KrF excimer laser to further promote crystallization. Further, heat treatment is performed at 550 ° C. for 4 hours in a nitrogen atmosphere. Then, the silicon film is patterned into a size of 10 to 1000 μm square to form an island-shaped silicon film (active layer of TFT) 503. (Figure 5 (A))

Thereafter, the pyrogenic reaction method was carried out in an oxygen atmosphere containing 70 to 90% of water vapor at 500 to 750 ° C., typically 600 ° C. at a hydrogen / oxygen ratio of 1.5 to 1.9. It is formed by using. By leaving it in such an atmosphere for 3 to 5 hours, the surface of the silicon film is oxidized to form a silicon oxide film 504 having a thickness of 500 to 1500 Å, for example, 1000 Å. It should be noted that such oxidation reduces the surface of the initial silicon film by 50 Å or more, and as a result, the contamination of the outermost surface portion of the silicon film is reduced to the silicon-
That is, it does not reach the silicon oxide interface. That is, a clean silicon-silicon oxide interface can be obtained. Since the thickness of the silicon oxide film is twice as large as that of the silicon film to be oxidized, a silicon film having a thickness of 1000Å is oxidized to a thickness of 10
When a silicon oxide film of 00Å is obtained, the thickness of the remaining silicon film is 500Å.

Generally, the thinner the silicon oxide film (gate insulating film) and the active layer are, the better the mobility is and the better the off current is reduced. On the other hand, in the initial crystallization of the amorphous silicon film, the thicker the film, the easier the crystallization. Therefore, conventionally, regarding the thickness of the active layer, there is a contradiction in terms of characteristics and processes. The present invention solves this contradiction for the first time, that is, a thick amorphous silicon film is formed before crystallization to obtain a good crystalline silicon film. Then, next, the silicon film is thinned by oxidizing the silicon film to improve the characteristics as a TFT. Further, in this thermal oxidation, the amorphous component in which recombination centers are likely to exist and the crystal grain boundaries are easily oxidized, and as a result, the recombination centers in the active layer are reduced. Therefore, the product yield is increased.

After the silicon oxide film 504 is formed by thermal oxidation, the substrate is placed in a dinitrogen monoxide atmosphere (1 atm, 100 atm).
%), And anneal at 600 ° C. for 2 hours. (FIG. 5 (B)) Subsequently, a thickness of 3000 to 8 is formed by a low pressure CVD method.
000Å, for example, 6000Å polycrystalline silicon (0.01 to
A film containing 0.2% phosphorus) is formed. Then, the silicon film is patterned to form a gate electrode 505. Further, by using the silicon film as a mask, an impurity (phosphorus in this case) which imparts N conductivity type to the active layer region (which constitutes a source / drain and a channel) is self-aligned by an ion doping method (also referred to as plasma doping method). ) Is added. Phosphine (PH ₃ ) as doping gas
And the acceleration voltage is set to 60 to 90 kV, for example, 80 kV. The dose amount is set to 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 5 × 10 ¹⁵ cm ⁻² . As a result, N-type impurity regions 506 and 507 are formed.

After that, annealing is performed by irradiation with laser light. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but another laser may be used. The laser light irradiation conditions are energy density of 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ² and ² to 10 per place
Irradiate a shot, for example, two shots. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation of the laser light. (Fig. 6 (C))

Further, this step may be performed by lamp annealing with near infrared light. Near-infrared rays are more easily absorbed by crystallized silicon than by amorphous silicon, and effective annealing comparable to thermal annealing at 1000 ° C. or higher can be performed. On the other hand, a glass substrate (far infrared light is absorbed by the glass substrate, but visible / near infrared light (wavelength 0.5 to 4
(μm) is hard to be absorbed to), so the glass substrate does not have to be heated to a high temperature and can be processed in a short time, so it is an optimal method in the process where shrinkage of the glass substrate is a problem. Can be said.

Then, a silicon oxide film 50 having a thickness of 6000Å is formed.
8 is formed as an interlayer insulator by the plasma CVD method. Polyimide may be used as the interlayer insulator. Further, a contact hole is formed, and a TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 509 and 510 are formed. Finally, 1
The TFT is completed by annealing at 350 ° C. for 30 minutes in a hydrogen atmosphere at atmospheric pressure. (Figure 6 (D))

The TFT obtained by the above method has a mobility of 110 to 150 cm ² / Vs and an S value of 0.2 to 0.5.
It was V / digit. Further, when a P-channel TFT in which the source / drain is doped with boron was manufactured by the same method, the mobility was 90 to 120 cm ² / Vs,
The S value is 0.4 to 0.6 V / digit, and the mobility is 20% or more higher than the case where the gate insulating film is formed by the known PVD method or the CVD method, and the S value is 20% or more. Diminished. In addition, in terms of reliability, the T
FT is a TF produced by high temperature thermal oxidation at 1000 ° C.
It showed good results comparable to T.

[Embodiment 6] FIG. 6 shows a cross-sectional view of a manufacturing process of this embodiment. The TFT shown in this embodiment is a TFT arranged in a pixel portion of an active matrix type liquid crystal display device.
Regarding FT.

First, a base film 52 of silicon oxide having a thickness of 2000 Å is formed on a substrate (Corning 7059) 51.
Further, an amorphous silicon film is formed by plasma CVD to 200-
An intrinsic (I-type) amorphous silicon film of 1500 Å, here 800 Å, is formed. Then, by the method shown in Example 1, nickel, which is a metal element, is introduced, and 550
The crystalline silicon film is transformed by performing a heat treatment at 4 ° C. for 4 hours in a nitrogen atmosphere. Then, hydrofluoric acid treatment is performed using 1/70 buffer hydrofluoric acid to remove the nickel component localized in the film. Then, the crystallinity of this crystalline silicon film is further promoted by irradiating with KrF excimer laser light. 550 in a nitrogen atmosphere
Add heat treatment at 4 ° C. for 4 hours.

The crystalline silicon film thus obtained is
A crystalline silicon film having no specific crystal grain boundary in a specific region can be formed, and an active layer of a TFT can be formed at an arbitrary position on the surface thereof. That is, since the entire film is crystallized uniformly, even when the thin film transistors are formed in a matrix, the physical properties of the crystalline silicon film forming the active layer of the TFT can be made uniform throughout. As a result, a large number of TFTs with small variations in characteristics can be formed. Moreover, since the nickel component in the film can be extremely reduced, the stability of the device can be enhanced.

Then, by patterning,
An island region 53 made of crystalline silicon is formed. Then, a silicon oxide film 54 having a thickness of 1000Å is formed so as to cover the island region. Although an example of forming one TFT will be described below with reference to FIG. 6, actually, the required number of TFTs are formed in a matrix at the same time.

Subsequently, by the sputtering method,
An aluminum film (containing 0.1 to 0.3% by weight of scandium) having a thickness of 3000 to 8000 Å, for example, 6000 Å is deposited. Then, a thin anodic oxide having a thickness of 100 to 400 Å is formed on the surface of the aluminum film. Then, a photoresist having a thickness of about 1 μm is formed on the aluminum film thus treated by a spin coating method. Then, the gate electrode 55 is formed by a known photolithography method. Here, the photoresist mask 56 remains on the gate electrode. (FIG. 6
(A))

Next, the substrate is immersed in a 10% oxalic acid aqueous solution, and 10 to 500 at a constant voltage of 5 to 50 V, for example, 8 V.
Minutes, for example 200 minutes, by anodizing,
A porous anodic oxide 57 having a thickness of about 5000Å is formed on the side surface of the gate electrode. Mask material 5 on top of the gate electrode
Since 6 was present, anodic oxidation hardly progressed. (Fig. 6 (B))

Next, the mask material is removed to expose the upper surface of the gate electrode, and the substrate is immersed in a 3% ethylene glycol solution of tartaric acid (pH adjusted to neutral with ammonia), and an electric current is applied to this. 1-5V / min, for example 4V
The voltage is increased to 100 V at the speed of / minute to perform anodization. At this time, not only the upper surface of the gate electrode but also the side surface of the gate electrode is anodized, and a dense non-porous anodic oxide 58 is formed.
Is formed with a thickness of 1000Å. The withstand voltage of this anodic oxide is 50 V or more. (Fig. 6 (C))

Next, the silicon oxide film 54 is etched by the dry etching method. In this etching, anodic oxides 37 and 38 are not etched, only the silicon oxide film is etched. In addition, the silicon oxide film under the anodic oxide is not etched and the gate insulating film 59 is not etched.
Remains as. (Figure 6 (D))

Next, the porous anodic oxide 57 is etched using phosphoric acid, a mixed acid of phosphoric acid, acetic acid and nitric acid to expose the non-porous anodic oxide 58. Then, an impurity (phosphorus) is implanted into the silicon region 33 by plasma doping using the gate electrode 35 and the porous anodic oxide 37 on the side surface as a mask. Phosphine (PH ₃ ) is used as a doping gas, and the acceleration voltage is set to 5 to 30 kV, for example, 10 kV. Dose amount is 1 × 10 ¹⁴ to 8 × 10 ¹⁵ c
m ⁻² , for example, 2 × 10 ¹⁵ cm ⁻² .

In this doping step, a high concentration of phosphorus is implanted into the region 60 which is not covered with the gate insulating film 59, but in the region 61 whose surface is covered with the gate insulating film 59, the gate insulating film is formed. Is a hindrance, and the doping amount is small.
Only% impurities are injected. As a result, N-type high-concentration impurity regions 60 and low-concentration impurity regions 61 are formed. (Fig. 6 (E))

After that, laser light is radiated from the upper surface,
Laser annealing is performed to activate the doped impurities. Then, a silicon oxide film 6 having a thickness of 6000Å
2 is formed as an interlayer insulator by the plasma CVD method. Then, the ITO electrode 64 to be the pixel electrode is formed. Further, a contact hole is formed, and a TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
An electrode / wiring 63 for the source and drain regions of T is formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm. The thin film transistor is completed through the above steps. (Fig. 6 (F))

In this example, the same structure as a so-called low-concentration drain (LDD) structure can be obtained. LDD
Although the structure has been shown to be effective in suppressing deterioration due to hot carriers, the TF produced in this example
The same effect can be obtained with T. However, the known LD
Compared with the process for obtaining D, this embodiment is characterized in that LDD can be obtained by a single doping step. Further, the present embodiment is characterized in that the high-concentration impurity region 60 is defined by utilizing the gate insulating film 59 defined by the porous anodic oxide 57. That is, finally, the impurity regions are indirectly defined by the porous anodic oxide 57. Then, as is clear in this embodiment, the width x of the LDD region is
Substantially determined by the width of the porous anodic oxide.

A higher degree of integration can be performed by using the manufacturing method of this embodiment. And at that time,
It is more convenient to change the width x of the offset region or the LDD region according to the required characteristics of the TFT.
In particular, when the configuration of the present embodiment is adopted, it is possible to realize reduction of the OFF current, and therefore it is most suitable for the TFT for the purpose of retaining charges in the pixel electrode.

[Embodiment 7] FIG. 7 shows a block diagram of an electro-optical system using an integrated circuit in which a display, a CPU and a memory are mounted on one glass substrate. Here, the input port is a memory unique to the panel that reads a signal input from the outside and converts it into an image signal, and the correction memory corrects the input signal according to the characteristics of the active matrix panel. is there. In particular, this correction memory is for financing and individually correcting the information unique to each pixel as a non-volatile memory. That is, when a pixel of the electro-optical device has a point defect, a signal corrected accordingly is sent to the pixels around the point to cover the point defect and make the defect inconspicuous.
Alternatively, when the pixel is darker than the surrounding pixels, a larger signal is sent to the pixel so that the surrounding pixels have the same brightness.

The CPU and the memory are similar to those of a normal computer, and in particular, the memory has an image memory corresponding to each pixel as a RAM. Further, the backlight for irradiating the substrate from the back side can be changed according to the image information.

Then, in order to obtain the width of the offset region or LDD region suitable for each of these circuits,
Wirings of 3 to 10 systems may be formed so that anodizing conditions can be individually changed. Typically, in an active matrix circuit, the channel length is 10 μm and L
The width of the DD region is 0.4 to 1 μm, for example, 0.6 μm.
In the driver, an N-channel TFT has a channel length of 8 μm and a channel width of 200 μm, and the LDD region has a width of 0.2 to 0.3 μm, for example, 0.25 μm. Similarly, in the P-channel TFT, the channel length is 5 μm,
The channel width is 500 μm, and the width of the LDD region is 0 to 0.
2 μm, for example 0.1 μm. In the decoder,
The N-channel TFT has a channel length of 8 μm and a channel width of 10 μm, and the LDD region has a width of 0.3 to 0.4 μm.
For example, 0.35 μm. Similarly, in the P-channel TFT, the channel length is 5 μm and the channel width is 10 μm.
The width of the LDD region is 0 to 0.2 μm, for example, 0.1 μm
And it is sufficient. Further, in FIG. 6, the CPU, the input port, the correction memory, the NTFT and PTFT of the memory are LDD as in the decoder for high frequency operation and low power consumption.
The width of the area may be optimized. Thus, the electro-optical device 74 could be formed on the same substrate having an insulating surface.

In the present invention, the width of the high resistance region is set to 2 to
It is characterized by being able to change four or more types depending on the application. Further, this region does not need to be made of the same material and the same conductivity type as the channel forming region. That is, in the NTFT, a small amount of N-type impurities and P
In the TFT, it is also possible to add a small amount of P-type impurities and selectively add carbon, oxygen, nitrogen or the like to form a high resistance region, because deterioration due to hot carriers, reliability, frequency characteristics,
This is effective in eliminating the trade-off with off current.

Further, as the TFT of the driver circuit for driving the TFT provided on the pixel electrode, it is desirable to use the TFT shown in FIGS.

[Embodiment 8] This embodiment is characterized by being formed by the following manufacturing steps. (1) The amorphous silicon film is crystallized by heat treatment using nickel element. (2) 1/10 of the silicon film crystallized in the above process
By performing hydrofluoric acid treatment using 0 buffer hydrofluoric acid, the nickel component (nickel silicide) localized in the silicon film is removed. (3) By irradiating the laser beam, the crystallinity of the silicon film crystallized in the step (1) is promoted. (4) A gate electrode is formed, and impurity ions are implanted using this gate electrode as a mask to form source / drain regions. (5) A heat treatment is performed to recrystallize the source / drain regions and activate the implanted impurities. As described above, the present embodiment is characterized in that heat treatment-nickel removal-laser light irradiation-heat treatment is performed. Here, the first heat treatment is for crystallization of the amorphous silicon film, the laser light irradiation is for promoting crystallization of the amorphous silicon film, and the second heat treatment is for the source. The purpose is to recrystallize the / drain region, activate the impurities implanted in the region, and remove defects in the channel formation region.

The steps of manufacturing the thin film transistor shown in FIG. 9 will be described below. First, an underlying silicon oxide film 902 is formed on a glass substrate 901 to a thickness of 2000 Å by a sputtering method. Next, an amorphous silicon film is formed to a thickness of 1000Å by plasma CVD method or low pressure thermal CVD method. Then, nickel element is introduced into the surface of the amorphous silicon film using nickel acetate. Then, by performing heat treatment, the amorphous silicon film is crystallized and a crystalline silicon film 903 is obtained. Here, a crystalline silicon film is obtained by performing heat treatment at 550 ° C. for 4 hours.

After completion of the above heat treatment, hydrofluoric acid treatment is performed using 1/100 buffer hydrofluoric acid to remove the nickel component localized (segregated) in the film. Next, XeCl excimer laser (wavelength 308 nm) and XeF excimer laser are irradiated at an irradiation intensity of 300 mJ / cm ² to promote the crystallinity of the crystalline silicon film 903. (Fig. 9 (A))

Next, the crystalline silicon film 903 is patterned to form the active layer of the thin film transistor. Then, a silicon oxide film to be a gate insulating film is formed by 100
It is formed to a thickness of 0Å by the plasma CVD method. After forming the gate insulating film, a film containing aluminum as a main component
The gate electrode 905 is formed by forming it to a thickness of Å and performing patterning. And the gate electrode 905
Is used as an anode to perform anodization in an electrolytic solution to form an oxide layer 906 around the gate electrode 905. Here, the oxide layer 905 has a thickness of 2000.
Å

Next, the gate electrode 905 and the gate electrode 905
Impurity ions are implanted using the surrounding oxide layer 906 as a mask to form the source region 907 and the drain region 911, the channel formation region 909, and the offset gate regions 908 and 910 in a self-aligned manner. Here, phosphorus ions are used as impurity ions in order to obtain an N-channel thin film transistor. At this time, the source / drain regions are made amorphous by the impact of ions. (Fig. 9
(B))

Next, in the step shown in (C), 500
Once the heat treatment is performed for 2 hours, the source region 9
07 and the drain region 911 are recrystallized and the implanted phosphorus ions are activated. In this step, crystal growth as indicated by arrow 912 proceeds from the interface between the offset gate region 908 having crystallinity and the amorphized source region 907. This crystal growth proceeds with the offset gate region 908 as a nucleus. Similarly, an arrow 912 is drawn from the interface between the offset gate region 910 having crystallinity and the amorphized drain region 911.
Crystal growth proceeds as shown by. This crystal growth easily progresses at a temperature of 500 ° C. or lower due to the action of phosphorus ions implanted in the source / drain regions. Further, since a continuous crystal structure can be obtained from the offset gate region, concentration of defects due to lattice mismatch can be prevented.

The heat treatment step performed in step (C) may be performed at a temperature of 300 ° C. or higher. In the case of this embodiment, aluminum is used for the gate electrode and there is a problem of heat resistance of the glass substrate.
It may be performed at a temperature of 0 degree.

In the heat treatment step shown in (C), it is effective to combine annealing by irradiation of laser light or strong light before or after the heat treatment step.

Next, an interlayer insulating film is formed to a thickness of 6000Å by the plasma CVD method, and then a source electrode 914 and a drain electrode 915 are formed. Then, heat treatment is performed in a hydrogen atmosphere at 350 ° C. to perform hydrogenation, so that the thin film transistor illustrated in FIG.

In this embodiment, the structure in which the offset gate regions 908 and 910 are formed has been described. However, when the offset gate regions are not formed, the channel having crystallinity is used in the heating step (C). Crystallization proceeds from the formation region to the source / drain regions.

[Embodiment 9] In this embodiment, an active layer of a thin film transistor is formed using a crystalline silicon film crystallized using nickel, and various cleaning or etching (metal element) is performed on the active layer. And the effect of cleaning or etching for removing various impurities) will be mainly described.

The comparison in the present embodiment is made by looking at various characteristics of the thin film transistor in which the difference in the condition of the cleaning or etching process for the active layer is obtained.
FIG. 12 shows the difference in the conditions of the cleaning or etching process. The manufacturing process of the thin film transistor is different only in the conditions of the cleaning or etching process for the active layer shown in FIG.

In the conditions shown in FIG. 12, the condition of No. 1 is a condition of cleaning (etching) the surface of the active layer with 1/50 BHF (buffer hydrofluoric acid). No. 2 is a condition for cleaning the surface of the active layer with FPM (a mixed solution of perhydrogen and hydrofluoric acid diluted with water).
No. 3 is a condition for performing cleaning with FPM on the active layer and then cleaning with ozone water. No. 4 is a condition for performing cleaning with FPM after cleaning the active layer with ozone water.

No. 5 is a condition for cleaning the surface of the active layer with a mixed solution of sulfuric acid / hydrogen peroxide, ammonia / hydrogen peroxide, hydrochloric acid / hydrogen peroxide and 1/100 hydrofluoric acid. No. 6 is a condition under which the active layer is washed with sulfuric acid / hydrogen peroxide and then further washed with FPM. No. 7 is BHF containing a surfactant after cleaning the active layer with ozone water.
This is the condition for performing cleaning by.

After the cleaning process under each condition as shown in FIG. 12, a gate insulating film is formed. Further, a gate electrode is formed, a source / drain region is formed, an interlayer insulating film is formed, and a source / drain electrode is formed to complete a thin film transistor.

V _{th of} the thin film transistor obtained in FIG.
The data of (threshold) is shown. The substrate number on the horizontal axis of the figure corresponds to the experiment number of FIG. As is clear from FIG. 13, the thin film transistors under the experimental conditions of 2 to 7 have N
The channel type has a normally-off characteristic in which _Vth is +2 to 3V (a transistor is OFF when the voltage applied to the gate electrode is 0V or more).

The P-channel type V _th has a normally-off characteristic of −1 to −2V. Such characteristics are preferable when actually using the thin film transistor. However, in the case of condition 1, there is a difference in V _th characteristics between the P-channel type and the N-channel type, which is not a preferable characteristic.

FIG. 14 shows the standard deviation showing the degree of variation in the value of V _th . From this figure, it can be seen that the most uniform V _th characteristics are obtained under the conditions 1 and 4 and 7. This means that when these conditions are adopted, a thin film transistor having the most V _th characteristics can be obtained.

However, the characteristic of Condition 1 as shown in FIG. 13 is not preferable. Therefore, from the perspective of the characteristics of V _th and the variation in the values, the cases of Condition 4 and Condition 7 are preferable.

FIG. 15 shows the OFF current characteristics corresponding to each condition. FIG. 15 shows V _{D in} the case of the N channel type.
= 14V and V _G = -4.5V, the OFF current value is shown. In the case of P channel, V _D = 14
It shows the value of the OFF current when V, V _G = 4.5V.

As can be seen from FIG. 15, the lowest OFF current value is obtained in both the N-channel type and the P-channel type under the conditions 4 and 7.

FIG. 16 shows the standard deviation of the OFF current value shown in FIG. As is clear from FIG. 15, condition 4
In this case, the OFF current characteristic with the least variation can be obtained.

The following conclusions can be drawn from the data presented above. "Overall, by performing cleaning with ozone water and then cleaning (etching) with an etchant containing hydrofluoric acid, it is possible to obtain a thin film transistor having good characteristics and no variations in characteristics."

The reason why a significant effect is obtained by performing such processing is considered to be as follows.

In an ideal state, the bonds of silicon atoms on the surface of the active layer need to be terminated by hydrogen atoms. However, many of them are actually terminated by impurities such as organic substances.

Such a state leads to generation of trap levels with high density. Further, if the metal element contributing to crystallization is exposed on the surface of the active layer, a trap level will be formed there.

Furthermore, when the active layer of the thin film transistor is formed by patterning, dangling bonds are formed on the surface of the active layer. Particularly when dry etching using plasma is used, this tendency becomes apparent due to plasma damage.

In any case, such a state leads to the formation of trap levels with high density.

Such a trap level causes V _th shift and its variation, and further increases the OFF current value and its variation. That is, the shift of V _th and the increase of the OFF current value occur due to the movement of carriers via the trap level. Further, since the movement of carriers via the trap level is unstable, variations in the V _th shift and the OFF current value occur.

In such a state, the condition 4 of FIG.
When the surface of the active layer is subjected to the treatment as shown in the condition 7 or the condition 7, impurities such as organic substances and metal elements existing on the surface of the active layer can be removed.

That is, first, an organic substance or a metal element is converted to an oxide by a treatment with ozone water having a strong oxidizing power, and the oxide is removed by etching using an etchant solution containing hydrofluoric acid. It is possible to reduce the trap levels existing in.

What is important here is that treatment with ozone water having a strong oxidizing power is carried out in order to convert the organic substance or metal element to be removed first into an oxide. And then remove this oxide.

[0183]

[Effect] The amorphous silicon film is crystallized at a low temperature in a short time by introducing a metal element, and the hydrofluoric acid treatment is further performed to remove the localized metal component. By manufacturing a semiconductor device using a crystalline silicon film which is irradiated and then subjected to heat treatment,
A device with high productivity and good characteristics can be obtained. In particular, a crystalline silicon film having a low metal element concentration in the film can be obtained at a lower temperature than in the past, and by using this crystalline silicon film, a highly stable thin film transistor with less variation in characteristics can be obtained. it can. In addition, it is useful to manufacture various semiconductor devices by using the crystalline silicon film obtained by utilizing the invention disclosed in this specification.

Further, by cleaning the crystalline silicon film first with a solvent having a strong oxidizing power, and further with a solvent having a function of removing oxides, the metal present on the surface of the crystalline silicon film is cleaned. Elements and organic substances can be removed, and the characteristics of the obtained semiconductor device can be improved.
Further, the stability of the characteristics of the obtained semiconductor device can be obtained.

[Brief description of drawings]

FIG. 1 is a diagram showing a process of an example.

FIG. 2 is a diagram showing a process of an example.

FIG. 3 is a diagram showing a manufacturing process of an example.

FIG. 4 is a diagram showing a manufacturing process of an example.

5A to 5D are diagrams showing a manufacturing process of an example.

6A to 6C are diagrams showing a manufacturing process of an example.

FIG. 7 is a diagram showing a configuration of an example.

FIG. 8 is a diagram showing a result of ESR measurement.

FIG. 9 is a diagram showing a manufacturing process of an example.

FIG. 10 is a photograph showing a state of a thin film of a hydrofluoric acid-treated crystalline silicon film.

11 is a diagram schematically showing the photograph of FIG.

FIG. 12 is a view showing conditions for cleaning the active layer.

FIG. 13 is a diagram showing an average value of V _th according to the difference in experimental conditions.

FIG. 14 is a diagram showing the standard deviation of V _th due to the difference in experimental conditions.

FIG. 15 is a diagram showing an average value of OFF current values due to differences in experimental conditions.

FIG. 16 is a diagram showing standard deviations of OFF current values due to differences in experimental conditions.

[Explanation of symbols]

 11 ... Glass substrate 12 ... Amorphous silicon film 13 ... Silicon oxide film 14 ... Acetic acid solution film containing nickel 15 ... Spinner 21 ... For mask Silicon oxide film 20 ... Silicon oxide film 11 ... Glass substrate 104 ... Active layer 105 ... Silicon oxide film 106 ... Gate electrode 109 ... Oxide layer 108 ... Source / Drain region 109 ... Drain / source region 110 ... Interlayer insulating film (silicon oxide film) 112 ... Electrode 113 ... Electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H01L 21/336

Claims (14)

[Claims] 1. A step of introducing a metal element that promotes crystallization into an amorphous silicon film, a step of subjecting the amorphous silicon film to a crystalline silicon film by heat treatment, and a step of removing the metal element And a step of irradiating the crystalline silicon film with laser light or intense light. 2. A step of introducing a metal element that promotes crystallization into an amorphous silicon film, a step of subjecting the amorphous silicon film to a crystalline silicon film by heat treatment, and a step of removing the metal element A method of manufacturing a semiconductor device, comprising: a step; and a step of subjecting the crystalline silicon film to a heat treatment. 3. A step of introducing a metal element that promotes crystallization into an amorphous silicon film, a step of subjecting the amorphous silicon film to a crystalline silicon film by heat treatment, and a step of removing the metal element A step of irradiating the crystalline silicon film with laser light or strong light; and a step of subjecting the crystalline silicon film irradiated with the laser light or strong light to a heat treatment. A method for manufacturing a characteristic semiconductor device. 4. The metal element according to claim 1, wherein the metal elements are Fe, Co, Ni, Ru, Rh, and P.
A method for manufacturing a semiconductor device, wherein one or more elements selected from d, Os, Ir, Pt, Cu, Ag, and Au are used. 5. The method for manufacturing a semiconductor device according to claim 1, wherein the step of removing the metal element is performed using an etching solution containing hydrofluoric acid. 6. The method according to any one of claims 1 to 3, wherein the step of removing the metal element is performed using an etching solution containing hydrofluoric acid, and the portion having a high concentration of the metal element is removed in the step. A method for manufacturing a semiconductor device, comprising: 7. The method for manufacturing a semiconductor device according to claim 1, wherein an interstitial atom is used as the metal element. 8. A first step of introducing a metal element that promotes crystallization into the amorphous silicon film, a second step of performing heat treatment, a third step of removing the metal element, and a laser beam. Alternatively, a fourth step of irradiating strong light, and the method for manufacturing a semiconductor device, characterized in that the second step and the fourth step are repeated twice or more. 9. A first step of introducing a metal element that promotes crystallization into the amorphous silicon film, a second step of performing heat treatment, a third step of removing the metal element, and a laser beam. Or a fourth step of irradiating intense light, wherein in the fourth step, the laser light or the intense light is irradiated a plurality of times, and the irradiation energy density is increased stepwise. Method for manufacturing device. 10. The method for manufacturing a semiconductor device according to claim 9, wherein the laser light or the intense light is irradiated in an oxygen atmosphere or in the air. 11. A step of holding a metal element that promotes crystallization of silicon in contact with the front surface or the back surface of the amorphous silicon film, and a step of crystallizing the amorphous silicon film by applying energy. Patterning to form the active layer of the thin film transistor, cleaning the surface of the active layer with a solvent having strong oxidizing power, and treating the surface of the active layer with an etchant for removing oxides And a method of manufacturing a semiconductor device. 12. A step of holding a metal element for promoting crystallization of silicon in contact with the front surface or the back surface of the amorphous silicon film, and crystallizing the amorphous silicon film by applying energy to obtain crystalline silicon. A step of obtaining a film, a step of cleaning the surface of the crystalline silicon film with a solvent having a strong oxidizing power, and a step of treating the surface of the crystalline silicon film with an etchant for removing an oxide. A method for manufacturing a semiconductor device having: 13. The metal element according to claim 11 or 12, wherein Fe, Co, Ni, Ru, Rh and P are used as the metal element.
A method for manufacturing a semiconductor device, wherein one or more elements selected from d, Os, Ir, Pt, Cu, Ag, and Au are used. 14. The method for manufacturing a semiconductor device according to claim 11 or 12, wherein ozone water is used as a solvent having a strong oxidizing power, and an etchant containing hydrofluoric acid is used as an etchant for removing oxides.