JP3431033B2 - Semiconductor fabrication method - Google Patents

Semiconductor fabrication method

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Publication number
JP3431033B2
JP3431033B2 JP29463393A JP29463393A JP3431033B2 JP 3431033 B2 JP3431033 B2 JP 3431033B2 JP 29463393 A JP29463393 A JP 29463393A JP 29463393 A JP29463393 A JP 29463393A JP 3431033 B2 JP3431033 B2 JP 3431033B2
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Prior art keywords
amorphous silicon
solution
silicon film
film
element
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JPH07130652A (en
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久 大谷
昭治 宮永
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株式会社半導体エネルギー研究所
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Priority to JP29463393A priority Critical patent/JP3431033B2/en
Priority claimed from TW083109844A external-priority patent/TW264575B/zh
Priority claimed from US08/430,623 external-priority patent/US5923962A/en
Publication of JPH07130652A publication Critical patent/JPH07130652A/en
Priority claimed from KR1020000013018A external-priority patent/KR100273833B1/en
Publication of JP3431033B2 publication Critical patent/JP3431033B2/en
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Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a crystalline semiconductor.

[0002]

2. Description of the Related Art A thin film transistor (hereinafter referred to as TFT) using a thin film semiconductor is known. This TFT is formed by forming a thin film semiconductor on a substrate and using this thin film semiconductor. This TFT is used in various integrated circuits, and is particularly attracting attention as a switching element provided in each pixel of an active matrix type liquid crystal display device and a driver element formed in a peripheral circuit portion.

As a thin film semiconductor used for TFT,
Although it is easy to use an amorphous silicon film, there is a problem in that its electrical characteristics are low. In order to improve the characteristics of the TFT, a crystalline silicon thin film may be used. A crystalline silicon film is referred to as polycrystalline silicon, polysilicon, microcrystalline silicon, or the like. In order to obtain this crystalline silicon film, an amorphous silicon film may first be formed and then crystallized by heating.

However, crystallization by heating requires heating at a temperature of 600 ° C. or higher for 10 hours or longer, which makes it difficult to use a glass substrate as a substrate. For example, Corning 7059 glass used in an active type liquid crystal display device has a glass strain point of 593 ° C., and there is a problem in heating at 600 ° C. or higher in consideration of increasing the area of a substrate.

BACKGROUND OF THE INVENTION According to the research conducted by the present inventors, a small amount of elements such as nickel, palladium, and lead are deposited on the surface of an amorphous silicon film, and then heated to 550. It has been found that crystallization can be performed in a treatment time of about 4 hours at ℃.

In order to introduce such a trace amount of elements (catalyst elements that promote crystallization), plasma treatment, vapor deposition, or ion implantation may be used. Plasma treatment is a method of adding a catalytic element to an amorphous silicon film by generating plasma in an atmosphere of hydrogen or the like using a material containing a catalytic element as an electrode in a parallel plate plasma CVD apparatus. is there.

However, the presence of a large amount of the above-mentioned elements in the semiconductor impairs the reliability and electrical stability of the device using these semiconductors and is not preferable.

That is, the above-mentioned element (catalyst element) that promotes crystallization, such as nickel, is necessary when crystallizing amorphous silicon, but the crystallized silicon should not be included as much as possible. Is desirable. To achieve this goal,
It is necessary to select a catalyst element that has a strong tendency to be inactive in crystalline silicon, at the same time reduce the amount of the catalyst element necessary for crystallization as much as possible, and perform crystallization with the minimum amount. For that purpose, it is necessary to precisely control the amount of the catalyst element added and to introduce it.

When nickel is used as a catalyst element, an amorphous silicon film is formed, nickel is added by a plasma treatment method to form a crystalline silicon film, and the crystallization process and the like are examined in detail. The following matters were found. (1) When nickel is introduced into the amorphous silicon film by the plasma treatment, nickel has already penetrated to a considerable depth in the amorphous silicon film before the heat treatment. (2) The initial nucleation of crystals occurs from the surface into which nickel is introduced. (3) Even when nickel is formed on the amorphous silicon film by the vapor deposition method, crystallization occurs as in the case of performing the plasma treatment.

From the above it is concluded that all the nickel introduced by the plasma treatment is not functioning effectively. Then, it is concluded that "what is necessary is to introduce a very small amount of nickel into the vicinity of the surface of the amorphous silicon film."

As a method of introducing a very small amount of nickel only in the vicinity of the surface of the amorphous silicon film, in other words, a very small amount of a catalyst element that promotes crystallization only in the vicinity of the surface of the amorphous silicon film is introduced. , Vapor deposition method can be mentioned,
The vapor deposition method has poor controllability and has a problem that it is difficult to strictly control the introduction amount of the catalyst element.

DISCLOSURE OF THE INVENTION According to the present invention, in the production of a thin film silicon semiconductor having crystallinity by heat treatment using a catalytic element at 600 ° C. or lower, (1) the catalytic element is introduced while controlling its amount. (2) Use a method with high productivity. The purpose is to meet such requirements.

[0012]

SUMMARY OF THE INVENTION The present invention mainly uses the following constitution in order to satisfy the above object. "A solution containing a catalytic element is applied to the surface of the amorphous silicon film, and thereby the catalytic element is introduced."

The above configuration has the following basic significance. (A) The concentration of the catalyst element in the solution can be strictly controlled beforehand. (B) If the solution is in contact with the surface of the amorphous silicon film,
The amount of the catalytic element introduced into the amorphous silicon depends on the concentration of the catalytic element in the solution. (C) Since the catalytic element adsorbed on the surface of the amorphous silicon film mainly contributes to crystallization, the catalytic element can be introduced at the required minimum concentration.

As a method of applying a solution containing an element which promotes crystallization to the amorphous silicon film, a method of using an aqueous solution of nitrate, acetate or sulfate as the solution can be mentioned. In this case, if the above solution is applied directly to the amorphous silicon film, the solution will be repelled, so by forming a thin oxide film of 100 Å or less first and applying the solution containing the catalytic element on it. The solution can be applied uniformly. A method of improving wetting by adding a material such as a surfactant to the solution is also effective.

Further, by using an octylate or toluene solution as the solution, the solution can be directly applied to the surface of the amorphous silicon film. In this case, it is effective to pre-apply a material such as an adhesive used when applying the resist. However, if the coating amount is too large, the addition of the catalytic element into the amorphous silicon will be hindered, and therefore caution must be exercised.

The amount of the catalytic element contained in the solution depends on the type of the solution, but the general tendency is that the amount of nickel is 200 ppm or less, preferably 50, with respect to the solution.
It is desirable to set it to ppm or less (weight conversion). This is a value determined in consideration of the nickel concentration in the film and the hydrofluoric acid resistance after completion of crystallization.

Further, the crystal growth can be selectively carried out by selectively applying the solution containing the catalytic element. Particularly, in this case, crystal growth can be performed in the direction parallel to the surface of the silicon film from the area where the solution is applied, toward the area where the solution is not applied. In the present specification, a region in which crystal growth is performed in a direction parallel to the surface of the silicon film is referred to as a lateral crystal growth region.

It has been confirmed that the concentration of the catalytic element is low in the region where the crystal growth is carried out in the lateral direction.
Although it is useful to use a crystalline silicon film as the active layer region of the semiconductor device, it is generally preferable that the concentration of impurities in the active layer region is low. Therefore, forming the active layer region of the semiconductor device by using the region in which the crystal growth is performed in the lateral direction is useful for device fabrication.

In the present invention, the most prominent effect can be obtained when nickel is used as the catalyst element, but other types of catalyst element that can be used are preferably Ni, Pd, Pt, Cu and Ag. Au, In, S
n , P , As, and Sb can be used. Also, VI
It is also possible to use one or more kinds of elements selected from the group II elements, IIIb, IVb, and Vb elements.

[0020]

[Example] [Example 1]

This embodiment shows an example of forming a crystalline silicon film on a glass substrate. First, referring to FIG. 1, description will be made up to the point where a catalyst element (here, nickel is used) is introduced. In this embodiment, Corning 7059 glass is used as the substrate. The size is 10
The size is 0 mm × 100 mm.

First, an amorphous silicon film is formed into an amorphous silicon film by plasma CVD or LPCVD.
It forms from 00 to 1500Å. Here, plasma CVD
The amorphous silicon film 12 is formed to a thickness of 1000 Å by the method. (Fig. 1 (A))

Then, a hydrofluoric acid treatment is performed to remove dirt and a natural oxide film, and then the oxide film 13 is removed by 10 to 50.
Deposit on Å. Needless to say, this step may be omitted if the stain can be ignored, and a natural oxide film may be used as it is instead of the oxide film 13. Since the oxide film 13 is extremely thin, the exact film thickness is unknown.
It is considered to be about 0Å. Here, the oxide film 13 is formed by irradiation with UV light in an oxygen atmosphere. The film formation was performed by irradiating UV for 5 minutes in an oxygen atmosphere. As a method of forming the oxide film 13,
A thermal oxidation method may be used. Alternatively, treatment with hydrogen peroxide may be used.

The oxide film 13 is provided to spread the acetate solution over the entire surface of the amorphous silicon film in the later step of applying the acetate solution containing nickel, that is, for improving the wettability. Is. For example, when the acetate solution is directly applied to the surface of the amorphous silicon film, the amorphous silicon repels the acetate solution, so that nickel cannot be introduced to the entire surface of the amorphous silicon film. That is, uniform crystallization cannot be performed.

Next, an acetate solution is prepared by adding nickel to the acetate solution. The concentration of nickel is 100 ppm. Then, 2 ml of this acetate solution is dropped on the surface of the oxide film 13 on the amorphous silicon film 12, and this state is maintained for 5 minutes. Then spin dry (2000
rpm, 60 seconds). (Fig. 1 (C), (D))

The concentration of nickel in the acetic acid solution is 1
When it is 0 ppm or more, it becomes practical. As a solution,
Hydrochloride, nitrate and sulfate can be used. Also,
It is also possible to use an organic octylate or toluene solution. In this case, the oxide film 13 is unnecessary and the catalyst element can be directly introduced onto the amorphous silicon film.

After the application of the above solution, the state is maintained for 5 minutes. The concentration of nickel contained in the silicon film 12 can be finally controlled also by the holding time, but the largest control factor is the concentration of the solution.

Then, in a heating furnace, heat treatment is performed at 550 ° C. for 4 hours in a nitrogen atmosphere. As a result,
It is possible to obtain the crystalline silicon thin film 12 formed on the substrate 11.

The above heat treatment can be performed at a temperature of 450 ° C. or higher, but if the temperature is low, the heating time must be lengthened and the production efficiency will be reduced. Further, if the temperature is 550 ° C. or more, the problem of heat resistance of the glass substrate used as the substrate is exposed.

[Embodiment 2] This embodiment is an example in which a 1200 Å silicon oxide film is selectively provided in the manufacturing method shown in Embodiment 1 and nickel is selectively introduced using this silicon oxide film as a mask. .

FIG. 2 shows an outline of the manufacturing process in this embodiment. First, the glass substrate (Corning 7059, 10c
A silicon oxide film 21 serving as a mask is formed on the (m square) to a thickness of 1000 Å or more, here 1200 Å. The film thickness of the silicon oxide film 21 is 5 according to experiments by the inventors.
It has been confirmed that there is no problem even with 00Å, and if the film quality is dense, it may be possible to make it thinner.

Then, the silicon oxide film 21 is patterned into a required pattern by a normal photolithographic patterning process. Then, a thin silicon oxide film 20 is formed by irradiation of ultraviolet rays in an oxygen atmosphere. This silicon oxide film 2
Production of 0 is performed by irradiating UV light for 5 minutes in an oxygen atmosphere. The thickness of the silicon oxide film 20 is considered to be about 20 to 50Å (FIG. 2 (B)). still,
The silicon oxide film for improving the wettability may be added just by the hydrophilicity of the silicon oxide film of the mask only when the size of the solution and the pattern match. However, such an example is special, and it is generally safer to use the silicon oxide film 20.

In this state, as in the first embodiment, 10
5 ml of an acetate solution containing 0 ppm of nickel is dropped (in the case of a 10 cm square substrate). At this time, spin coating is performed with a spinner at 50 rpm for 10 seconds to form a uniform water film on the entire surface of the substrate. In this state, 5
After holding for 2 minutes, using a spinner, 2000 rpm, 60
Perform a second spin dry. This holding may be performed while rotating the spinner at 0 to 100 rpm. (Fig. 2 (C))

Then, the amorphous silicon film 12 is crystallized by performing heat treatment at 550 ° C. (nitrogen atmosphere) for 4 hours. At this time, crystal growth is performed in the lateral direction from the region of the portion 22 into which nickel has been introduced to the region into which nickel has not been introduced, as indicated by 23.

The relationship between the lateral crystal growth distance (μm) indicated by 23 and the nickel concentration (ppm) contained in the acetate solution is shown in FIG. In the data shown in FIG. 3, the holding time after applying the nickel-containing acetate was set to 5 minutes.

As can be seen from FIG. 3, the growth distance of 25 μm or more can be obtained by setting the nickel concentration to 100 ppm or more.

Further, it is expected that lateral growth of about 10 μm can be obtained even when the concentration of nickel contained in the acetic acid solution is 10 ppm.

FIG. 3 shows the case where the holding time after applying the nickel-containing acetate is set to 5 minutes, and the lateral growth distance also changes depending on this holding time.

For example, when the nickel concentration is 100 ppm and the holding time is 1 minute or less, the longer the holding time is, the longer the crystal growth in the lateral direction can be. However, if the holding time is set to 1 minute or more, the growth distance is gradually increased, and a remarkable difference cannot be obtained.

When the nickel concentration is 50 ppm, the holding time is up to 5 minutes, which time is proportional to the crystal growth distance in the lateral direction, but tends to be saturated at 5 minutes or more.

Under the above-mentioned conditions, if the holding time is further lengthened, the crystal growth distance in the lateral direction can be further increased, although it slightly increases. It should be added that these holding times need to be controlled because the time required to reach the equilibrium changes greatly when the temperature changes. Further, the crystal growth in the lateral direction can be increased as a whole by increasing the temperature of the heat treatment time or lengthening the heat treatment time.

FIG. 4 and FIG. 5 show that 550 is obtained by introducing nickel using an acetate solution containing 100 ppm of nickel.
In the case where crystallization is performed by heat treatment at 4 ° C. for 4 hours, the nickel concentration in the silicon film after crystallization is measured by SIMS (2
These are the data examined by secondary ion mass spectrometry).

FIG. 4 shows the concentration of nickel in the region 22 of FIG. 2, that is, the region where nickel was directly introduced.
Further, FIG. 5 shows the concentration of nickel in the region where the crystal is grown laterally from the region 22 as shown by 23 in FIG.

As can be seen from FIGS. 4 and 5, the nickel concentration in the laterally grown region is about one digit lower than that in the region into which nickel is directly introduced.

Even in the region where nickel is directly introduced, the nickel concentration in the acetate solution is 10 pp.
It can be seen that, when m, the nickel concentration in the crystallized silicon film can be suppressed to the level of 10 18 cm -3.

From this fact, the nickel concentration in the acetic acid solution was set to 10 ppm, and the heat treatment temperature was set to 550
The nickel concentration in the lateral growth region of the crystalline silicon film is 10 17 cm when the heat treatment time is 4 ° C. or higher and the heat treatment time is 4 hours or longer.
-It is concluded that it can be suppressed below the -3 level.

The crystalline silicon film formed by the method shown in this embodiment is characterized in that it has good hydrofluoric acid resistance. According to the findings by the present inventors, a crystalline silicon film obtained by crystallizing nickel by plasma treatment is
Low hydrofluoric acid resistance.

For example, it is necessary to form a silicon oxide film functioning as a gate insulating film or an interlayer insulating film on a crystalline silicon film, and then perform a hole forming process to form an electrode and then form an electrode. It may be said that. In such a case, a process of removing the silicon oxide film with buffer hydrofluoric acid is usually adopted. However, when the hydrofluoric acid resistance of the crystalline silicon film is low, it is difficult to remove only the silicon oxide film, and there is a problem that the crystalline silicon film is also etched.

However, when the crystalline silicon film has a hydrofluoric acid resistance, a large difference (selection ratio) between the etching rates of the silicon oxide film and the crystalline silicon film can be obtained, so that the silicon oxide film. Only this can be selectively removed, which is extremely significant in the manufacturing process.

[Embodiment 3] This embodiment is an example of manufacturing a TFT provided in each pixel portion of an active matrix type liquid crystal display device by using a crystalline silicon film manufactured by using the method of the present invention. Indicates. It is needless to say that the application range of the TFT is not limited to the liquid crystal display device but can be applied to a generally-known thin film integrated circuit.

FIG. 6 shows an outline of the manufacturing process of this embodiment.
First, an underlying silicon oxide film (not shown) is formed on the glass substrate by 2
Form a film with a thickness of 000Å. This silicon oxide film is provided to prevent the diffusion of impurities from the glass substrate.

Then, an amorphous silicon film is formed to a thickness of 1000 Å by the same method as in the first embodiment. After the hydrofluoric acid treatment for removing the natural oxide film, a thin oxide film 20 is formed to a thickness of about 20Å by UV light irradiation in an oxygen atmosphere.

Then, an acetate solution containing 10 ppm of nickel is applied, held for 5 minutes, and spin-dried using a spinner. After that, the silicon oxide films 20 and 21 are removed by buffer hydrofluoric acid, and the silicon film 100 is crystallized by heating at 550 ° C. for 4 hours. (Up to this point, it is the same as the manufacturing method shown in Example 1)

Next, the crystallized silicon film is patterned to form island regions 104. This island area 10
Reference numeral 4 constitutes an active layer of the TFT. And thickness 200 ~
The silicon oxide 105 of 1500 Å, here 1000 Å, is formed. This silicon oxide film also functions as a gate insulating film. (Fig. 6 (A))

Attention must be paid to the production of the silicon oxide film 105. Here, TEOS is used as a raw material, and the substrate temperature is 150 to 600 ° C., preferably 300 to 45, together with oxygen.
It was decomposed and deposited at 0 ° C. by the RF plasma CVD method. TE
The pressure ratio of OS and oxygen is 1: 1 to 1: 3, the pressure is 0.05 to 0.5 torr, and the RF power is 100 to 25.
It was set to 0W. Alternatively, by using TEOS as a raw material together with ozone gas by a low pressure CVD method or a normal pressure CVD method,
The substrate temperature is 350 to 600 ° C., preferably 400 to 55
It was formed as 0 ° C. After the film formation, annealing was performed at 400 to 600 ° C. for 30 to 60 minutes in an atmosphere of oxygen or ozone.

In this state, the KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) or strong light equivalent thereto may be irradiated to promote crystallization of the silicon region 104. In particular, RTA using infrared light
(Rapid thermal annealing) can selectively heat only silicon without heating the glass substrate, and can reduce the interface state at the interface between the silicon and the silicon oxide film. It is useful in the fabrication of a field effect semiconductor device.

After that, an aluminum film having a thickness of 2000 Å to 1 μm is formed by electron beam evaporation, and this is patterned to form a gate electrode 106. The aluminum may be doped with scandium (Sc) in an amount of 0.15 to 0.2% by weight. Next, set the substrate pH
It is immersed in an ethylene glycol solution of 7 to 1 to 3% tartaric acid, and anodization is performed using platinum as a cathode and this aluminum gate electrode as an anode. The anodization is completed by first raising the voltage to 220 V with a constant current and then maintaining that state for 1 hour. In the present embodiment, in the constant current state, it is appropriate that the voltage rising rate is 2 to 5 V / min. In this way, the anodic oxide 109 having a thickness of 1500 to 3500Å, for example 2000Å, is formed. (Fig. 6 (B))

After that, an impurity (phosphorus) was self-alignedly injected into the island-shaped silicon film of each TFT by an ion doping method (also referred to as a plasma doping method) using the gate electrode portion as a mask. Phosphine (PH 3 ) was used as the doping gas. The dose amount is 1 to 4 × 10
15 cm -2 .

Further, as shown in FIG. 6C, a KrF excimer laser (wavelength 248 nm, pulse width 20 ns) is used.
ec) is applied to improve the crystallinity of the portion where the crystallinity is deteriorated by the introduction of the impurity region. The energy density of the laser is 150 to 400 mJ / cm 2 , preferably 200 to 250 mJ / cm 2 . Thus, the N-type impurity (phosphorus) regions 108 and 109 are formed. The sheet resistance in these regions was 200 to 800 Ω / □.

In this step, instead of using a laser, a flash lamp is used, and 1000 to
Raise it to 1200 ° C (silicon monitor temperature),
So-called RTA (Rapid Thermal Annealing) (RTP, also called rapid thermal process) for heating the sample may be used.

After that, an interlayer insulator 110 is formed on the entire surface.
Plasma CVD with TEOS as raw material and oxygen
Method, low pressure CVD method with ozone, or atmospheric pressure CV
A silicon oxide film having a thickness of 3000 Å is formed by the D method. The substrate temperature is 250 to 450 ° C., for example 350 ° C.
After the film formation, this silicon oxide film is mechanically polished to obtain the flatness of the surface. Further, an ITO film is deposited by the sputtering method and patterned to form the pixel electrode 111. (Figure 6 (D))

Then, the inter-layer insulator 110 is etched to form contact holes in the source / drain of the TFT as shown in FIG. 1E, wirings 112 and 113 of chromium or titanium nitride are formed, and the wiring 113 is formed. Is connected to the pixel electrode 111.

Since the crystalline silicon film into which nickel is introduced by the plasma treatment has a lower selectivity for buffer hydrofluoric acid than the silicon oxide film, it is often etched in the contact hole forming step. It was

However, when nickel is introduced using an aqueous solution at a low concentration of 10 ppm as in the present embodiment, the hydrofluoric acid resistance is high, so that the formation of the contact hole can be performed stably and with good reproducibility. it can.

Finally, in hydrogen at 300 to 400 ° C.
Anneal for 1-2 hours to complete hydrogenation of silicon. In this way, the TFT is completed. Then, a large number of TFTs manufactured at the same time are arranged in a matrix to complete an active matrix liquid crystal display device.

When the structure of this embodiment is adopted, the concentration of nickel present in the active layer is considered to be about 1 × 10 18 cm -3 or less.

In this embodiment, an example was shown in which the portion into which nickel was introduced was crystallized. However, as shown in Example 2, nickel was introduced selectively, and from that portion in the lateral direction (parallel to the substrate). The electronic device may be formed by using the region in which the crystal is grown in the (direction). In this case, the nickel concentration in the active layer region of the device can be further reduced,
An extremely preferable configuration can be obtained from the viewpoint of electrical stability and reliability of the device.

[0068]

[Effect] By using a solution as a method for introducing nickel, the nickel concentration can be precisely controlled and added, and a highly reliable electronic device using a crystalline silicon film can be provided.

[Brief description of drawings]

FIG. 1 shows a process of an example.

FIG. 2 shows a process of an example.

FIG. 3 shows the relationship between the nickel concentration in the solution and the crystal growth distance in the lateral direction.

FIG. 4 shows nickel concentration in a region where nickel is introduced.

FIG. 5 shows a nickel concentration in a region crystallized in a lateral direction from a region into which nickel is introduced.

FIG. 6 shows a manufacturing process of an example.

[Explanation of symbols]

11 ... Glass substrate 12 ... Amorphous silicon film 13 ··· Silicon oxide film 14 ... Acetic acid solution film containing nickel 15 ... Zpiner 21..Silicon oxide film for mask 20 ... Silicon oxide film 11 ... Glass substrate 104 ... Active layer 105 ... Silicon oxide film 106 ... Gate electrode 109 ... Oxide layer 108 ... Source / drain region 109 ... Drain / source region 110 ... Interlayer insulating film (silicon oxide film) 111 ... Pixel electrode (ITO) 112 ... Electrode 113 ... Electrode

─────────────────────────────────────────────────── --- Continuation of the front page (56) References JP-A-3-280420 (JP, A) JP-A-2-140915 (JP, A) JP-A-5-67635 (JP, A) JP-A-63- 142807 (JP, A) JP 64-74754 (JP, A) JP 2-20059 (JP, A) US Pat. No. 5147826 (US, A) Appl. Phys. Lett. , 55 (7), p. 660-662 (58) Fields investigated (Int.Cl. 7 , DB name) H01L 21/20

Claims (20)

(57) [Claims]
1. An amorphous silicon film is formed on the amorphous silicon film, and a solution containing an element that promotes crystallization of the amorphous silicon is applied on the oxide film. A method for manufacturing a semiconductor, which comprises crystallizing by heat treatment.
2. An oxide film having a thickness of 10 nm or less is formed on the amorphous silicon film, and a solution containing an element that promotes crystallization of the amorphous silicon is applied onto the oxide film. A method for manufacturing a semiconductor, comprising crystallizing a crystalline silicon film by heat treatment.
3. An oxide film is formed on an amorphous silicon film, a solution containing an element that promotes crystallization of amorphous silicon is dropped on the oxide film, and the unnecessary solution is removed by using a spinner. A method of manufacturing a semiconductor, which comprises removing the amorphous silicon film and crystallizing the amorphous silicon film by heat treatment.
4. The semiconductor manufacturing method according to claim 1, wherein the oxide film is formed after cleaning the surface of the amorphous silicon film with hydrofluoric acid.
5. The semiconductor manufacturing method according to claim 1, wherein the oxide film is formed by irradiating the surface of the amorphous silicon film with ultraviolet light.
6. The semiconductor manufacturing method according to claim 1, wherein the oxide film is formed by treating the surface of the amorphous silicon with a hydrogen peroxide solution.
7. A mask having an opening is formed on the amorphous silicon film, and an oxide film is formed on the surface of the amorphous silicon film in the opening portion of the mask in the state where the mask exists. A solution containing an element that promotes crystallization of amorphous silicon is applied to the surface of the oxide film through the mask film, and the amorphous silicon film is heat-treated to form the amorphous silicon film. A method for manufacturing a semiconductor, which comprises crystallizing.
8. The method for manufacturing a semiconductor according to claim 7 , wherein the mask is made of silicon oxide.
9. The method of claim 7 or 8, by irradiating ultraviolet light to the amorphous silicon film surface through the mask, the semiconductor manufacturing method characterized by forming the oxide film.
10. A any one of claims 7 to 9, using a spinner, a semiconductor manufacturing method characterized by applying the solution.
11. The any one of claims 7 to 10, wherein after the solution has passed the coated predetermined time, removing unnecessary the solution, crystallization by heat treating the amorphous silicon film A method for manufacturing a semiconductor, comprising:
12. The method of claim 1 1, by varying the predetermined time, the semiconductor manufacturing method characterized by controlling the concentration of the element contained in the crystallized silicon film.
13. The method of claim 1 1 or 1 2, a semiconductor manufacturing method characterized by using a spinner, removing unnecessary the solution.
14. The any one of claims 1 to 1 3, a semiconductor manufacturing method, wherein the concentration of the element in the solution is 50ppm or less.
15. The any one of claims 1 to 1 4, the semiconductor manufacturing method, wherein the concentration of the element in the solution is 10ppm or more.
16. The any one of claims 1 to 1 5, by varying the concentration of the element in the solution, to control the concentration of the element contained in the crystallized silicon film A characteristic semiconductor manufacturing method.
17. any one of claims 1 to 1 6, wherein the solution is a semiconductor manufacturing method which is a solution containing Ni as the element.
18. The any one of claims 1 to 1 6, wherein the solution is a semiconductor manufacturing method is characterized in that an aqueous solution of nickel acetate containing Ni as the element.
19. any one of claims 1 to 1 6, wherein the solution is characterized in that as the element Ni, Pd, a solution containing one or more kinds of elements selected from Pt Semiconductor manufacturing method.
20. The method for manufacturing a semiconductor according to claim 19 , wherein the solution is an aqueous solution of acetate, nitrate or sulfate of the element .
JP29463393A 1993-10-29 1993-10-29 Semiconductor fabrication method Expired - Lifetime JP3431033B2 (en)

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JP29463393A JP3431033B2 (en) 1993-10-29 1993-10-29 Semiconductor fabrication method

Applications Claiming Priority (19)

Application Number Priority Date Filing Date Title
JP29463393A JP3431033B2 (en) 1993-10-29 1993-10-29 Semiconductor fabrication method
TW083109844A TW264575B (en) 1993-10-29 1994-10-24
US08/329,644 US5643826A (en) 1993-10-29 1994-10-25 Method for manufacturing a semiconductor device
CNB991069544A CN1143362C (en) 1993-10-29 1994-10-28 Method for manufacturing semiconductor device
CN94112820A CN1054943C (en) 1993-10-29 1994-10-28 A method for manufacturing a semiconductor device
EP01116025A EP1158580A3 (en) 1993-10-29 1994-10-31 Method of crystallizing a silicon layer
EP94307986A EP0651431B1 (en) 1993-10-29 1994-10-31 Method of crystallizing a silicon layer
DE69430097T DE69430097T2 (en) 1993-10-29 1994-10-31 Process for crystallizing a silicon layer
US08/430,623 US5923962A (en) 1993-10-29 1995-04-28 Method for manufacturing a semiconductor device
US08/633,307 US6335541B1 (en) 1993-10-29 1996-04-15 Semiconductor thin film transistor with crystal orientation
US08/928,514 US6285042B1 (en) 1993-10-29 1997-09-12 Active Matry Display
KR1019970069468A KR100273831B1 (en) 1993-10-29 1997-12-17 Method for manufacturing semiconductor device
CNB981209785A CN1149639C (en) 1993-10-29 1998-10-12 Semiconductor device
KR1020000013018A KR100273833B1 (en) 1993-10-29 2000-03-15 A semiconductor device
KR1020000013017A KR100297315B1 (en) 1993-10-29 2000-03-15 A method for manufacturing a semiconductor device
US10/026,802 US6998639B2 (en) 1993-10-29 2001-12-27 Method for manufacturing a semiconductor device
US11/322,660 US20060131583A1 (en) 1993-10-29 2006-01-03 Method for manufacturing a semiconductor device
US12/219,026 US7998844B2 (en) 1993-10-29 2008-07-15 Method for manufacturing a semiconductor device
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