JP3626102B2 - Integrated circuit fabrication method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device using a crystalline semiconductor and a manufacturing method thereof.
[0002]
[Prior art]
A thin film transistor (hereinafter referred to as TFT) using a thin film semiconductor is known. This TFT is formed by forming a thin film semiconductor on a substrate and using this thin film semiconductor. This TFT is used in various integrated circuits, and is particularly attracting attention as a switching element provided with each pixel of an electro-optical device, particularly an active matrix liquid crystal display device, and a driver element formed in a peripheral circuit portion. .
[0003]
As a thin film semiconductor used for a TFT, it is easy to use an amorphous silicon film, but there is a problem that its electrical characteristics are low. In order to obtain improved TFT characteristics, a silicon thin film having crystallinity may be used. The crystalline silicon film is called polycrystalline silicon, polysilicon, microcrystalline silicon, or the like. In order to obtain this silicon film having crystallinity, an amorphous silicon film is first formed and then crystallized by heating.
[0004]
However, the crystalline silicon thin film crystallized by heating by a currently used method has a relatively small particle size and is not uniform in size, which causes variations in characteristics. In addition, mobility, which is a measure of ability when forming an element, is greatly inferior to that of single crystal silicon, and improvement of these characteristics has been demanded.
[0005]
BACKGROUND OF THE INVENTION
According to the study by the present inventors, a small amount of elements such as nickel, palladium, and lead are deposited on the surface of the amorphous silicon film, and then heated to 450 to 650 ° C., for example, about 550 ° C. It has been found that crystallization can be performed at a temperature of about 4 hours in a processing time of about 4 hours. The obtained crystal grains can also be controlled by the crystallization temperature and time, which means that an active layer required for the device can be formed.
[0006]
In order to introduce such a trace amount of element (catalytic element that promotes crystallization), plasma treatment, vapor deposition, or ion implantation may be used. The plasma treatment is a parallel plate type or positive column type plasma CVD apparatus using a material containing a catalytic element as an electrode, and generating a plasma in an atmosphere of nitrogen or hydrogen to form a catalytic element on the amorphous silicon film. It is a method of adding.
[0007]
However, the presence of a large amount of the elements as described above in the semiconductor is not preferable because it impedes the reliability and electrical stability of a device using these semiconductors.
[0008]
That is, the above-mentioned element for promoting crystallization such as nickel (in this specification, the element for promoting crystallization is referred to as a catalyst element) is necessary for crystallizing amorphous silicon. It is desirable to prevent the silicon from being contained as much as possible. In order to achieve this purpose, a catalyst element that has a strong tendency to be inert in crystalline silicon is selected, and at the same time, the amount of catalyst element required for crystallization is minimized and crystallization is performed with a minimum amount. Need to do. For this purpose, it is necessary to precisely control the amount of the catalyst element added.
[0009]
In addition, when nickel is used as a catalyst element, an amorphous silicon film is formed, a nickel treatment is performed by plasma treatment to produce a crystalline silicon film, and the crystallization process and the like are examined in detail. There was found.
(1) When nickel is introduced onto the amorphous silicon film by plasma treatment, the nickel has already penetrated to a considerable depth in the amorphous silicon film before the heat treatment.
(2) The initial nucleation of the crystal is generated from the surface where nickel is introduced.
(3) Even when nickel is deposited on the amorphous silicon film by vapor deposition, crystallization occurs in the same manner as when plasma treatment is performed.
[0010]
From the above, it can be concluded that not all nickel introduced by plasma treatment is functioning effectively. That is, it is considered that there is nickel that does not function sufficiently even when a large amount of nickel is introduced. From this, it is considered that the point (plane) where nickel and silicon are in contact functions during low-temperature crystallization. It is concluded that nickel must be dispersed as finely as possible in the atomic form. That is, it is concluded that “what is necessary is that nickel as low as possible should be introduced in the form of atoms dispersed in the vicinity of the surface of the amorphous silicon film as long as low-temperature crystallization is possible”.
[0011]
As a method of introducing a very small amount of nickel only in the vicinity of the surface of the amorphous silicon film, in other words, as a method of introducing a very small amount of the catalytic element that promotes crystallization only in the vicinity of the surface of the amorphous silicon film, the vapor deposition However, the vapor deposition method has a problem of poor controllability, and it is difficult to strictly control the amount of catalyst element introduced.
[0012]
In addition, it is necessary that the amount of the catalyst element introduced be as small as possible.
[0013]
[Problems to be solved by the invention]
In the production of a thin film silicon semiconductor having crystallinity by heat treatment using a catalytic element,
(1) A controlled amount of catalyst element is introduced to minimize the amount.
(2) Use a highly productive method.
(3) Crystallinity higher than that obtained by heat treatment is obtained.
The purpose is to satisfy such requirements.
[0014]
[Means for Solving the Problems]
In order to satisfy the above object, the present invention obtains a silicon film having crystallinity using the following means.
A catalyst element alone or a compound containing the catalyst element that promotes crystallization of the amorphous silicon film is held in contact with the amorphous silicon film, and the catalyst element alone or the catalyst element is contained in the amorphous silicon film. In a state where the compound is in contact, heat treatment is performed at a relatively low temperature of about 450 ° C. to 650 ° C., for example, about 550 ° C. to crystallize part or all of the amorphous silicon film. Further, crystallization is further promoted by annealing at a temperature higher than the crystallization temperature, for example, a temperature of about 1000 ° C. if the substrate is quartz. Thus, a crystalline silicon film having extremely good crystallinity is obtained.
[0015]
As a method for introducing the catalytic element that promotes crystallization, a method by applying a solution containing the catalytic element to the surface of the amorphous silicon film is useful.
[0016]
In particular, the present invention is characterized in that the catalytic element is introduced in contact with the surface of the amorphous silicon film. This is extremely important in controlling the amount of catalytic element.
[0017]
The catalyst element may be introduced on the upper surface or the lower surface of the amorphous silicon film. If the catalytic element is introduced into the upper surface of the amorphous silicon film, a solution containing the catalytic element may be applied on the amorphous silicon film after the amorphous silicon film is formed. If the catalyst element is introduced into the lower surface of the silicon film, a solution containing the catalyst element is applied to the base surface before forming the amorphous silicon film, and the catalyst element is held in contact with the base surface. That's fine.
[0018]
Further, the invention is characterized in that an active region having at least one electrical junction such as PN, PI, NI or the like of a semiconductor device is formed by using a crystallized crystalline silicon film. As the semiconductor device, a thin film transistor (TFT), a diode, or an optical sensor can be used.
[0019]
By adopting the configuration of the present invention, the following basic significance can be obtained.
(A) The concentration of the catalytic element in the solution can be strictly controlled in advance to increase the crystallinity and reduce the amount of the element.
(B) If the solution and the surface of the amorphous silicon film are in contact with each other, the amount of the catalytic element introduced into the amorphous silicon is determined by the concentration of the catalytic element in the solution.
(C) Since the catalytic element adsorbed on the surface of the amorphous silicon film mainly contributes to crystallization, the catalytic element can be introduced at a necessary minimum concentration.
(D) A crystalline silicon film having good crystallinity can be obtained without requiring a high temperature process.
[0020]
As a method of applying a solution containing an element that promotes crystallization on the amorphous silicon film, an aqueous solution, an organic solvent solution, or the like can be used as the solution. Here, the inclusion includes both the meaning of inclusion as a compound and the meaning of inclusion by simply dispersing.
[0021]
As the solvent containing the catalyst element, a solvent selected from water, alcohol, acid and ammonia which are polar solvents can be used.
[0022]
When nickel is used as a catalyst and this nickel is included in a polar solvent, nickel is introduced as a nickel compound. The nickel compounds typically include nickel bromide, nickel acetate, nickel oxalate, nickel carbonate, nickel chloride, nickel iodide, nickel nitrate, nickel sulfate, nickel formate, nickel acetylacetonate, 4-cyclohexylbutyric acid. A material selected from nickel, nickel oxide and nickel hydroxide is used.
[0023]
As the solvent containing the catalyst element, a nonpolar solvent selected from benzene, toluene, xylene, carbon tetrachloride, chloroform, and ether can be used.
[0024]
In this case, nickel is introduced as a nickel compound. As this nickel compound, typically, one selected from nickel acetylacetonate and nickel 2-ethylhexanoate can be used.
[0025]
It is also useful to add a surfactant to the solution containing the catalyst element. This is for increasing the adhesion to the surface to be coated and controlling the adsorptivity. This surfactant may be applied on the surface to be coated in advance.
[0026]
When nickel simple substance is used as a catalyst element, it is necessary to dissolve in acid to form a solution.
[0027]
The above is an example of using a solution in which nickel as a catalytic element is completely dissolved. Even if nickel is not completely dissolved, powder of nickel alone or a compound of nickel is uniformly distributed in the dispersion medium. Materials such as dispersed emulsions may be used. Alternatively, a solution for forming an oxide film may be used. As such a solution, OCD (Ohka Diffusion Source) of Tokyo Ohka Kogyo Co., Ltd. can be used. If this OCD solution is used, a silicon oxide film can be easily formed by coating on the surface to be formed and baking at about 200 ° C. Moreover, since it is also free to add an impurity, it can utilize for this invention.
[0028]
These are the same even when a material other than nickel is used as the catalyst element.
[0029]
When nickel is used as a catalytic element for promoting crystallization, and a polar solvent such as water is used as a solution solvent containing nickel, the solution is repelled when directly applied to the amorphous silicon film. Sometimes. In this case, a thin oxide film having a thickness of 100 mm or less is first formed, and a solution containing a catalytic element is applied thereon, whereby the solution can be uniformly applied. Also effective is a method of improving wetting by adding a material such as a surfactant to the solution.
[0030]
Further, by using a nonpolar solvent such as a toluene solution of nickel 2-ethylhexanoate as the solution, it can be directly applied to the surface of the amorphous silicon film. In this case, it is effective to apply in advance a material such as an adhesive used in resist application. However, when the coating amount is too large, care must be taken because it interferes with the addition of the catalytic element into the amorphous silicon.
[0031]
The amount of the catalytic element contained in the solution depends on the type of the solution, but as a general tendency, the nickel amount is preferably 200 ppm to 1 ppm, preferably 50 ppm to 1 ppm (weight conversion) as the amount of nickel. . This is a value determined in view of the nickel concentration in the film and the hydrofluoric acid resistance after crystallization is completed.
[0032]
Moreover , this invention sets the heating temperature in the case of crystallization to 450 to 650 degreeC . This is important. In the present invention, as described above, it is premised that a crystalline silicon thin film having a uniform grain size and high crystallinity is obtained by performing crystallization only from a portion in contact with the catalytic element and the amorphous silicon thin film. Therefore, it is not desirable that nucleation or crystallization proceeds from other parts because it directly leads to variation in characteristics. According to the experiments by the inventors, crystallization of the portion not in contact with the catalytic element can be ignored for a short time in the range of 450 ° C. to 650 ° C., and the configuration of the present invention can be obtained. It turns out. If the catalyst element is added at a temperature lower than the above temperature range, sufficient crystal growth cannot be performed. Similarly, at a temperature higher than the above temperature range, crystal growth occurs regardless of the catalyst.
Further, the present invention is the further row Ukoto hot annealing after the crystallization treatment, the crystallinity of the crystal grains of the characteristics of the interface to the better crystallized silicon film can be further increased. Further, by adding this step, depending on the conditions Ri can der that would eliminate any amorphous portion, this is effective in preventing deterioration over time due to unstable amorphous portion.
[0033]
In general, the thermal annealing of a semiconductor is often performed in an inert atmosphere such as nitrogen. However, the catalyst used in the present invention is added and crystallized at a low temperature. In the case of a crystallized silicon film, it has been found that high temperature annealing in an oxidizing atmosphere such as oxygen is very effective in stabilizing the characteristics. The reason for this is not clear at present, but it is presumed that the bonds between the catalytic element and silicon, which are presumably present in the amorphous silicon portion, may be replaced by the bonds with oxygen and stabilized. For this reason, it is more effective if the atmosphere during the high-temperature annealing in the present invention is an oxidizing atmosphere.
In addition, by performing annealing in an oxidizing atmosphere, crystallinity is improved and a silicon oxide film generated by thermal oxidation on the surface can be manufactured. This silicon oxide film is very dense, and it has been found that if it is several hundreds or more, it has sufficient reliability to be used as a gate insulating film. However, since the thermal oxide film generates a large stress at the interface with crystalline silicon, it is desirable that the film thickness be as thin as possible. Therefore, when degradation of characteristics due to such stress becomes a problem, high-temperature annealing is performed in an oxidizing atmosphere to improve crystallinity and form a thermal oxide film, and then etch the thermal oxide film. In addition, a new gate insulating film may be formed.
[0034]
The high-temperature annealing performed to improve the crystallinity may employ a method of irradiating strong light, particularly infrared light, in addition to annealing in a general electric furnace. Infrared light is not easily absorbed by glass and is easily absorbed by a silicon thin film, which makes it possible to selectively heat a silicon thin film formed on a glass substrate. This method using infrared light is called rapid therma annealing (RTA) or rapid thermal process (RTP).
[0035]
Moreover, crystal growth can be selectively performed by selectively applying a solution containing a catalytic element. Particularly in this case, crystal growth can be performed in a direction substantially parallel to the surface of the silicon film from the region where the solution is applied toward the region where the solution is not applied. In this specification, a region where crystal growth is performed in a direction substantially parallel to the surface of the silicon film is referred to as a laterally crystallized region.
[0036]
Further, it has been confirmed that the concentration of the catalytic element is low in the region where the crystal growth is performed in the lateral direction. Although it is useful to use a crystalline silicon film as the active layer region of the semiconductor device, it is generally preferable that the impurity concentration in the active layer region is low. Therefore, it is useful for device fabrication to form the active layer region of the semiconductor device using the region where the crystal is grown in the lateral direction.
[0037]
In the present invention, the most prominent effect can be obtained when nickel is used as the catalyst element, but the other usable catalyst elements are preferably Ni, Pt, Cu, Ag, Au, In, Sn. , Pd, P, As, and Sb can be used. One or more kinds of elements selected from Group VIII elements, IIIb, IVb, and Vb elements can also be used.
[0038]
The method for introducing the catalyst element is not limited to using a solution such as an aqueous solution or alcohol, and a substance containing the catalyst element can be widely used. For example, a metal compound or oxide containing a catalyst element can be used.
[0039]
【Example】
[Example 1]
In this embodiment, a catalyst element that promotes crystallization is contained in an aqueous solution, applied onto an amorphous silicon film, and then crystallized by heating, and crystallinity is enhanced by high-temperature annealing.
[0040]
The steps up to the introduction of the catalyst element (here, nickel is used) will be described with reference to FIG. In this embodiment, quartz glass is used as the substrate. Moreover, the magnitude | size shall be 100 mm x 100 mm.
[0041]
First, an amorphous silicon film is formed in a thickness of 100 to 1500 nm by plasma CVD or LPCVD. Here, the amorphous silicon film 12 is formed to a thickness of 1000 mm by plasma CVD. (Fig. 1 (A))
[0042]
Then, hydrofluoric acid treatment is performed to remove the dirt and the natural oxide film, and then the oxide film 13 is formed to a thickness of 10 to 50 mm. If the contamination can be ignored, the natural oxide film may be used as it is instead of the oxide film 13.
[0043]
Since the oxide film 13 is extremely thin, the exact film thickness is unknown, but is considered to be about 20 mm. Here, the oxide film 13 is formed by irradiation with UV light in an oxygen atmosphere. The film formation was performed by irradiating with UV in an oxygen atmosphere for 5 minutes. As a method for forming the oxide film 13, a thermal oxidation method may be used. Further, treatment with hydrogen peroxide may be used.
[0044]
This oxide film 13 is for spreading the acetate solution over the entire surface of the amorphous silicon film, that is, for improving the wettability in the subsequent step of applying an acetate solution containing nickel. For example, when an acetate solution is directly applied to the surface of the amorphous silicon film, the amorphous silicon repels the acetate solution, so that nickel cannot be introduced to the entire surface of the amorphous silicon film. That is, uniform crystallization cannot be performed.
[0045]
Next, an acetate solution is prepared by adding nickel to the acetate solution. The nickel concentration is 25 ppm. Then, 2 ml of this acetate solution is dropped on the surface of the oxide film 13 on the amorphous silicon film 12, and this state is maintained for 5 minutes. Then, spin drying (2000 rpm, 60 seconds) is performed using a spinner. (Fig. 1 (C), (D))
[0046]
When the concentration of nickel in the acetic acid solution is 1 ppm or more, preferably 10 ppm or more, it becomes practical. Further, when a nonpolar solvent such as a toluene solution of nickel 2-ethylhexanoate is used as the solution, the oxide film 13 is unnecessary, and the catalytic element can be directly introduced onto the amorphous silicon film.
[0047]
By performing this nickel solution coating process once to a plurality of times, a layer containing nickel having an average film thickness of several to several hundreds of mm is formed on the surface of the amorphous silicon film 12 after spin drying. be able to. In this case, nickel in this layer diffuses into the amorphous silicon film in the subsequent heating step, and acts as a catalyst for promoting crystallization. Note that this layer is not necessarily a complete film.
[0048]
After application of the solution, the state is maintained for 1 minute. The concentration of nickel contained in the silicon film 12 can be finally controlled by this holding time, but the greatest control factor is the concentration of the solution.
[0049]
In a heating furnace, heat treatment is performed at 550 ° C. for 4 hours in a nitrogen atmosphere. As a result, the crystalline silicon thin film 12 formed on the substrate 11 can be obtained.
[0050]
The above heat treatment can be performed at a temperature of 450 ° C. or higher. However, if the temperature is low, the heating time must be lengthened and the production efficiency is lowered. Even if the temperature is too high, crystal growth starts from a portion other than the portion in contact with nickel, and as a result, a crystalline silicon film composed of large-sized silicon grains cannot be formed.
[0051]
In this embodiment, the method of introducing the catalytic element onto the amorphous silicon film is shown, but a method of introducing the catalytic element under the amorphous silicon film may be adopted. In this case, the catalyst element may be introduced onto the base film using a solution containing the catalyst element before the formation of the amorphous silicon film.
[0052]
After obtaining the crystalline silicon film 12 by heat treatment, hydrofluoric acid treatment is performed to remove dirt and natural oxide film. Further, annealing is performed in oxygen for 30 minutes to 2 hours at 1000 ° C. in this case, and the crystallinity inside the crystal grains is improved (the effect of reducing defects inside the crystal can be expected by performing this step), While improving the interface characteristics, a thermal oxide film of about 1000 mm was formed.
Thereafter, the oxide film was removed, and observation by TEM was performed. As a result, the obtained crystalline silicon film was composed of large-diameter crystal grains having anisotropy, and the long side of the grains had a long side of 10 μm or more. It turned out to be relatively well aligned.
[0053]
[Example 2]
This embodiment is an example in which a 1200 珪 素 silicon oxide film is selectively provided in the manufacturing method shown in Embodiment 1, and nickel is selectively introduced using the silicon oxide film as a mask.
[0054]
FIG. 2 shows an outline of a manufacturing process in this example. First, a silicon oxide film 21 serving as a mask is formed on a quartz glass substrate (10 cm square) to a thickness of 1000 mm or more, here 1200 mm. Regarding the film thickness of the silicon oxide film 21, it has been confirmed by the inventors' experiments that there is no problem even at 500 mm, and it may be thinner if the film quality is dense.
[0055]
Then, the silicon oxide film 21 is panned into a required pattern by a normal photolithography patterning process. Then, a thin silicon oxide film 20 is formed by irradiation with ultraviolet rays in an oxygen atmosphere. The silicon oxide film 20 is produced by irradiating UV light for 5 minutes in an oxygen atmosphere. The thickness of the silicon oxide film 20 is considered to be about 20 to 50 mm (FIG. 2A). Note that the silicon oxide film for improving the wettability may be added just well depending on the hydrophilicity of the silicon oxide film of the mask when the size of the solution and the pattern match. However, such an example is special, and it is generally safer to use the silicon oxide film 20.
[0056]
In this state, 5 ml of an acetate solution containing 100 ppm of nickel was dropped as in Example 1 (in the case of a 10 cm square substrate). At this time, spin coating is performed with a spinner at 50 rpm for 10 seconds to form a uniform water film on the entire substrate surface. Furthermore, after maintaining for 5 minutes in this state, spin drying is performed at 2000 rpm for 60 seconds using a spinner. In addition, you may perform this holding | maintenance, rotating 0-150 rpm on a spinner. (Fig. 2 (B))
[0057]
Then, the amorphous silicon film 12 is crystallized by performing heat treatment at 550 degrees (nitrogen atmosphere) for 4 hours. At this time, crystal growth is performed in the lateral direction from the region of the portion 22 where nickel is introduced to the region where nickel is not introduced, as indicated by 23. In FIG. 2C, 24 is a region where nickel is directly introduced and crystallization is performed, and 25 is a region where crystallization is performed in the lateral direction. In addition, it has been confirmed that in the 25 region, crystal growth is performed substantially in the <111> axis direction.
[0058]
When TEM observation is performed at this stage, columnar crystals with radially uniform widths grow from the region where nickel is added to the periphery of the obtained crystalline silicon film, and there are gaps between the individual crystals. It was found that an amorphous part remained.
Next, after the crystallization step by the heat treatment, the silicon oxide film is peeled off and the heating temperature is 1000 ° C. in oxygen to further improve the crystallinity of the silicon film 12. By this step, the crystallinity of the region 25 where the crystal has grown in the lateral direction can be greatly increased.
[0059]
When this crystalline silicon film was observed with a TEM, it was found that the gap portion of the columnar crystal was crystallized and that pseudo-epitaxial growth occurred with the columnar crystal as a nucleus. As a result, the crystal grain boundary was very difficult to understand, and a crystalline silicon film consisting of huge crystal grains (up to several tens of μm or more) was obtained.
[0060]
In this example, the concentration of nickel in the region where nickel was directly introduced can be controlled in the range of 1 × 10 ¹⁵ atoms cm ⁻³ to 1 × 10 ¹⁹ atoms cm ⁻³ by changing the solution concentration and holding time. Similarly, the concentration of the lateral growth region can be controlled to be lower than that.
[0061]
The crystalline silicon film formed by the method as shown in this embodiment is characterized by good hydrofluoric acid resistance. According to the knowledge of the present inventors, the crystalline silicon film obtained by introducing nickel by plasma treatment and crystallizing has low hydrofluoric acid resistance.
[0062]
For example, it is necessary to form a silicon oxide film functioning as a gate insulating film or an interlayer insulating film on a crystalline silicon film, and then form an electrode through a drilling process for forming the electrode. There is a case. In such a case, a process of removing the silicon oxide film with buffer hydrofluoric acid is usually employed. However, when the hydrofluoric acid resistance of the crystalline silicon film is low, it is difficult to remove only the silicon oxide film, and there is a problem that the crystalline silicon film is also etched.
[0063]
However, when the crystalline silicon film has hydrofluoric acid resistance, the difference in etching rate (selection ratio) between the silicon oxide film and the crystalline silicon film can be increased, so that only the silicon oxide film is selectively used. It can be removed and is extremely significant in the manufacturing process.
[0064]
As described above, the region where the crystal grows in the lateral direction has a low concentration of the catalytic element and good crystallinity. Therefore, it is useful to use this region as the active region of the semiconductor device. For example, it is extremely useful to use as a channel formation region of a thin film transistor.
[0065]
Example 3
In this embodiment, a TFT is obtained using a crystalline silicon film manufactured by using the method of the present invention. The TFT of this embodiment can be used for a driver circuit or a pixel portion of an active matrix type liquid crystal display device. Needless to say, the application range of the TFT is not limited to the liquid crystal display device but can be used for a generally-known thin film integrated circuit.
[0066]
FIG. 3 shows an outline of the manufacturing process of this example. First, a base silicon nitride film (not shown) is formed on a N0 glass substrate, and a silicon oxide film (not shown) is formed thereon to a thickness of 2000 mm. The silicon nitride film and the silicon oxide film are provided to prevent diffusion of impurities from the glass substrate.
[0067]
Then, an amorphous silicon film is formed to a thickness of 500 mm by the same method as in the first embodiment. As a film forming method, a film formed by LPCVD using polysilane such as silane or disilane was desired in view of device characteristics. Then, after hydrofluoric acid treatment for removing the natural oxide film, a thin oxide film is formed to a thickness of about 20 mm by irradiation with UV light in an oxygen atmosphere. The thin oxide film may be produced by a method using overwater treatment or thermal oxidation.
[0068]
Then, an acetate solution containing 10 ppm of nickel is applied, held for 5 minutes, and spin dried using a spinner. Thereafter, the silicon oxide films 20 and 21 are removed with buffered hydrofluoric acid, and the silicon film is crystallized by heating at 550 ° C. for 4 hours. (The process up to this point is the same as the manufacturing method shown in Example 1)
[0069]
By performing the heat treatment, a silicon film in which an amorphous component and a crystal component are mixed can be obtained. This crystal component is a region where crystal nuclei during subsequent crystal growth at high temperatures exist.
Thereafter, annealing is performed in oxygen at 800 ° C. for 2 hours to crystallize the entire surface and promote crystallinity of the silicon film. By this step, crystal growth is performed using a crystal nucleus present in the crystal component as a nucleus.
[0070]
Next, the crystallized silicon film is patterned to form island-like regions 104. This island-shaped region 104 constitutes the active layer of the TFT. Then, silicon oxide 105 having a thickness of 200 to 1500 mm, here 1000 mm is formed. This silicon oxide film also functions as a gate insulating film. (Fig. 3 (A))
[0071]
Care must be taken in the production of the silicon oxide film 105. Here, TEOS was used as a raw material, and decomposed and deposited by RF plasma CVD with oxygen at a substrate temperature of 150 to 600 ° C., preferably 300 to 450 ° C. The pressure ratio between TEOS and oxygen was 1: 1 to 1: 3, the pressure was 0.05 to 0.5 torr, and the RF power was 100 to 250 W. Alternatively, the substrate temperature was set to 350 to 600 ° C., preferably 400 to 550 ° C. using TEOS as a raw material together with ozone gas by low pressure CVD or normal pressure CVD. After film formation, annealing was performed at 400 to 600 ° C. for 30 to 60 minutes in an oxygen or ozone atmosphere.
[0072]
In this state, the interface state between the silicon region 104 and the silicon oxide film 105 is improved by heat treatment in an electric furnace, or irradiation with KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) or strong light equivalent thereto. It is effective. In particular, since RTA (rapid thermal annealing) using infrared light can selectively heat only silicon without heating the glass substrate, the temperature of the substrate is kept below the softening point of N0 glass. Since annealing at a high temperature can be performed and the interface state at the interface between the silicon and the silicon oxide film can be reduced, it is useful in manufacturing an insulated gate field effect semiconductor device.
[0073]
Thereafter, a tantalum film having a thickness of 2000 μm to 1 μm is formed by electron beam evaporation, and this is patterned to form the gate electrode 106. Next, anodic oxidation is performed using platinum as a cathode and the tantalum gate electrode as an anode. The anodization is terminated by first increasing the voltage to 220 V at a constant current and holding it in that state for 1 hour. In this embodiment, 2 to 5 V / min is appropriate for the voltage increase rate in the constant current state. In this manner, the anodic oxide 109 having a thickness of 1500 to 3500 mm, for example, 2000 mm is formed. (Fig. 3 (B))
[0074]
Thereafter, an impurity (phosphorus) was implanted into the island-like silicon film of each TFT by the ion doping method (also called plasma doping method) using the gate electrode portion as a mask. Phosphine (PH ₃ ) was used as the doping gas. The dose amount is 1 to 4 × 10 ¹⁵ cm ⁻² .
[0075]
Further, as shown in FIG. 3C, irradiation with a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is performed to improve the crystallinity of the portion where the crystallinity has deteriorated due to the introduction of the impurity region. The energy density of the laser is 150 to 400 mJ / cm ² , preferably 200 to 250 mJ / cm ² . Thus, N-type impurity (phosphorus) regions 108 and 109 are formed. The sheet resistance in these regions was 200 to 800 Ω / □.
[0076]
In this step, heat treatment in an electric furnace may be used instead of using laser light. In addition, a flash lamp is used to raise the temperature to 1000-1200 ° C. (silicon monitor temperature) in a short time to heat the sample, so-called RTA (rapid thermal annealing) (also called RTP, rapid thermal process). For example, intense light equivalent to so-called laser light such as may be used.
[0077]
Thereafter, a silicon oxide film having a thickness of 3000 mm is formed on the entire surface as an interlayer insulator 110 by using TEOS as a raw material and a plasma CVD method using this and oxygen, a low pressure CVD method using ozone, or an atmospheric pressure CVD method. The substrate temperature is 250 to 450 ° C., for example, 350 ° C. After film formation, this silicon oxide film is mechanically polished to obtain surface flatness. (Fig. 3 (D))
[0078]
Then, the interlayer insulator 110 is etched to form contact holes in the source / drain of the TFT as shown in FIG. 1E, and wirings 112 and 113 of chromium or titanium nitride are formed.
[0079]
Conventionally, a crystalline silicon film into which nickel has been introduced using plasma treatment has a low selectivity to buffer hydrofluoric acid compared to a silicon oxide film, and thus is often etched in the contact hole forming step. .
[0080]
However, when nickel is introduced using an aqueous solution at a low concentration of 10 ppm as in this embodiment, the resistance to hydrofluoric acid is high, so that the formation of the contact hole can be performed stably and with good reproducibility.
[0081]
Finally, annealing in hydrogen at 300-400 ° C. for 0.1-2 hours completes the hydrogenation of silicon. In this way, the TFT is completed. A large number of TFTs manufactured at the same time are arranged in a matrix to complete an active matrix liquid crystal display device. This TFT has source / drain regions 108/109 and a channel formation region 114. Reference numeral 115 denotes an NI electrical junction.
[0082]
When the configuration of this example is adopted, the concentration of nickel present in the active layer is about 3 × 10 ¹⁸ cm ⁻³ or less, 1 × 10 ¹⁵ atoms cm ^{−3 to} 3 × 10 ¹⁸ atoms cm ^{−. 3} is considered.
[0083]
The TFT manufactured in this example has an N-channel mobility of 200 cm ² / Vs or higher. It has also been confirmed that _Vth is small and has good characteristics. Furthermore, it has been confirmed that the variation in mobility is within ± 10%. This small variation is considered to be due to a process of incomplete crystallization by heat treatment and promotion of crystallinity by irradiation with laser light. When only the laser beam is used, it is possible to easily obtain an N chuckel type of 150 cm ² / Vs or more, but the variation is large and the uniformity as in this embodiment cannot be obtained.
In this embodiment, an example using a tantalum gate is shown, but it goes without saying that this may be a silicon gate using N-type or P-type polysilicon. Alternatively, high-temperature annealing may be performed after island patterning. In that case, it is difficult to align the mask due to shrinkage of the substrate, so it is desirable to use quartz as the substrate.
[0084]
Example 4
In this embodiment, as shown in Embodiment 2, nickel is selectively introduced, and an example is shown in which an electronic device is formed using a region in which crystal growth has occurred in the lateral direction (direction parallel to the substrate). When such a configuration is adopted, the nickel concentration in the active layer region of the device can be further reduced, and a very preferable configuration can be obtained from the viewpoint of electrical stability and reliability of the device.
[0085]
FIG. 4 shows a manufacturing process of this example. First, the quartz substrate 201 is cleaned, and a silicon oxide base film 202 having a thickness of 2000 mm is formed by plasma CVD using TEOS (tetraethoxysilane) and oxygen as source gases. In the present embodiment, the base is formed just in case, but this step can be ignored if problems such as contamination can be ignored. Then, an intrinsic (I-type) amorphous silicon film 203 having a thickness of 500 to 1500 mm, for example, 1000 mm is formed by plasma CVD. Next, a silicon oxide film 205 having a thickness of 500 to 2000 mm, for example, 1000 mm is continuously formed by plasma CVD. Then, the silicon oxide film 205 is selectively etched to form an exposed region 206 of amorphous silicon.
[0086]
Then, a solution (in this case, an acetate solution) containing nickel element as a catalytic element for promoting crystallization is applied by the method shown in Example 2. The concentration of nickel in the acetic acid solution is 100 ppm. In addition, the detailed process sequence and conditions are the same as those shown in the second embodiment. This step may be performed by the method shown in Example 3 or Example 4.
[0087]
Thereafter, heat annealing is performed in a nitrogen atmosphere at 500 to 620 ° C., for example, 550 ° C. for 4 hours to crystallize the silicon film 203. In crystallization, crystal growth proceeds in a direction parallel to the substrate as indicated by an arrow starting from a region 206 where nickel and a silicon film are in contact with each other. In the figure, a region 204 indicates a portion crystallized by direct introduction of nickel, and a region 203 indicates a portion crystallized in the lateral direction. The crystal in the horizontal direction indicated by 203 is about 25 μm. Further, it has been confirmed that the crystal growth direction is approximately the <111> axis direction. (Fig. 4 (A))
[0088]
After the crystallization step by the heat treatment, the entire surface of the silicon oxide film 205 was etched, and then high-temperature annealing at 1050 ° C. for about 60 minutes was performed in oxygen to improve crystallinity. In this step, a thermal oxide film of about 1000 mm is formed simultaneously with the improvement of crystallinity. When the stress or the like is not a problem, this thermal oxide film may be used as the gate insulating film. In this case, in consideration of the stress, the following description will be continued with respect to a configuration in which this thermal oxide film is not used.
[0089]
Next, the thermal oxide film is removed. Then, after patterning the silicon film 204, the island-shaped active layer region 208 is formed by dry etching. At this time, a region indicated by 206 in FIG. 4A is a region where nickel is directly introduced, and is a region where nickel is present at a high concentration.
[0090]
It has also been confirmed that nickel is also present at a high concentration at the tip of crystal growth. In these regions, it has been found that the nickel concentration is higher than in the middle region. Therefore, in this example, in the active layer 208, these high nickel concentration regions were not overlapped with the channel formation region.
[0091]
Thereafter, a high temperature CVD oxide film is formed by LPCVD using TEOS while the substrate is heated to 800 ° C. to 850 ° C. This becomes a silicon oxide film 209 that functions as a gate insulating film. The thickness of the silicon oxide film is 1000 mm.
(Fig. 4 (B))
[0092]
Subsequently, a polysilicon film doped with P or B serving as a gate electrode is formed to a thickness of 1000 to 4000 by LPCVD and patterned to form the gate electrode 210. (Fig. 2 (C))
[0093]
Next, by an ion doping method (also called plasma doping method), self-alignment is performed in the active layer region (which constitutes the source / drain and channel) using the gate electrode portion, that is, the gate electrode 210 and the surrounding oxide layer 211 as a mask. In particular, an impurity imparting N conductivity type (here, phosphorus) is added. As the doping gas, phosphine (PH ₃ ) is used, and the acceleration voltage is set to 60 to 90 kV, for example, 80 kV. The dose amount is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 4 × 10 ¹⁵ cm ⁻² . As a result, N-type impurity regions 212 and 213 can be formed.
[0094]
Thereafter, heating was performed at 600 ° C. for 12 hours in a nitrogen atmosphere to activate the impurities. After this activation step, heat treatment in a hydrogen atmosphere at 400 ° C. for 1 hour as necessary was effective in reducing the defect level density. (Fig. 4 (E))
[0095]
Subsequently, a silicon oxide film 214 having a thickness of 6000 mm is formed as an interlayer insulator by a plasma CVD method. Further, a transparent polyimide film 215 is formed by spin coating to flatten the surface.
[0096]
Then, contact holes are formed in the interlayer insulators 214 and 215, and TFT electrodes and wirings 217 and 218 are formed of a multilayer film of a metal material, for example, titanium nitride and aluminum. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete an active matrix pixel circuit having TFTs. (Fig. 4 (F))
[0097]
Since the TFT manufactured in this embodiment can obtain high mobility, it can be used for a driver circuit of an active matrix liquid crystal display device.
[0098]
Example 5
FIG. 5 shows a cross-sectional view of the manufacturing process of this example. First, a silicon oxide base film 502 having a thickness of 2000 mm is formed on a quartz substrate 501 by sputtering. Next, an intrinsic (I-type) amorphous silicon film having a thickness of 500 to 1500 mm, for example, 1000 mm is formed by plasma CVD. Then, nickel is introduced into the surface of the amorphous silicon film as a catalyst element for promoting crystallization by the method shown in the first embodiment. Then, it is crystallized by annealing in a nitrogen atmosphere (atmospheric pressure), 550 ° C. for 4 hours. Then, the silicon film is patterned to a size of 10 to 1000 μm square to form an island-like silicon film (TFT active layer) 503. (Fig. 5 (A))
[0099]
Thereafter, annealing is performed in an oxygen atmosphere at 800 to 1100 ° C., typically 1000 ° C. for about 2 hours, thereby improving crystallinity and interface characteristics, and forming a gate insulating film 504 made of a thermal oxide film. A thickness of 500 to 1500 mm, for example, 1000 mm is formed.
[0100]
It should be noted that due to such oxidation, the surface of the initial silicon film is reduced by 50 mm or more, and as a result, the contamination of the outermost surface portion of the silicon film does not reach the silicon-silicon oxide interface. is there. That is, a clean silicon-silicon oxide interface is obtained. Since the thickness of the silicon oxide film is twice that of the silicon film to be oxidized, a silicon oxide film having a thickness of 1000 mm is oxidized to obtain a silicon oxide film having a thickness of 1000 mm. The thickness will be 500 mm.
[0101]
After the silicon oxide film 504 is formed by thermal oxidation, the substrate is annealed at 600 ° C. for 2 hours in a dinitrogen monoxide atmosphere (1 atm, 100%). (Fig. 5 (B))
Subsequently, polycrystalline silicon (containing 0.01 to 0.2% phosphorus) having a thickness of 3000 to 8000 mm, for example, 6000 mm is formed by low pressure CVD. Then, the gate electrode 505 is formed by patterning the silicon film. Further, an impurity (in this case, phosphorus) is given to the active layer region (which constitutes a source / drain and a channel) by an ion doping method (also called a plasma doping method) in a self-aligning manner using this silicon film as a mask. ) Is added. As the doping gas, phosphine (PH ₃ ) is used, and the acceleration voltage is set to 60 to 90 kV, for example, 80 kV. The dose amount is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 5 × 10 ¹⁵ cm ⁻² . As a result, N-type impurity regions 506 and 507 are formed.
[0102]
Thereafter, heat treatment was performed in nitrogen at 600 ° C. for 12 hours to activate the impurities. This activation step may be performed by laser light irradiation. (Fig. 5 (C))
[0103]
Similarly, the impurity activation step may be a method of lamp annealing using near infrared light. Near-infrared rays are more easily absorbed by crystallized silicon than amorphous silicon, and effective annealing comparable to thermal annealing at 1000 ° C. or higher can be performed. On the other hand, the glass substrate (far infrared light is absorbed by the glass substrate, but visible / near infrared light (wavelength 0.5 to 4 μm) is hardly absorbed) is hardly absorbed. Since heating is not necessary and only a short time is required, in this embodiment, there is no problem because the substrate uses quartz, but it can be said that it is an optimum method in a process where shrinkage of the glass substrate is a problem. .
[0104]
Subsequently, a silicon oxide film 508 having a thickness of 6000 mm is formed by plasma CVD as an interlayer insulator. Polyimide may be used as the interlayer insulator. Further, contact holes are formed, and TFT electrodes and wirings 509 and 510 are formed of a metal material, for example, a multilayer film of titanium nitride and aluminum. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete the TFT. (Fig. 5 (D))
[0105]
Example 6
In this embodiment, as shown in FIG. 6, an electro-optical system using an integrated circuit in which a display, a CPU, and a memory are mounted on a single glass substrate will be described. This embodiment is an example in which each integrated circuit is manufactured using a TFT using a crystalline silicon film according to the present invention.
[0106]
In FIG. 6, an input port reads a signal input from the outside and converts it into an image signal, and a correction memory is a memory unique to the panel for correcting the input signal in accordance with the characteristics of the active matrix panel. It is. In particular, this correction memory has information specific to each pixel as a non-volatile memory, and is used for individual correction. That is, if a pixel of the electro-optical device has a point defect, a signal corrected accordingly is sent to the pixels around the point to cover the point defect and make the defect inconspicuous. Alternatively, when a pixel is darker than surrounding pixels, a larger signal is sent to the pixel so that the surrounding pixels have the same brightness.
[0107]
The CPU and the memory are the same as those of an ordinary computer. In particular, the memory has an image memory corresponding to each pixel as a RAM. Moreover, the backlight which irradiates a board | substrate from a back surface can also be changed according to image information.
[0108]
As shown in this embodiment, a highly integrated liquid crystal display device can be obtained by forming an integrated circuit necessary for a TFT using a crystalline silicon film on the same substrate.
[0109]
【effect】
A catalytic element is introduced to produce a crystalline silicon film having a large grain size at a relatively low temperature, and then annealed at a higher temperature to obtain a silicon film with very high crystallinity. By manufacturing a semiconductor device using such a crystalline silicon film, a device with high productivity and good characteristics can be obtained.
[Brief description of the drawings]
FIG. 1 shows the steps of an embodiment. FIG. 2 shows the steps of an embodiment.
FIG. 3 shows a manufacturing process of the example.
FIG. 4 shows a manufacturing process of the example.
FIG. 5 shows a manufacturing process of the example.
FIG. 6 shows a configuration of an example.
[Explanation of symbols]
11... Glass substrate 12... Amorphous silicon film 13... Silicon oxide film 14... Nickel-containing acetic acid solution film 15. Silicon oxide film 20... Silicon oxide film 11... Glass substrate 104... Active layer 105... Silicon oxide film 106. Drain region 109 ... Drain / source region 110 ... Interlayer insulating film (silicon oxide film)
112 ... Electrode 113 ... Electrode

Claims (20)

Forming an amorphous semiconductor film containing silicon;
Forming an oxide film on the surface of the amorphous semiconductor film;
In order to add an element for promoting crystallization of amorphous silicon to the amorphous semiconductor film, a solution containing an element for promoting crystallization of amorphous silicon is applied to the surface of the oxide film ,
Using a furnace, the amorphous semiconductor film is crystallized by heat treatment at 450 ° C. to 650 ° C. to form a crystalline semiconductor film,
The crystalline semiconductor film formed by the heat treatment is heated by RTA,
In order to form the source region and the drain region, the RTA crystalline semiconductor film is doped with impurities,
A method for manufacturing an integrated circuit, wherein impurities doped in the crystalline semiconductor film are activated. Forming an amorphous semiconductor film containing silicon;
Forming an insulating film having an opening on the amorphous semiconductor film;
In the opening, an oxide film is formed on the surface of the amorphous semiconductor film,
In order to add an element for promoting crystallization of amorphous silicon to the amorphous semiconductor film, the amorphous silicon is crystallized on the surface of the oxide film while leaving the insulating film having the opening. Apply a solution containing the elements to promote ,
Using a furnace, the amorphous semiconductor film is crystallized by heat treatment at 450 ° C. to 650 ° C. to form a crystalline semiconductor film,
The crystalline semiconductor film formed by the heat treatment is heated by RTA,
In order to form the source region and the drain region, the RTA crystalline semiconductor film is doped with impurities,
A method for manufacturing an integrated circuit, wherein impurities doped in the crystalline semiconductor film are activated. 3. The method for manufacturing an integrated circuit according to claim 1, wherein the atmosphere of the RTA is an oxidizing atmosphere. According to claim 3, wherein forming the oxide film on the crystalline semiconductor film by heating with RTA, a method for manufacturing an integrated circuit, which comprises using the oxide film on the gate insulating film. Forming an amorphous semiconductor film containing silicon;
Forming an oxide film on the surface of the amorphous semiconductor film;
In order to add an element for promoting crystallization of amorphous silicon to the amorphous semiconductor film, a solution containing an element for promoting crystallization of amorphous silicon is applied to the surface of the oxide film ,
Using a furnace, the amorphous semiconductor film is heat-treated at 450 ° C. to 650 ° C.,
The heat-treated semiconductor film is heated by a first RTA,
In order to form a source region and a drain region, the first RTA semiconductor film is doped with impurities,
A method for manufacturing an integrated circuit, wherein the impurity doped in the semiconductor film is activated by a second RTA. Forming an amorphous semiconductor film containing silicon;
Forming an insulating film having an opening on the amorphous semiconductor film;
In the opening, an oxide film is formed on the surface of the amorphous semiconductor film,
In order to add an element for promoting crystallization of amorphous silicon to the amorphous semiconductor film, the amorphous silicon is crystallized on the surface of the oxide film while leaving the insulating film having the opening. Apply a solution containing the elements to promote ,
The amorphous semiconductor film is heat-treated at 450 ° C. to 650 ° C. using a furnace,
The heat-treated semiconductor film is heated by a first RTA,
In order to form a source region and a drain region, the first RTA semiconductor film is doped with impurities,
A method for manufacturing an integrated circuit, wherein the impurity doped in the semiconductor film is activated by a second RTA. 7. The method for manufacturing an integrated circuit according to claim 5 , wherein the atmosphere of the first RTA is an oxidizing atmosphere. 8. The method for manufacturing an integrated circuit according to claim 7 , wherein an oxide film is formed on the semiconductor film by the first RTA, and the oxide film is used as a gate insulating film. 9. The method for manufacturing an integrated circuit according to claim 1, wherein an oxide film is formed on the surface of the amorphous semiconductor film by irradiating UV light in an oxygen atmosphere. 9. The method for manufacturing an integrated circuit according to claim 1, wherein an oxide film is formed on a surface of the amorphous semiconductor film by a thermal oxidation method. 9. The method for manufacturing an integrated circuit according to claim 1, wherein an oxide film is formed on a surface of the amorphous semiconductor film by treatment with hydrogen peroxide. 12. The method for manufacturing an integrated circuit according to claim 1, wherein an oxide film is formed to a thickness of 10 nm or less on the surface of the amorphous semiconductor film. 13. The element according to claim 1, wherein one or more elements selected from Ni, Pd, Pt, Cu, Ag, Au, In, and Sn are used as the element that promotes crystallization. An integrated circuit manufacturing method characterized by the above. 14. The method for manufacturing an integrated circuit according to claim 1, wherein the amorphous semiconductor film containing silicon is formed to a thickness of 50 nm to 150 nm. The method for manufacturing an integrated circuit according to claim 1, wherein the amorphous semiconductor film containing silicon is formed by a plasma CVD method. 15. The method for manufacturing an integrated circuit according to claim 1, wherein the amorphous semiconductor film containing silicon is formed by a low pressure CVD method. The method for manufacturing an integrated circuit according to claim 1, wherein an active matrix circuit is manufactured as the integrated circuit. 17. The method for manufacturing an integrated circuit according to claim 1, wherein an active matrix circuit and a driver circuit are manufactured over the same substrate as the integrated circuit. 17. The method for manufacturing an integrated circuit according to claim 1, wherein at least one of a CPU, a nonvolatile memory, and a RAM is manufactured as the integrated circuit. In any one of claims 1 to 16, as the integrated circuit, the active matrix scan circuit and a driver circuit, CPU, volatile memory, integrated, characterized in that to produce at least one on the same substrate of the RAM A method for manufacturing a circuit.

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