JPH07106375A - Tab tape of semiconductor device - Google Patents

Abstract

PURPOSE:To make possible the evaluation of a printed board and an analysis of the board by an electrical test subsequent to a mounting of the printed board, to promote the improvement of quality of the board and a reduction in the period of the design of the board and at the same time, to make possible the mounting of the high-density printed board. CONSTITUTION:Test pads 4a are respectively provided on wiring patterns 5 on the outsides of windows 2 for OLB in a TAB tape of a semiconductor device at positions arranged at a standardized pitch and test pads 4b, which are arranged jigzag in every adjacent wiring patterns, are respectively provided on wiring patterns 5 on the insides of the windows for OLB.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device TAB tape, and more particularly to a semiconductor device TA having a test pad.
Regarding B tape.

[0002]

2. Description of the Related Art As shown in FIG. 3, a conventional semiconductor device TAB tape (hereinafter, referred to as TAB tape) has individual electric wires of an IC pellet 7 mounted by inner lead bonding (hereinafter, referred to as ILB). In order to perform a test, a metal material such as copper foil is laminated on a film such as a polyimide resin, and a desired wiring pattern 5 is formed by an etching process. Usually, the outside of the OLB window 2 on this wiring pattern 5 is standardized. The test pad 4a was provided at the specified position, and a probe was connected to the test pad 4a and connected to the IC tester to carry out an electrical test.

In the TAB tape 1 on which the IC pellets 7 are mounted, the outer leads cut and separated at the OLB window 2 portion of the wiring pattern 5 are mounted on a desired printed circuit board by thermocompression bonding or eutectic bonding. At this time, the test pad 4a is separated from the outer lead and becomes unnecessary.

[0004]

The conventional TA shown in FIG.
The configuration of the B tape 1 has a big defect that the test pad 4a is located outside the OLB window 2 and the test pad 4a is cut after the OLB, making it impossible to perform an electrical test thereafter.

Recently, the test pad 4a has been arranged at a standardized position outside the OLB window 2 to connect the TAB tape 1 and the IC tester at the time of an electrical test. As for the IC socket, the standard is that the contact portion is designed according to the standard arrangement of the test pad 4a on the outside of the OLB window 2. for that reason,
The one having the test pad inside the OLB window 2 has a drawback that the development cost and the development period of the IC socket are increased because it is necessary to design a dedicated IC socket according to the pad arrangement.

An object of the present invention is to provide a TAB tape for a semiconductor device, which can be electrically tested after it is mounted on a printed board and does not require the design of a dedicated IC socket to reduce the development cost and the development period. .

[0007]

The present invention provides a TAB tape for a semiconductor device having an outer lead bonding window and a test pad provided on a wiring pattern outside the outer lead bonding window. A test pattern is provided in a zigzag pattern for each wiring pattern adjacent to the above wiring pattern inside the outer lead bonding window.

[0008]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a plan view of the first embodiment of the present invention. In the first embodiment of the present invention, as shown in FIG. 1, first, an IC pellet 7 is packaged in the central portion of the TAB tape 1 to form a tape carrier package (hereinafter referred to as TCP). This TAB tape has 35mm,
A desired wiring pattern 5 is formed by bonding a metal material such as a copper foil onto an insulating film such as a polyimide resin having a width of 48 mm or 70 mm and etching the film. In addition, sprocket holes 6 are arranged in a row along both edges of the TAB tape 1, and an inlaid bonding (hereinafter referred to as ILB) window 3 for mounting the IC pellet 7 is formed around the IC pellet 7. And this ILB
An OLB window 2 for forming outer leads is provided around the window 3 for use. Of the wiring patterns 5 formed by the etching process, the wiring pattern 5 formed on the ILB window 3 becomes an inner lead for later connection with the IC pellet 7, and the wiring formed on the OLB window 2 is formed. The pattern 5 will be an outer lead for connecting to the substrate later when mounting the substrate. The test pads 4a are provided on both the outside and the inside of the OLB window 2 on the wiring pattern 5.
4b, of which the outer test pad 4a
For, the pad pitch and the layout position are standardized.
On the other hand, since a lead interval of about 150 μm is required for mounting the outer leads, the inner test pads 4b that are not separated even when cut by the OLB window 2 are arranged in a staggered pattern for each adjacent wiring pattern 5.

In the TCP using the TAB tape 1 having such a structure, before the outer lead is cut, an electric test is performed by an IC socket which is standardly designed using the outer test pad 4a in which the test pad is standardized. The cost of the jig and tool can be reduced. After the outer lead is cut, the outer test pad 4a is cut with the TAB tape 1, but the inner test pad 4b can be used for an electrical test, so that the conventional OLB window shown in FIG. 2 has a test pad 4a only on the outer side of the test pad 4 on the inner side of the TCP.
There is an advantage that evaluation and analysis by an electrical test after mounting on a printed circuit board can be performed by using b. Further, since the inner test pads 4b are arranged in a staggered pattern for each wiring pattern 5, there is also an advantage that high-density board mounting is possible.

FIG. 2 is a plan view of the second embodiment of the present invention. In the second embodiment of the present invention, as shown in FIG. 2, the test pads 4b are arranged in a staggered pattern for each wiring pattern 5 adjacent to the inside of the OLB window 2 of the first embodiment shown in FIG.
The bumps 8 made of a metal material are previously formed on the top.

By forming the bumps 8 on the test pads 4b inside the OLB window 2 in this manner, the bumps 8 provided in advance are used when the printed circuit board is mounted, and the thermocompression bonding or co-bonding is performed in the same manner as the inner leads. It can be mounted by crystal bonding and enables high-density mounting.

[0013]

As described above, according to the present invention, a test pad having a standardized pitch and arrangement position is provided on the wiring pattern outside the OLB window of the TAB tape, and the wiring pattern inside the OLB window is provided. By providing the test pads arranged in a zigzag pattern for each adjacent wiring pattern, it is possible to evaluate and analyze by an electrical test after mounting on the printed circuit board, which has the effect of improving quality and shortening the design period. is there.

Further, there is an effect that a high-density printed circuit board can be mounted.

[Brief description of drawings]

FIG. 1 is a plan view of a first embodiment of the present invention.

FIG. 2 is a plan view of a second embodiment of the present invention.

FIG. 3 is a plan view of an example of a conventional TAB tape.

[Explanation of symbols]

 1 TAB tape 2 window for OLB 3 window for ILB 4a, 4b test pad 5 wiring pattern 6 sprocket hole 7 IC pellet 8 bump

Claims (2)

[Claims] 1. A TA of a semiconductor device having an outer lead bonding window and a test pad provided on a wiring pattern outside the outer lead bonding window.
A TAB tape for a semiconductor conductor device, wherein a test pad is also provided on the wiring pattern inside the outer lead bonding window in the B tape. 2. The T of the semiconductor device according to claim 1, wherein each of the test pads provided inside is arranged in a zigzag pattern for each adjacent wiring pattern.
AB tape.