JPH01194430A - Tape carrier for tab - Google Patents

Abstract

PURPOSE:To perform a burn-in test in a tape state as it is by forming in advance an electrode pattern for the test on a tape member. CONSTITUTION:Electrode patterns 10a, 10b are formed along the insides of perforation holes 4 at both lateral side edges of a tape member 1, to be applied with an operation power source voltage for a burn-in test. It is directly connected to at least necessary one (or a plurality of) of lead terminals at devices. The patterns 10a, 10b are formed commonly continuously to the devices, or the pattern 10a is solely formed at each device. The pattern 10b side is commonly continuously formed. A test probe is sequentially connected to corresponding test pad 7c on the member 1 to perform a function test, thereby discriminating the propriety of each semiconductor element 3.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a tape carrier for TAB in a semiconductor integrated circuit device, and more specifically, to a tape carrier for forming a conductor such as a lead terminal on the surface of a flexible film. This invention relates to the improvement of a so-called TAR river carrier as a flexible film substrate.

[Prior art] Electrode bonding technology for this type of integrated circuit device is as follows:
Hitherto, the so-called wire bonding method has been most often and commonly employed, or, more recently, tape carriers have been used. So-called T A B (Tapc
Majority of maLed Boarding) is about to be adopted for eight years.

This S is a tape carrier using this TAB method.

In other words, the general configuration of the TAB Dave carrier is shown in Figure 4 (
a), (b) to FIG. 7.

That is, in the conventional configurations shown in FIGS. 4(a) and 4(b), reference numeral 1 indicates a tape carrier J, (a tape member as a material, for example, an insulating material such as polyimide that provides flexibility). It is made of material and is formed into a long film shape.

Further, reference numeral 2 denotes a center device hole bored in the widthwise central portion of the tape member l, in which a semiconductor element 3 to be described later is mounted and installed, and 4 similarly is provided at a predetermined interval in the widthwise side edge portion of the tape member l. A perforation hole 5 is drilled to surround the center device hole 2 and is used for approximate positioning when bonding with the semiconductor element 3, and is used during outer bonding, which will be described later. There are a plurality of outer lead holes used, and each of these outer lead holes 5 is connected via a bridge portion 6 formed corresponding to the four corners of the center device hole 2 (11η).

Further, reference numeral 7 denotes a plurality of glue-top terminals made of a conductive material such as copper, each formed at a predetermined location on the surface of the tape member 1, with the inner end facing the center device hole 2 as indicated by 1Ff. It has an inner lead part 7a, an outer lead part 7b extending outward through each outer lead hole 5, and a test butt part 7C formed at the end of the outer lead part 7b. 8 is a lead support portion that holds each of these lead terminals 7.

In addition, in the figure, 3a is a protruding electrode (bump electrode) formed on the surface of the semiconductor element 3.

In this conventional example, the semiconductor element 3 is mounted on the TAB tape carrier in the following manner.

First, as shown in FIG. 5, in the center device hole 2 of the tape member 1, a protruding electrode 3a of the i-conductor element 3 is placed at a predetermined position on each inner lead portion 7a. This is done by positioning the semiconductor element Y-3 so that they face each other, and in this state, connecting each protruding electrode 3a and each inner lead part 7a of the semiconductor element Y-3 by thermocompression bonding or the like. ), a tape carrier on which the semiconductor element 3 is mounted is constructed.

Next, as shown in FIG. 6, a sealing material 9 such as an epoxy resin is dropped onto the surface of the bonded semiconductor element 3 on the tape carrier constructed in this manner. By curing the conductive element 3
The whole is sealed with resin.

Then, for each of the semiconductor devices 3 manufactured in this way that is continuous in the form of a tape, a test probe is sequentially applied to each corresponding test pad 7C on the tape member IF, and a function test is performed on each of the semiconductor devices 3. By doing this, it is determined whether each semiconductor element 3 is good or bad, and the semiconductor element 3 that is judged to be good is cut and formed using the outer reed part 7b of the tape and placed on the printed circuit board 12 shown in FIG. After mounting with reference etc., after mounting in this way, the printed circuit board 12 is subjected to a current conduction test, that is, a parts in-test.
Defective semiconductor devices 3 are screened.

[Invention or problem to be solved]

However, in a semiconductor device using a TAB tape carrier configured as described above, it is not possible to inject parts while they are in the tape state, so this must be done after mounting on a printed circuit board. ,
If any of the individual semiconductor devices is determined to be defective by this parts inspection, the printed circuit board on which the defective semiconductor device is mounted, as well as the other components on that board, will be disposed of. As a result, manufacturing yields are lowered and costs are increased, and the number of burn-in processes cannot be increased.

This invention was made in order to solve these conventional problems, and its purpose is to make the parts-in-list function ``4-function'' while still in the tape state.This type of TAB The purpose of the present invention is to provide a tape carrier for

[Means for Solving the Three Problems] In order to achieve the above-mentioned object, the TAB tape carrier according to the present invention includes an electrode pattern for parts-in-listing formed on the tape member in advance. This makes it possible to perform part-in-insistance on machining tapes.

That is, the present invention is provided on a tape member serving as a flexible film substrate, and at least a center device hole for mounting a semiconductor element, an outer lead hole surrounding the center device hole, and In the TAB tape carrier provided with each lead terminal connected to the semiconductor element and a test pad portion at the end of each of these leads, an electrode pattern for part-in-instance of the semiconductor element is provided on the tape member. This is a TAB tape carrier characterized by the following:

[For production]

Therefore, in this invention, since the electrode pattern for parts injecting is directly formed on the tape member,
After mounting and installing semiconductor elements.

It is possible to perform part-in-instance with the tape as it is.

〔Example〕

Hereinafter, one embodiment of a TAB tape carrier according to the present invention will be described in detail with reference to FIGS. 1 to 3.

FIGS. 1 and 2 show different T to which this embodiment is applied.
It is a plan configuration diagram showing an outline of an AB tape carrier,
FIG. 3 is a T-plane configuration diagram showing a semi-finished product state in which a semiconductor element is mounted on the same TAB tape layer as described above. The same reference numerals as those in the conventional structure shown in FIGS. 4 to 7 indicate the same or corresponding parts.

That is, also in the embodiment configurations shown in FIGS. 1 to 3, the reference numeral 1 is a tape member formed in the shape of a long film as a tape carrier base material, and 2 is a tape member formed in the width direction of the tape member 1. A center device hole drilled in the center portion for bonding the semiconductor element 3; 4, perforation holes drilled at predetermined intervals in the width direction side edge portions of the tape member l; 5, the center device hole; A plurality of outer reed holes 6 are formed to surround the center device hole 2, and 6 are bridge portions formed corresponding to the four corners of the center device hole 2.

Further, 7 is a plurality of lead terminals formed at predetermined locations on the surface of the tape member 1, 7a is an inner lead portion of the lead terminal 7 facing the center device hole 2, and 7b is the inner lead portion of the lead terminal 7 facing the center device hole 2. an outer lead portion of the lead terminal 7 extending outward through each outer lead hole 5;
7C represents a test pad portion formed at the end of the outer lead portion 7b, and 8 represents a lead support portion for holding each of these lead terminals 7.

Furthermore, lOa and lOb are formed along the inside of each perforation hole 4°4 at both widthwise edge portions of the tape member l, so that an operating power supply voltage V for part-in-insistance can be applied. The electrode pattern shown in FIG. As for job 10a, as shown in FIG. 1, they are formed in common and consecutively for each device part, or as shown in FIG. 2, they are formed one after the other. In this case, the loa side is formed independently for each device part, whereas in this case, the lOb side is formed continuously and in common.

In the TAB tape carrier constructed as in this embodiment, the steps from mounting the semiconductor element 3 to sealing it with resin are exactly the same as in the case of the conventional structure described above. That is, implemented like this,
The configuration of the device after resin sealing is as shown in FIG. 3 in the case of the electrode pattern configuration shown in FIG. 2 described above.

However, in the TAB tape carrier configured as described above, each semiconductor element 3 that is continuous in a tape shape and manufactured by mounting and resin sealing is different from the conventional example. Similarly, first, the tape member 1 F
A test probe is sequentially applied to each of the corresponding test pads 7c, and a function test is performed on each of them to determine whether each semiconductor element 3 is good or bad.

Next, in the embodiment shown in FIG. 3, the electrode pattern IO is
a and the lead terminal 7° connected thereto, that is, the lead connecting portion 10c of the electrode pattern loa,
Alternatively, a pattern is cut between IOb and IOd to create an electrically open state. In addition, although various means can be considered as this pattern cut, in this case, as an example, the through hole 11 was opened.

Next, a parts inspection is carried out with S in this tape state, but in this process, the electrode patterns IOa, IO
By applying an operating power supply voltage V between b, each of the semiconductor elements 3
screening. That is, for example, the power supply voltage of +Vcc may be applied to the electrode pattern IOa side, and the electrode pattern IOb side may be connected to GND. That is, at this time, in this process, adjacent individual electrode patterns loa are connected by, for example, a jig or the like, and a test voltage is applied from one or several locations of each of these electrode patterns loa and job. By simply applying the voltage, it is possible to inject the semiconductor elements 3 of the entire tape that was previously determined to be good, and in this way, only the semiconductor elements 3 that have been screened can be used in the next process, such as printed circuit boards, etc. It will be implemented and installed.

In addition, in the example, a test voltage is applied to m between each electrode pattern.
Although we have only described the static parts-in-test for each semiconductor element, for example, by using a double-sided patterned tape configuration and applying a test signal from the outside, it is possible to test each semiconductor element. It is also possible to perform a dynamic part-in-list operation. Further, in the embodiment, a case has been described in which pattern cutting of a defective semiconductor element is carried out by drilling four holes, but it goes without saying that cutting may be carried out using another method such as a laser trimmer.

〔Effect of the invention〕

As detailed above, according to the present invention, in the TAB tape carrier, the electrode pattern for part-in-instance is directly formed on the tape carrier JJ as a material. After semiconductor elements are mounted and installed on this tape member, it is possible to perform part-in-instance in the tape state, increasing the number of parts processed, and adding value without being mounted on a printed circuit board etc. This makes it possible to screen each semiconductor element in fewer stages, thereby effectively improving the yield during device manufacturing and reducing costs. Even when components are to be mounted at the same time, the S burn-in of six semiconductor elements can be performed individually, expanding the selection range of components to be mounted.Moreover, the structure is relatively simple and easy to implement. It has excellent features such as:

[Brief explanation of the drawing]

FIGS. 1 and 2 are plan configuration diagrams showing the outline of different TAB tape carriers to which an embodiment of the present invention is applied, and FIG. 3 is a diagram showing a semiconductor device mounted on the same TAB tape carrier. 4(a) and 4(b) are perspective views showing an outline of the TAB tape carrier and semiconductor element according to the conventional example, and FIG. A perspective view showing an outline of the state in which a semiconductor element is mounted on a tape carrier for TAB, FIG. 5 is a plan configuration diagram of FIG. 4(b) of the same as above, and FIG.
FIG. 7 is a vertical cross-sectional view schematically showing a state in which a semiconductor element is mounted on a tape carrier and sealed with resin, and FIG. 7 is a vertical cross-sectional view showing the state after mounting on the same printed circuit board. l... Tape member (tape carrier base material), 2...
...Center device hole, 3...Semiconductor element, 4.
... Perforation hole, 5 ... Outer lead hole, 6 ... Bridge portion, 7 ... Lead terminal, 7a
...Inner lead part, 7b...Outer lead part, 7c...Test pad part, 8...Lead support part, 10a, fob...Electrode pattern,
lOc, lOd --- Lead concatenation part, 11...
・4 holes for disconnection. Agent Masuo Oiwa Figure 5 Figure 7

Claims (1)

[Claims] on a tape member as a flexible film substrate,
At least forming a center device hole for mounting a semiconductor element, an outer lead hole surrounding the center device hole, and testing each lead terminal connected to the semiconductor element and the end of each of these leads. 1. A TAB tape carrier provided with a pad portion, characterized in that an electrode pattern for injecting a part of the semiconductor element is formed on the tape member.