JPH05211217A - Manufacture of semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To decrease the number of jugs for a test, and to reduce manhours for the test. CONSTITUTION:A terminal 16 for connection with an external circuit and a power supply wiring 17 connecting the terminal 16 and the through-holes 15 of each semiconductor-device forming region 12 are mounted on a printed board 1. Semiconductor integrated circuit devices 100 are formed at each semiconductor-device forming region 12, and the terminal 16 is connected to a test equipment, etc., and an electrical test is conducted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor integrated circuit device, and more particularly to a method for manufacturing a plastic LCC package type semiconductor integrated circuit device.

[0002]

2. Description of the Related Art Conventionally, in a method of manufacturing a semiconductor integrated circuit device of this type, as shown in FIGS. 3A to 3C as an example, first, a semiconductor chip is mounted on a substrate 11 made of an insulating material. Chip mounting portion 13, a plurality of pattern wirings 14 each having one end adjacent to the chip mounting portion 13 and having a predetermined length toward the outside, and the other end of each pattern wiring 14 A printed circuit board 1b is produced in which a plurality of semiconductor device forming regions 12 each having corresponding through holes penetrating the substrate 11 and filled with a conductive material are formed. A semiconductor chip is mounted on the mounting portion 13, and each electrode of the semiconductor chip and each pattern wiring 14 are correspondingly connected by a bonding line, and the semiconductor chip and the semiconductor chip are connected. Each pattern wiring and the electrodes of 14
A connecting portion including a bonding line between and, and a package 2 in which each pattern wiring 14 is encapsulated are formed, and then a line that connects substantially the center lines of the through holes 15 of each semiconductor device forming region 12 is formed. A plurality of semiconductor integrated circuit devices 100, which are cut independently of each other, are formed and an electrical test including a BT test is performed.

[0003]

In this conventional method of manufacturing a semiconductor integrated circuit device, the semiconductor integrated circuit device 100 is separated from the printed circuit board 1b to be independent, and an electrical test is performed on these. Therefore, a jig such as a test socket is required for each semiconductor integrated circuit device 100, and the jig is required to be attached.
There is a problem that the cost of jigs and the like increases and the number of man-hours for testing increases.

An object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit device which can reduce the cost of jigs and the like and the number of man-hours for testing.

[0005]

According to a method of manufacturing a semiconductor integrated circuit device of the present invention, a chip mounting portion for mounting a semiconductor chip on a substrate made of an insulating material, one end of each of which is adjacent to the chip mounting portion. A plurality of pattern wirings provided with a predetermined length toward the outside, and corresponding to the other ends of each of these pattern wirings, respectively, are provided and penetrate through the substrate and are filled with a conductive material. And a plurality of semiconductor device forming regions each having a through hole, a terminal for external circuit connection, and a power supply wiring connecting the terminal and the corresponding through hole of each semiconductor device forming region. And a semiconductor chip is mounted on the chip mounting portion, and each electrode of the semiconductor chip and each of the pattern wirings are correspondingly connected to each other. A second step of forming a connecting portion between each electrode of the semiconductor chip and each pattern wiring, and a package in which each pattern wiring is enclosed, and connecting the terminal to an external circuit to electrically connect the terminals. A third step of performing a static test, and forming a plurality of independent semiconductor integrated circuit devices by cutting each of the through holes in the semiconductor device forming regions with a line connecting the predetermined positions after the electrical test is completed. And 4 steps.

Further, a plurality of terminals for external connection are provided on the substrate, and a plurality of signal wirings are provided to connect these terminals to the corresponding through holes of the semiconductor device forming regions, respectively. have.

[0007]

Embodiments of the present invention will now be described with reference to the drawings.

1A to 1C are plan views of a semiconductor integrated circuit device shown in the order of manufacturing steps for explaining the first embodiment of the present invention.

In this embodiment, first, a chip mounting portion 13 for mounting a semiconductor chip on a substrate 11 made of an insulating material, one end of each of which is provided in the vicinity of the chip mounting portion 13 and has a predetermined outer surface. A plurality of pattern wirings 14 each having a length, and through holes 15 respectively corresponding to the other ends of the respective pattern wirings 14 and penetrating the substrate 11 and filled with a conductive material are provided. A printed circuit board 1 including a plurality of semiconductor device forming regions 12, a terminal 16 for connecting an external circuit, and a power supply wiring 17 connecting the terminal 16 and the corresponding through hole 15 of each semiconductor device forming region 12 is provided. To manufacture.

Next, a semiconductor chip is mounted on the chip mounting portion 13, and each electrode of this semiconductor chip and each pattern wiring 1
4 and correspondingly connected by bonding wires,
This semiconductor chip, a connection part including a bonding line between each electrode of the semiconductor chip and each pattern wiring 14, and the package 2 in which each pattern wiring 14 is enclosed are formed.

Then, the terminal 16 is connected to an external circuit such as a tester to conduct an electrical test, and after this electrical test is completed,
The through holes 15 of each semiconductor device formation region 12 are cut substantially at the center line by connecting lines to form a plurality of independent semiconductor integrated circuit devices 100.

In this embodiment, since a plurality of semiconductor integrated circuit devices 100 can be electrically tested with one printed circuit board, the number of jigs for connecting with external circuits can be reduced.
Also, the number of man-hours for the test can be reduced.

FIG. 2 is a plan view of a printed circuit board for explaining the second embodiment of the present invention.

In the second embodiment, a plurality of external connection terminals 16 are provided on the back surface of the substrate 11, and the terminals 16 and the predetermined through holes of the semiconductor device forming regions 12 respectively correspond to each other. A plurality of signal wirings 18 to be connected are provided. The surface side is the same as in the first embodiment.

With such a structure, a higher electrical test can be performed.

[0016]

As described above, according to the present invention, a printed circuit board is provided with a terminal for connecting to an external circuit, and a wiring for connecting the terminal to a through hole in each semiconductor device forming region, thereby forming each semiconductor device. After the semiconductor integrated circuit device is formed in the region, the terminal is connected to a test device or the like to perform an electrical test, and the semiconductor integrated circuit device is separated from the printed board, so that the electrical characteristics of the plurality of semiconductor integrated circuit devices are increased. Since the physical test can be performed with one printed circuit board, there is an effect that the number of test jigs can be reduced and the number of test steps can be reduced.

[Brief description of drawings]

FIG. 1 is a plan view of a semiconductor integrated circuit device shown in the order of manufacturing steps for explaining a first embodiment of the present invention.

FIG. 2 is a plan view of a printed circuit board for explaining a second embodiment of the present invention.

FIG. 3 is a plan view of the semiconductor integrated circuit device in the order of manufacturing steps for explaining a conventional method for manufacturing a semiconductor integrated circuit device.

[Explanation of symbols]

 1, 1a, 1b Printed circuit board 2 Package 11 Substrate 12 Semiconductor device forming area 13 Chip mounting portion 14 Pattern wiring 15 Through hole 16 Terminal 17 Power supply wiring 18 Signal wiring 100 Semiconductor integrated circuit device

Claims (3)

[Claims] 1. A chip mounting portion for mounting a semiconductor chip on a substrate made of an insulating material, and a plurality of chip mounting portions each having one end provided in proximity to the chip mounting portion and having a predetermined length toward the outside. A plurality of semiconductor device formation regions, each of which has a pattern wiring and a through hole which is connected to the other end of each of the pattern wirings and which penetrates through the substrate and is filled with a conductive material; A first step of manufacturing a printed circuit board including a circuit connecting terminal and a power supply wiring connecting the terminal and a corresponding through hole of each of the semiconductor device forming regions; and mounting a semiconductor chip on the chip mounting portion. Then, the respective electrodes of this semiconductor chip and the respective pattern wirings are connected to each other,
A second step of forming the semiconductor chip, a connecting portion between each electrode of the semiconductor chip and each pattern wiring, and a package in which each pattern wiring is enclosed, and connecting the terminal to an external circuit. And a third step of conducting an electrical test by means of an electrical test, and after the electrical test is completed, a plurality of independent semiconductor integrated circuit devices are formed by cutting each through hole of each semiconductor device forming region with a line connecting the predetermined positions. And a fourth step of manufacturing the semiconductor integrated circuit device. 2. A plurality of terminals for external connection are provided on a substrate, and a plurality of signal wirings are provided to connect these terminals to the corresponding through holes of the semiconductor device forming regions, respectively. Item 2. A method for manufacturing a semiconductor integrated circuit device according to item 1. 3. The method of manufacturing a semiconductor integrated circuit device according to claim 2, wherein the power supply wiring is provided on the first surface of the substrate, and the signal wiring is provided on the second surface of the substrate.