JP2542636B2 - Film carrier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Object of the Invention (Field of Industrial Application) The present invention relates to a film carrier used when a semiconductor chip is mounted on a substrate or the like by a tape carrier method.

(Prior Art) In recent years, with the development of semiconductor technology, thinning and high-density mounting of semiconductor chips has been advanced due to the demand for making electronic devices small and highly functional. For example, in an IC card or the like, which is important to be small and thin, it is essential to mount a semiconductor chip directly on the card by a tape carrier method (TAB).

In such a tape carrier system, a large number of semiconductor chips are mounted on a film carrier 1 as shown in FIG. 4, for example.

A large number of holes 3 for mounting a semiconductor chip are formed in the film carrier 1 in the length direction of the film carrier 1, and one surface of the film carrier 1 is connected to the respective electrode pads of the semiconductor chip from the outside. A plurality of leads 5 for applying signals to the semiconductor chip are provided in the respective holes 3
It is formed for each. The leads 5 formed for one hole 3, that is, the leads 5 connected to one semiconductor chip are individually formed while being insulated from each other, and formed for each hole 3. Even the formed leads 5 are individually insulated and insulated from each other.

The semiconductor chip is connected to the leads 5 formed in the respective holes 3 of the tape carrier 1 as described above, and is mounted by being sealed with the resin sealing material 7 as shown in FIG. 5 (A). As shown in FIG. 5B, it is made thin.

(Problems to be Solved by the Invention) As described above, in the conventional film carrier,
Since each lead 5 is electrically independently formed, it is often used for screening, and burn-in for removing an initial malfunction by performing an operation test for a certain period of time under a rated or stricter operation condition. ) Is performed with the semiconductor chip mounted on the film carrier, each lead 5 is attached to each semiconductor chip.
A predetermined voltage must be applied via the. Therefore, performing the burn-in to a large number of semiconductor chips with the semiconductor chips mounted on the film carrier is
It became extremely difficult, and it was difficult to eliminate the initial malfunction in the state where the semiconductor chip was mounted on the film carrier.

Further, in the conventional film carrier, since the leads 5 are formed electrically independently and individually, the semiconductor chip of the semiconductor chip due to noise such as surge that may occur in the assembly process is generated. There was a problem that it was easily destroyed.

Therefore, the present invention has been made in view of the above, and an object thereof is to easily perform burn-in in a state where a semiconductor chip is mounted on a film carrier and to have resistance to surge noise in an assembling process. It is to provide a film carrier that can increase the cost.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the present invention provides a film in which a large number of semiconductor chips are connected to a plurality of leads for connecting the semiconductor chips to the outside and mounted. In the carrier, a conductive line connected to the power supply lead of each semiconductor chip and applied with a predetermined potential from the outside, and a conductive line connected to the ground lead of each semiconductor chip and applied with a predetermined potential from the outside And a conductive line connected to corresponding input / output leads of each semiconductor chip and to which a predetermined potential is applied from the outside.

(Operation) In the above configuration, according to the present invention, a large number of semiconductor chips are mounted on a film carrier, and a predetermined potential is applied to the large number of semiconductor chips via conductive lines connected to corresponding leads of the respective semiconductor chips. They are applied at the same time.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

1A and 1B are views showing a film carrier according to an embodiment of the present invention, and FIG. 1A is a view showing one surface of the film carrier. B)
FIG. 6 is a diagram showing the other surface of the film carrier.

In FIGS. 1A and 1B, the film carrier 11 is made of an insulating resin such as polyimide, and the film carrier 11 is provided with a number of holes 13 for mounting semiconductor chips. .

Further, around the hole portion 13 formed in the film carrier 11, along with each side of the hole portion 13, after mounting the semiconductor chip on the film carrier 11, the semiconductor chip is easily cut out from the film carrier 11 and separated. A cutting hole 15 for cutting is formed. Further, on the left and right edge portions of the film carrier 11, a large number of feed holes 17 for moving the film carrier 11 during processes such as assembly, test and mounting are formed in the length direction of the film carrier, The feed hole 17 enables the film carrier 11 to move the hole portion 13 of the film frame by frame by using a feeding device (not shown).

On one surface of the film carrier 11, for example, a plurality of leads 19 made of a metal foil such as tin-plated copper foil are provided with a predetermined pitch so as to be orthogonal to the two opposite sides of each hole 13. Has been formed. One end of each of these leads 19 projects and faces the hole 13 so as to be connected corresponding to each electrode pad of the semiconductor chip when the semiconductor chip is mounted on the film carrier 11. .

In addition, on one surface of the film carrier 11, conductive lines 21 and 23 are formed in the length direction of the film carrier 11 between the feeding hole 17 and the other tip of the lead 19. The line 21 is electrically connected to each of the leads 19a for providing a power supply potential to the semiconductor chip among the plurality of leads 19 formed on one side of each hole 13, and the line 21 is connected to the line 21. Are supplied with a power supply potential from the outside. The line 23 is electrically connected to each lead 19b of the plurality of leads 19 formed on the other side of each hole 13 that grounds the semiconductor chip, for example. And can be grounded.

On the other hand, on the other surface of the film carrier 11, a plurality of conductive lines 25 are formed between the feed hole 17 and the cutout hole portion 15 in the length direction of the film carrier 11. These lines 25 are leads formed on both sides of the hole 13.
Of the 19 lines, they are formed corresponding to the respective leads 19c for input / output signals excluding the leads 19a and 19b for power supply and ground, and each line 25 inputs / outputs an input / output signal to / from the outside. It is supposed to be done.

These lines 25 pass through the through holes 27 formed at the intersections of the respective lines 25 and the leads 19c, along the periphery of the through holes 27 as shown in FIG. As shown in the figure, the leads 19c formed on one surface of the film carrier are electrically connected so as to fill the through holes.

In such a structure, the leads 19a for power supply and the leads for grounding formed on the film carrier 11 respectively.
19b and the leads 19c for input and output are the corresponding lines.
Since they are commonly connected via 21,23,25, when a large number of semiconductor chips are mounted on the film carrier 11, they are simultaneously connected to a large number of semiconductor chips mounted via the lines 21,23,25 from the outside. A predetermined voltage can be applied. Therefore, it is possible to simultaneously burn-in a large number of semiconductor chips with a large number of semiconductor chips mounted on the film carrier 11.

Furthermore, by grounding the lines 21, 23, 25 formed on the film carrier 11 in the assembly process, it is possible to reduce the effect of surge noise that may occur during the assembly process on the semiconductor chip. Become.

[Effects of the Invention] As described above, according to the present invention, a predetermined potential is applied to a large number of semiconductor chips mounted on a film carrier via conductive lines connected to corresponding leads of the respective semiconductor chips. Since they are applied at the same time, the work process in burn-in of a large number of semiconductor chips mounted on the film carrier is simplified, burn-in can be easily performed, and surge resistance in the assembly process can be improved. Therefore, the reliability can be improved.

[Brief description of drawings]

1A and 1B are views showing the structure of a film carrier according to an embodiment of the present invention, FIGS. 2 and 3 are views showing the connection between leads and lines, and FIG. Is a view showing one structure of a conventional film carrier, and FIGS. 5 (A) and 5 (B) are views showing a film carrier on which a semiconductor chip is mounted. 11 …… Film carrier 19 …… Lead 21,23,25 …… Line

Claims (1)

(57) [Claims] 1. A film carrier in which a large number of semiconductor chips connected to a power supply lead, a grounding lead, and an input / output signal lead, which are independently provided for each semiconductor chip, are mounted. A first common line commonly connected to the power supply lead and applied with a predetermined potential, and a second common line commonly connected to the ground lead of each semiconductor chip and applied with a predetermined potential. A line and a line commonly connected to corresponding input / output signal leads of each semiconductor chip are provided for all input / output signal leads of each semiconductor chip, and a predetermined potential is applied. A film carrier having three common lines.