JP2629642B2 - Printed wiring board for remodeling - Google Patents
Printed wiring board for remodelingInfo
- Publication number
- JP2629642B2 JP2629642B2 JP7065606A JP6560695A JP2629642B2 JP 2629642 B2 JP2629642 B2 JP 2629642B2 JP 7065606 A JP7065606 A JP 7065606A JP 6560695 A JP6560695 A JP 6560695A JP 2629642 B2 JP2629642 B2 JP 2629642B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- pattern
- remodeling
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0286—Programmable, customizable or modifiable circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、電子機器またはコンピ
ュータ等に用いられる半導体素子を実装し、これら半導
体素子との他の基板との接続配線を変更するようにした
改造用印刷配線基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a remodeled printed wiring board on which semiconductor elements used in electronic equipment or computers are mounted, and connection wiring between these semiconductor elements and other boards is changed.
【０００２】[0002]
【従来の技術】この種の技術の一例が特開昭５７−１８
７９９８号公報に示されている。この公報には、第１の
基板２の上に形成された改造用信号線導体７ａ〜７ｅお
よびその端部に設けられた改造用パッド８ａ〜８ｆを備
えた第２の基板１を有している。2. Description of the Related Art An example of this kind of technology is disclosed in Japanese Patent Laid-Open No. 57-18 / 1982.
No. 7998. This publication includes a second substrate 1 having remodeling signal line conductors 7a to 7e formed on a first substrate 2 and remodeling pads 8a to 8f provided at ends thereof. I have.
【０００３】[0003]
【発明が解決しようとする課題】このような従来の技術
では、高密度実装に伴い第２の基板１に改造用パッドを
設けることができず、改造が困難であった。また、改造
機能を残すと、高密度実装を実現するのが困難であっ
た。With such a conventional technique, it is difficult to provide a remodeling pad on the second substrate 1 in accordance with high-density mounting, and thus remodeling is difficult. Also, if the remodeling function is left, it is difficult to realize high-density mounting.
【０００４】本発明の目的は、実装用印刷配線基板の高
密度実装を可能にした改造用印刷配線基板を提供するこ
とにある。An object of the present invention is to provide a modified printed wiring board which enables high-density mounting of the mounted printed wiring board.
【０００５】本発明の他の目的は、改良された改造用印
刷配線基板を提供することにある。It is another object of the present invention to provide an improved remodeled printed circuit board.
【０００６】[0006]
【課題を解決するための手段】 本発明の改造用印刷配
線基板は、半導体チップとプリント配線基板との間に位
置し、前記半導体チップと電気的に接続されたリードを
挿通するための複数のスルーホールと、これらスルーホ
ールのそれぞれの周辺部に配置されてこれら周辺部を電
気的に接続するように基板表面に配置され切断可能なパ
ターンと、このパターンの端部に設けられ外部と電気的
に接続可能な線材を接着しうるようにしたパッドとを含
み、前記スルーホールは前記半導体チップと前記プリン
ト配線基板との間を電気的に接続するリードを挿通す
る。Means for Solving the Problems A remodeled printed wiring board of the present invention is located between a semiconductor chip and a printed wiring board, and includes a plurality of leads for inserting leads electrically connected to the semiconductor chip. A through-hole, a pattern disposed on the surface of the substrate so as to be electrically connected to these through-holes and disposed on the periphery of each of the through-holes, and a pattern provided at an end of the pattern and electrically connected to the outside; And a pad capable of adhering a wire that can be connected to the semiconductor chip, and the through hole penetrates a lead for electrically connecting the semiconductor chip and the printed wiring board.
【０００７】本発明の印刷配線基板の改造方法は、半導
体チップと電気的に接続されたリードを挿通するための
複数のスルーホールと、これらスルーホールのそれぞれ
の周辺部に配置されてこれら周辺部を電気的に接続する
ように基板表面に配置され切断可能なパターンと、この
パターンの端部に設けられ外部と電気的に接続可能な線
材を接着しうるようにしたパッドとを含み、前記スルー
ホールが前記半導体チップとプリント配線基板との間を
電気的に接続するリードを挿通する印刷配線基板におい
て、前記パターンを切断することにより電気回路を形成
するThe method for remodeling a printed wiring board according to the present invention comprises a plurality of through-holes for inserting leads electrically connected to a semiconductor chip, and a plurality of through-holes arranged around each of these through-holes. A cutable pattern disposed on the surface of the substrate so as to electrically connect them, and a pad provided at an end of the pattern so that a wire that can be electrically connected to the outside can be bonded, An electric circuit is formed by cutting the pattern in a printed wiring board in which a hole is inserted through a lead for electrically connecting the semiconductor chip and the printed wiring board.
【０００８】[0008]
【実施例】次に本発明の一実施例について図面を参照し
て詳細に説明する。Next, an embodiment of the present invention will be described in detail with reference to the drawings.
【０００９】図１を参照すると、本発明の一実施例であ
る改造用プリント配線基板１は、ＬＳＩ等半導体素子７
のリード６を貫通させる複数列に配置されたスルーホー
ル３、このスルーホール３の周辺部には導体、例えば銅
のような金属で囲まれている。このスルーホール周辺の
導体部は互いにパターン４で接続されている。このパタ
ーン４は本実施例では２列であるが、これに限定されな
い。このパターン４の一端はスルーホール３の周辺部で
あり、他端はパッド２が形成されている。このパッド２
には、線材５が電気的に接続される。Referring to FIG. 1, a remodeled printed circuit board 1 according to an embodiment of the present invention includes a semiconductor element 7 such as an LSI.
The through holes 3 are arranged in a plurality of rows through which the leads 6 pass. The periphery of the through holes 3 is surrounded by a conductor, for example, a metal such as copper. The conductors around the through hole are connected to each other by a pattern 4. The pattern 4 has two rows in this embodiment, but is not limited to this. One end of the pattern 4 is a peripheral portion of the through hole 3, and the other end is formed with a pad 2. This pad 2
Is electrically connected to the wire 5.
【００１０】次に本発明の一実施例の実装方法について
図面を参照して詳細に説明する。Next, a mounting method according to an embodiment of the present invention will be described in detail with reference to the drawings.
【００１１】図１および図２を参照すると、改造用プリ
ント配線基板１のスルーホール３は、ＬＳＩ７のリード
６の貫通しうる間隔で設けられている。ＬＳＩ７がプリ
ント配線基板８に取り付けられるとき、改造用プリント
配線基板１のスルーホール３にＬＳＩ７のリード６が挿
通され、改造用プリントカード１はＬＳＩ７とプリント
配線基板８の間に位置する。ＬＳＩ７はリード６、スル
ーホール３周辺の導体部、パターン４、パッド２および
線材５を介して他と電気的に接続される。電気回路を形
成する際、接続不要なスルーホール３とはパターン４が
切断されることにより所望の電気回路が実現される。例
えば、パターン４の切断は、改造用プリント配線基板１
表面の削り取りであってもよい。Referring to FIGS. 1 and 2, the through holes 3 of the remodeled printed wiring board 1 are provided at intervals that allow the leads 6 of the LSI 7 to penetrate. When the LSI 7 is mounted on the printed wiring board 8, the leads 6 of the LSI 7 are inserted into the through holes 3 of the modified printed wiring board 1, and the modified printed card 1 is located between the LSI 7 and the printed wiring board 8. The LSI 7 is electrically connected to the other via the leads 6, the conductor around the through hole 3, the pattern 4, the pad 2, and the wire 5. When an electric circuit is formed, a desired electric circuit is realized by cutting the pattern 4 from the through hole 3 which does not need to be connected. For example, the cutting of the pattern 4 is performed by modifying the printed wiring board 1 for remodeling.
The surface may be shaved.
【００１２】[0012]
【発明の効果】本発明は、実装用印刷配線基板に改造布
線用パッドを設けることが不要となり、改造配線を行い
ながら実装用印刷配線基板のより高密度な実装をするこ
とができるという効果がある。According to the present invention, it is not necessary to provide a modified wiring pad on the printed wiring board for mounting, and the printed wiring board for mounting can be mounted at a higher density while performing the modified wiring. There is.
【図１】本発明の一実施例を示す図である。FIG. 1 is a diagram showing one embodiment of the present invention.
【図２】本発明の一実施例の実装を説明するための図で
ある。FIG. 2 is a diagram for explaining an implementation of an embodiment of the present invention.
１ 改造用プリント配線基板 ２ パッド ３ スルーホール ４ パターン ５ 線材 ６ リード ７ ＬＳＩ ８ プリント配線基板 DESCRIPTION OF SYMBOLS 1 Printed circuit board for remodeling 2 Pad 3 Through hole 4 Pattern 5 Wire 6 Lead 7 LSI 8 Printed circuit board
Claims (2)
に位置し、 前記半導体チップと電気的に接続されたリードを挿通す
るための複数のスルーホールと、 これらスルーホールのそれぞれの周辺部に配置され、こ
れら周辺部を電気的に接続するように基板表面に配置さ
れ切断可能なパターンと、 このパターンの端部に設けられ外部と電気的に接続可能
な線材を接着しうるようにしたパッドとを含み、 前記スルーホールは前記半導体チップと前記プリント配
線基板との間を電気的に接続するリードを挿通すること
を特徴とする改造用印刷配線基板。1. A plurality of through holes, which are located between a semiconductor chip and a printed wiring board and through which leads electrically connected to the semiconductor chip are inserted, and are arranged at respective peripheral portions of these through holes. A pattern arranged on the surface of the substrate so as to electrically connect these peripheral portions and a cuttable pattern, and a pad provided at an end portion of the pattern and capable of bonding a wire that can be electrically connected to the outside. The printed circuit board for remodeling, wherein a lead for electrically connecting the semiconductor chip and the printed circuit board is inserted through the through hole.
ことを特徴とする印刷配線基板の改造方法。 2. The printed circuit board according to claim 1, wherein said pattern is cut to form an electric circuit.
A method for remodeling a printed wiring board, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7065606A JP2629642B2 (en) | 1995-03-24 | 1995-03-24 | Printed wiring board for remodeling |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7065606A JP2629642B2 (en) | 1995-03-24 | 1995-03-24 | Printed wiring board for remodeling |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08264908A JPH08264908A (en) | 1996-10-11 |
| JP2629642B2 true JP2629642B2 (en) | 1997-07-09 |
Family
ID=13291852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7065606A Expired - Fee Related JP2629642B2 (en) | 1995-03-24 | 1995-03-24 | Printed wiring board for remodeling |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2629642B2 (en) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5538078A (en) * | 1978-09-11 | 1980-03-17 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
| JPS62136101A (en) * | 1985-12-10 | 1987-06-19 | Matsushita Electric Ind Co Ltd | Microwave equipment |
| JPH02197188A (en) * | 1989-01-26 | 1990-08-03 | Nec Corp | Printed wiring board |
| JPH06164079A (en) * | 1992-11-18 | 1994-06-10 | Hitachi Constr Mach Co Ltd | Printed wiring board for array type ultrasonic search unit |
-
1995
- 1995-03-24 JP JP7065606A patent/JP2629642B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08264908A (en) | 1996-10-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19970225 |
|
| LAPS | Cancellation because of no payment of annual fees |