JPH07105668B2 - Semiconductor integrated circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an operational amplifier circuit composed of a semiconductor integrated circuit, and more particularly to a drive circuit for driving its output stage.

[Prior Art] FIG. 4 is a connection diagram showing an example of a conventional circuit of this kind. In the figure, Q1, Q6, Q7, Q10, and Q30 are npn transistors, Q2 and Q5 are pnp transistors, and R1 and R2, respectively. , R6 and R10 are resistors, and C1 and C2 are capacitors. VCC is a positive power supply terminal and VEE is a negative power supply terminal.

An output stage in which npn transistor Q1 and pnp transistor Q2 are connected between VCC and VEE so as to form a complementary circuit is driven by Q30. The input is level shifted by Q10 and added to the base of Q30. pnp transistor
Q5 constitutes a constant current circuit. C1 and C2 are provided for phase correction.

The setting of the current flowing in Q1 and Q2 when there is no signal can be determined by the reverse saturation current ratio of Q1, Q2, Q6 and Q7 or the values of R1 and R2 and the value of R6. When the collector current of Q30 decreases,
The base current of Q1 increases by the decrease, and the current flowing from VCC to the output increases. When the collector current of Q30 increases, the current flowing from the emitter of Q2 through its base to Q30 increases, and the current flowing from the output to VEE via Q2 increases.

By the way, the pnp transistor is
te) Even in the case of a transistor, its current amplification factor is low, so in the mode where current flows from the output to QEE through Q2
The voltage gain of the circuit increases, and the operation becomes unstable due to the large voltage gain, phase rotation, and feedback coupling.

FIG. 5 is a connection diagram showing another example of a conventional circuit, in which the same symbols as in FIG. 4 indicate the same or corresponding portions, Q3, Q4, Q8 are npn transistors respectively, and R3, R4, R11, R12 are resistors respectively. , C1
1 is a capacitor. The C11-R12 circuit is a circuit for phase correction. The main difference of the circuit of FIG. 5 from the circuit of FIG. 4 is that Q3 for driving Q1 and Q4 for driving Q2 are separately provided. The npn transistor Q8 is provided for base current compensation of Q1 and Q6. The circuit of FIG. 5 does not become unstable even in the mode in which current flows from the output to QEE via Q2. However, in the circuit of FIG. 5, there is no resistor equivalent to R6, so when there is no signal, Q1, Q2
There is a problem in that the current flowing through can not be set by R6.

Although Q6 and Q7 in FIGS. 4 and 5 correspond to each other, in the case of FIG. 5, it is necessary to make the emitter area of these transistors approximately three times that in the case of FIG. Further, the resistors R1 and R2 in FIGS. 4 and 5 correspond to each other, but in the case of FIG. This means that it is difficult to reduce the size of the IC chip.

[Problems to be Solved by the Invention] As described above, in the conventional circuit shown in FIG. 4, the operation may become unstable, and in the conventional circuit shown in FIG. There is a problem in that it is difficult to set the output current). The present invention has been made to solve the above-mentioned problems in the conventional one,
An object is to obtain an operational amplifier circuit which operates stably and whose output idling current can be easily set.

[Means for Solving the Problems] In the present invention, a resistor R6 is connected in series to Q6 of the conventional circuit shown in FIG. 5, and the same as Q7 at the position corresponding to Q7 in FIG.
Q9 is provided, and the idling current bias circuit is composed of Q6, Q7, Q9, and R6 to facilitate the setting of idling current.

Embodiments Embodiments of the present invention will be described below with reference to the drawings. First
The figure is a connection diagram showing an embodiment of the present invention. In FIG. 1, the same reference numerals as those in FIGS. 4 and 5 denote the same or corresponding portions, and the npn transistor Q9 is a transistor similar to Q7 in FIG. Yes, Q7 in FIG. 1 is a transistor corresponding to Q7 in FIG. 5, but the collector of Q7 in FIG.
Is different from the case of FIG. The collector voltages of Q3 and Q4 are made constant by connecting the bases of Q9 and Q7 to each other.

An output andring current bias circuit is composed of Q6, Q9, Q7, and R6, but if the output current capacity is about 20mA, the emitter area of the transistors Q6, Q9, Q7 will be about 400μm ² and Q6, Q9 , R6 can be made into the same pocket, so it is easy to make a small chip. If the current amplification factor of Q1 is large, Q3 and Q4 become constant current operation and the operation is stabilized.

Normally, when a semiconductor device is manufactured by a standard npn bipolar process, the performance of the pnp transistor is inferior to that of the npn transistor. Therefore, like the operation in the circuit shown in FIG. 1, when current flows through Q2, Q3, Q
Keeping the current of 4 constant is effective for stabilizing the operation.

2 and 3 are connection diagrams of operational amplifiers to which the present invention is applied. In FIG. 2, the same reference numerals as those in FIG. 1 denote the same parts, and Q101, Q102, and Q103 are pnp transistors, Q104, and Q104, respectively.
Q105 is an npn transistor, R103, R104, and R105 are resistors, and C104 is a bypass capacitor.

IN + is a non-inverted signal input terminal and IN- is an inverted signal input terminal. The signal amplified by the differential amplifier circuit composed of Q101 and Q102 becomes a single-ended signal by Q103 and Q104, and is added to the base of Q10. The first operation after Q10
This is as explained regarding the figure. FIG. 3 shows a portion of the circuit for generating the bias of Q5 and Q103, but since this circuit is the same as the conventional one, its explanation is omitted.

[Effects of the Invention] As described above, according to the present invention, the operation when the output current flows is stable, the output idling current can be easily set, the weak point of the output pnp transistor is covered, and the small chip performs high-speed operation. An amplifier circuit can be configured.

[Brief description of drawings]

FIG. 1 is a connection diagram showing an embodiment of the present invention, FIGS. 2 and 3 are connection diagrams of an operational amplifier to which the present invention is applied, and FIG. 4 is a connection diagram showing an example of a conventional circuit. The figure is a connection diagram showing another example of a conventional circuit. Q1, Q3, Q4, Q6, Q7, Q9, Q10 ... npn transistors,
Q2, Q5 ... pnp transistors, R1, R2, R3, R4, R6 ...
… Each resistance. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A np is provided between the positive power supply terminal VCC and the negative power supply terminal VEE.
An output circuit consisting of an n-transistor Q1 and a pnp-transistor Q2 connected in a complementary manner.The emitter is connected to VEE via a resistor R3, and the signal voltage is applied to the base of the npn transistor Q3. Connected and its base is Q
3 npn transistor Q4 connected to the base, pnp transistor Q5 whose base is biased to a constant current and whose emitter is connected to VCC to operate as a constant current circuit, whose collector is connected to the collector of Q5 and whose emitter is a resistor R6
Npn transistor Q6, which is connected to the collector of Q3 via Q3, connects the collector of Q5 and the collector of Q6 to the base of Q1, and configures the first drive circuit. The collector of Q5 has its collector connected to the collector of Q3. Npn transistor Q9, whose emitter is connected to the collector and its base is connected to the emitter of Q6, a base current circuit connecting the collector of Q9 and the base of Q6, the collector is connected to VCC and the emitter is connected to the collector of Q4 And a second drive circuit constituted by connecting an npn transistor Q7 whose base is connected to the base of Q9, and a collector of Q4 to the base of Q2, and a semiconductor integrated circuit.