JPH0690664B2 - Barrel shifter circuit - Google Patents

Description

The present invention relates to a barrel shifter circuit formed into a CMOS circuit in a semiconductor integrated circuit.

[Conventional technology]

Traditionally, this type of barrel shifter circuit is based on TTL standard logic I
It was constructed using a C or TTL gate array.
FIG. 3 is a conceptual diagram of the operation of a conventional barrel shifter circuit.
The barrel shifter circuit is a circuit that shifts the data on the N data buses by an arbitrary shift amount.

[Problems to be Solved by the Invention]

The conventional barrel shifter circuit described above uses a large number of TTL standard logic ICs or uses a highly integrated and expensive gate array to cope with the increased number of bits of the data bus for improving the performance of the electronic computer. Must be used,
There is a drawback in that the system cost becomes high due to an increase in mounting area and power consumption. Therefore, among the semiconductor integrated circuits that have a good result in high-density integration, a barrel shifter circuit using a CMOS type semiconductor integrated circuit with particularly low power consumption has been desired.

An object of the present invention is to provide a barrel shifter circuit which solves such problems, reduces the mounting area, consumes less power, and can be constructed at low cost.

[Means for Solving the Problems]

According to the structure of the present invention, in a barrel shifter circuit composed of a plurality of transfer gates on a semiconductor integrated circuit of CMOS structure, P-channel transistor groups and N-channel transistor groups forming the transfer gates are arranged in a matrix respectively. The two transistor groups are separately arranged.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention. In the figure, 11 is an N-channel transistor (the gate does not have a circle), 12 is a P-channel transistor (the gate has a circle), 1 to 4 (IN) is a data input line, and 5 to 8 (OUT).
Is a data output line, and 20 to 23 (shift) are shift amount selection input lines. In the circuit of this embodiment, the transistor array 13 surrounded by the dotted line is all N-channel type, and the transistor array 14 surrounded by the other dotted lines is all P-channel type. Since the boundary region for separating these P-channel type and N-channel type transistors 11 and 12 can be minimized, high integration can be achieved in the CMOS type semiconductor integrated circuit.

Although the present embodiment shows the case where each of the input and output data lines is four, the number can be any number as long as it is two or more.

FIG. 2 is a circuit diagram of a second embodiment of the present invention. This embodiment is an inverter circuit that amplifies the output signal of the first embodiment.
16 is an example that is incorporated. In this embodiment, since the inverter circuit 16 drives the data output lines 5 to 8, the fan-out (FAN OUT) design is facilitated and the inverter circuit 16
Like the transfer gate, the transistor groups that make up the transistor can be separately arranged, and the boundary area is smaller than when the barrel shifter circuit and the output amplifier circuit are individually designed, which has the advantage that higher integration can be obtained. is there.

〔The invention's effect〕

As described above, according to the present invention, by forming the circuit into CMOS, it is possible to realize one chip by high integration, and
This has the effect of reducing power consumption.

[Brief description of drawings]

FIG. 1 is a barrel shifter circuit diagram of an embodiment of the present invention,
FIG. 2 is a circuit diagram of a barrel shifter with an inverter output circuit according to a second embodiment of the present invention, and FIG. 3 is an operation conceptual diagram of a conventional barrel shifter circuit. 1 to 4 ... input signal line (IN), 5 to 8 ... output signal line (OUT), 11 ... N-channel transistor, 12 ... P-channel transistor, 13 ... N-channel transistor,
14 ... P-channel transistor, 15 ... Control signal inverter circuit, 16 ... Output signal amplification inverter circuit, 20-
23 …… Shift amount selection input line.

Claims (1)

[Claims] 1. In a barrel shifter circuit composed of a plurality of transfer gates on a semiconductor integrated circuit having a CMOS structure, P-channel transistor groups and N-channel transistor groups forming the transfer gates are arranged in a matrix respectively. A barrel shifter circuit characterized in that these two transistor groups are separately arranged.