JPH0684689A - Multilayer capacitor - Google Patents

Multilayer capacitor

Info

Publication number
JPH0684689A
JPH0684689A JP25737392A JP25737392A JPH0684689A JP H0684689 A JPH0684689 A JP H0684689A JP 25737392 A JP25737392 A JP 25737392A JP 25737392 A JP25737392 A JP 25737392A JP H0684689 A JPH0684689 A JP H0684689A
Authority
JP
Japan
Prior art keywords
electrode
internal
electrodes
internal electrode
inner electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP25737392A
Other languages
Japanese (ja)
Other versions
JP2784862B2 (en
Inventor
Takafumi Tanaka
貴文 田中
Hideki Kabasawa
英樹 樺澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP25737392A priority Critical patent/JP2784862B2/en
Publication of JPH0684689A publication Critical patent/JPH0684689A/en
Application granted granted Critical
Publication of JP2784862B2 publication Critical patent/JP2784862B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To suppress fluctuation of capacity at the time of muss-production by providing fine stripe electrodes for suppressing difference in equipotential distribution caused by the difference in position and number of first and second inner electrodes. CONSTITUTION:First inner electrode 2 is formed wider than a second inner electrode 3. Fine stripe electrodes 8 are arranged on the opposite sides of the second inner electrode 3 on same imaginary plane as the second inner electrode 3. The fine stripe electrodes 8 are then connected with an outer electrode 7 connected with the inner electrode 3 while being arranged to be aligned substantially with the side edge of the inner electrode 2 when viewed from the direction normal to the imaginary plane. This constitution suppresses difference in equipotential distribution caused by the difference in position and number of the first and second inner electrodes 2, 3 thus suppressing fluctuation in the capacity of multilayer capacitor at the time of mass-production.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は奇数個の内部電極を有す
る積層コンデンサに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer capacitor having an odd number of internal electrodes.

【0002】[0002]

【従来の技術】積層コンデンサにおいて内部電極のパタ
ーンずれに基づく容量変化を防ぐために対向する対の内
部電極の内の一方を幅狭に形成することがある。図12
及び図13はこの種の積層コンデンサを示す。図12及
び図13において磁器誘電体1の中に設けられた第1の
内部電極2は第2の内部電極3よりも幅広に形成されて
いる。この例では幅広の第1の内部電極2が2枚設けら
れ、誘電体1の第1の側面4の第1の外部電極5にそれ
ぞれ接続されている。幅狭の第2の内部電極3は第2の
側面6の第2の外部電極7に接続されている。積層コン
デンサをこの様に構成すると、積層時において第1の内
部電極2と第2の内部電極3との間に多少のパターンず
れが生じても第1の内部電極2と第2の内部電極3との
対向面積を一定に維持することができ、容量変化が生じ
ない。
2. Description of the Related Art In a multilayer capacitor, one of a pair of internal electrodes facing each other may be formed with a narrow width in order to prevent a capacitance change due to a pattern shift of the internal electrodes. 12
13 and 14 show a multilayer capacitor of this type. In FIGS. 12 and 13, the first internal electrode 2 provided in the porcelain dielectric 1 is formed wider than the second internal electrode 3. In this example, two wide first internal electrodes 2 are provided and connected to the first external electrodes 5 on the first side surface 4 of the dielectric 1, respectively. The narrow second internal electrode 3 is connected to the second external electrode 7 on the second side surface 6. If the multilayer capacitor is configured in this way, even if a slight pattern shift occurs between the first internal electrode 2 and the second internal electrode 3 during lamination, the first internal electrode 2 and the second internal electrode 3 The area facing each other can be kept constant, and the capacitance does not change.

【0003】[0003]

【発明が解決しようとする課題】ところで、図12に示
すような積層コンデンサを材料の節約を図るように量産
すると、図13と図14とに示す2種類の構成の積層コ
ンデンサが生じる。図14の積層コンデンサは1枚の幅
広の内部電極2と2枚の幅狭の内部電極3とから成るの
で、電極間の等電位分布曲線が図13と異なる。この結
果、図13と図14の2種類の積層コンデンサの容量値
に相違が生じる。なお、内部電極の積層数が偶数の場合
には上述のような問題が生じないが、要求される容量及
び寸法等の関係で積層数を奇数にすることが必要にな
る。
By the way, when a multilayer capacitor as shown in FIG. 12 is mass-produced so as to save material, two types of multilayer capacitors shown in FIGS. 13 and 14 are produced. Since the multilayer capacitor of FIG. 14 is composed of one wide internal electrode 2 and two narrow internal electrodes 3, the equipotential distribution curve between the electrodes is different from that of FIG. As a result, the capacitance values of the two types of multilayer capacitors shown in FIGS. 13 and 14 differ. When the number of laminated internal electrodes is even, the above problem does not occur, but it is necessary to make the number of laminated layers odd because of the required capacity and size.

【0004】図13と図14の2種類の積層コンデンサ
が生じる理由を次に説明する。積層コンデンサを製造す
る場合には、同一のグリーンシートの上に第1の内部電
極2のための導電層パターンと第2の内部電極3のため
の導電層パターンとを同一のスクリーンを使用して同時
に印刷するのが一般的である。この様に印刷すれば、第
1及び第2の内部電極2、3の厚み等を同一にすること
ができ、容量のバラツキを抑制することができる。第1
及び第2の内部電極2、3を同時に印刷する方法におい
て、図13の構造のみの積層コンデンサを作製すれば、
第2の内部電極3を有するグリーンシートが1枚余り、
不経済になる。また、図14の構造のみの積層コンデン
サを作製すれば、第1の内部電極2のグリーンシートの
みが1枚余り、不経済になる。そこで、すべてのグリー
ンシートを使用すれば、必然的に図13及び図14の2
種類の積層コンデンサが生じる。
The reason why the two types of multilayer capacitors shown in FIGS. 13 and 14 are produced will be described below. When manufacturing a multilayer capacitor, a conductive layer pattern for the first internal electrode 2 and a conductive layer pattern for the second internal electrode 3 are formed on the same green sheet using the same screen. It is common to print at the same time. By printing in this way, it is possible to make the first and second internal electrodes 2, 3 have the same thickness and the like, and suppress variations in capacitance. First
And a method of printing the second internal electrodes 2 and 3 at the same time, if a multilayer capacitor having only the structure of FIG.
There is one more green sheet with the second internal electrode 3,
Become uneconomical. Further, if a multilayer capacitor having only the structure of FIG. 14 is manufactured, only one green sheet of the first internal electrode 2 is left, which is uneconomical. Therefore, if all the green sheets are used, the 2
Types of multilayer capacitors arise.

【0005】本発明の目的は、図13及び図14の2種
類の積層コンデンサの容量のバラツキを抑制することが
できる積層コンデンサを提供することにある。
An object of the present invention is to provide a multilayer capacitor which can suppress the variation in capacitance between the two types of multilayer capacitors shown in FIGS. 13 and 14.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
の本発明は、互いに対向する第1及び第2の側面を有す
る誘電体と、前記誘電体の内部の互いに平行な3以上の
奇数個の仮想平面にそれぞれ設けられた奇数個の内部電
極と、前記第1の側面に形成され且つ前記奇数個の内部
電極の内の奇数番目の第1の内部電極に接続された第1
の外部電極と、前記第2の側面に形成され且つ前記奇数
個の内部電極の内の偶数番目の第2の内部電極に接続さ
れた第2の外部電極とを備えた積層コンデンサにおい
て、前記第1の内部電極と前記第2の内部電極との内の
一方の内部電極が他方の内部電極よりも幅広に形成さ
れ、前記他方の内部電極と同一の仮想平面において前記
他方の内部電極の側方の両側に細条電極が配置され、前
記細条電極は前記他方の内部電極が接続されている外部
電極に対して接続され、前記細条電極は前記仮想平面に
対して垂直な方向から見て前記一方の内部電極の側縁に
ほぼ一致するように配置されていることを特徴とする積
層コンデンサに係わるものである。
SUMMARY OF THE INVENTION To achieve the above object, the present invention provides a dielectric having first and second side surfaces facing each other and an odd number of three or more parallel to each other inside the dielectric. An odd number of internal electrodes respectively provided on the virtual plane of the first internal electrode and a first internal electrode formed on the first side surface and connected to an odd-numbered first internal electrode of the odd number of internal electrodes.
Of the external electrodes and a second external electrode formed on the second side surface and connected to an even-numbered second internal electrode of the odd-numbered internal electrodes. One internal electrode of the first internal electrode and the second internal electrode is formed wider than the other internal electrode, and is located laterally of the other internal electrode in the same virtual plane as the other internal electrode. Strip electrodes are disposed on both sides of the strip electrode, the strip electrode is connected to an external electrode to which the other internal electrode is connected, and the strip electrode is viewed from a direction perpendicular to the virtual plane. The present invention relates to a multilayer capacitor, which is arranged so as to substantially coincide with a side edge of the one internal electrode.

【0007】[0007]

【作用及び効果】本発明に係わる細条電極は、第1の内
部電極と第2の内部電極との位置及び数の相違による等
電位分布の相違を低減させる作用を有する。このため、
量産時における容量のバラツキを少なくすることができ
る。
FUNCTION AND EFFECT The strip electrode according to the present invention has the function of reducing the difference in equipotential distribution due to the difference in position and number between the first internal electrode and the second internal electrode. For this reason,
It is possible to reduce variations in capacity during mass production.

【0008】[0008]

【実施例】次に、図1〜図9を参照して本発明の実施例
に係わる積層コンデンサ及びこの製造方法を説明する。
図1〜図6に示す積層コンデンサは、図12の従来の積
層コンデンサと同様に、磁器誘電体1と、幅広の2枚の
第1の内部電極2と、幅狭の1枚の第2の内部電極3
と、対向する第1及び第2の側面4、6に設けられた第
1及び第2の外部電極5、7とから成る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a multilayer capacitor according to an embodiment of the present invention and a manufacturing method thereof will be described with reference to FIGS.
Similar to the conventional multilayer capacitor of FIG. 12, the multilayer capacitor shown in FIGS. 1 to 6 has a porcelain dielectric 1, two wide first internal electrodes 2 and one narrow second second electrode. Internal electrode 3
And first and second external electrodes 5 and 7 provided on the first and second side surfaces 4 and 6 facing each other.

【0009】3個(奇数個)の内部電極2、3は図2の
A−A線における第1の仮想平面と、B−B線の第2の
仮想平面と、C−C線の第3の仮想平面とにそれぞれ配
置されている。第1、第2、第3の仮想平面は互いに平
行であり、且つ直方体の誘電体1の両主面に対しても平
行である。図3、図4及び図5は第1、第2及び第3の
仮想平面における内部電極2、3のパターンを示す。
The three (odd number) internal electrodes 2 and 3 are the first virtual plane on the line AA in FIG. 2, the second virtual plane on the line BB, and the third on the line CC. Are arranged on the virtual plane and. The first, second, and third virtual planes are parallel to each other and also to both main surfaces of the rectangular parallelepiped dielectric 1. 3, 4, and 5 show patterns of the internal electrodes 2, 3 on the first, second, and third virtual planes.

【0010】A−A線の第1の仮想平面とC−C線の第
3の仮想平面即ち奇数番目の仮想平面の第1の内部電極
2は長方形に形成されており、幅広の第1の幅W1 を有
する。B−B線の第2の仮想平面即ち偶数番目の仮想平
面の第2の内部電極3は長方形に形成されており、幅狭
の第2の幅W2 を有する。図3から明らかなように第1
の内部電極2と第3の内部電極3とは仮想平面に対して
垂直な方向から見た時に重なり合う部分を有するように
配置され、第2の内部電極3の重なり合い領域(コンデ
ンサ有効領域)の両側縁は第1の内部電極2の中に収ま
っている。従って、第2の内部電極3が仮想平面におい
て幅方向に少しずれたとしても、第1の内部電極2の対
向領域からはみ出すことが防止され、容量変化が生じな
い。
The first internal electrode 2 of the first virtual plane of the line AA and the third virtual plane of the line C-C, that is, the odd-numbered virtual plane is formed in a rectangular shape, and the first wide electrode is wide. It has a width W1. The second internal electrode 3 of the second virtual plane of the line B-B, that is, the even-numbered virtual plane is formed in a rectangular shape and has a narrow second width W2. As is clear from FIG.
The internal electrode 2 and the third internal electrode 3 are arranged so as to have an overlapping portion when viewed from the direction perpendicular to the virtual plane, and both sides of the overlapping area (capacitor effective area) of the second internal electrode 3 The edges are contained within the first inner electrode 2. Therefore, even if the second internal electrode 3 is slightly displaced in the width direction on the virtual plane, it is prevented from protruding from the facing region of the first internal electrode 2, and the capacitance does not change.

【0011】しかし、単に幅広の第1の内部電極2と幅
狭の第2の内部電極3との組み合せ構造であれば、図1
3及び図14の構成の相違に基づく容量のバラツキを解
消することができない。そこで、本実施例では、幅狭の
第2の内部電極3の両側縁に平行に対の細条電極8が設
けられている。対の細条電極8の外側の縁の相互間の幅
W3 は第1の内部電極2の幅W1 とほぼ同一に設定され
る。従って、第1及び第2の内部電極2、3が理想的に
積層された場合には、図3に示すように第1の内部電極
2の両側縁に一致して対の細条電極8が配置されてい
る。細条電極8は幅狭の第2の内部電極3と同様に第2
の外部電極7に接続されている。従って、細条電極8と
第1の内部電極2との間に補正用電界分布を得ることが
できる。しかし、細条電極8は極めて細い電極であり、
この面積は微小であるので、第1の内部電極2との対向
に基づく静電容量は極めて小さい。細条電極8と幅狭の
第2の内部電極3との間には細条電極8の幅よりも大き
く且つ通常のコンデンサ製造時に生じる幅方向のパター
ンずれ以上のスペース(無電極領域)が設けられてい
る。従って、第1及び第2の内部電極2、3の幅方向の
パターンずれが生じても容量はほとんど変化しない。
However, if the structure is simply a combination of the wide first internal electrode 2 and the narrow second internal electrode 3, FIG.
3 and the variation in capacitance due to the difference in the configuration of FIG. 14 cannot be eliminated. Therefore, in this embodiment, a pair of strip electrodes 8 are provided in parallel to both side edges of the second inner electrode 3 having a small width. The width W3 between the outer edges of the pair of strip electrodes 8 is set to be substantially the same as the width W1 of the first inner electrode 2. Therefore, when the first and second internal electrodes 2 and 3 are ideally stacked, a pair of strip electrodes 8 are formed on both side edges of the first internal electrode 2 as shown in FIG. It is arranged. The strip electrode 8 is the same as the narrow second internal electrode 3 in the second
Is connected to the external electrode 7. Therefore, a correction electric field distribution can be obtained between the strip electrode 8 and the first internal electrode 2. However, the strip electrode 8 is an extremely thin electrode,
Since this area is minute, the electrostatic capacitance based on the facing of the first internal electrode 2 is extremely small. A space (an electrodeless region) larger than the width of the strip electrode 8 and larger than the pattern deviation in the width direction generated during normal capacitor manufacturing is provided between the strip electrode 8 and the narrow second inner electrode 3. Has been. Therefore, the capacitance hardly changes even if the pattern displacement in the width direction of the first and second internal electrodes 2 and 3 occurs.

【0012】細条電極8はコンデンサの量産時に生じる
図6と図7の2種類の構造のコンデンサの容量のバラツ
キを解消する作用を有する。図6は図2〜図5に対応す
る構造を示し、従来の図13に対応するものであり、図
7は従来の図14に対応するものである。図7では幅広
の第1の内部電極2を中心に上下に幅狭の第2の内部電
極3が細条電極8を伴なって配置されている。既に説明
したようにグリーンシートの有効利用を図ると図6と図
7の両方のコンデンサが得られる。しかし、細条電極8
が幅狭の第2の内部電極3の両側に配置されているの
で、第1及び第2の内部電極2、3の両側縁の相互間の
電界分布がほぼ同一状態になり、図6及び図7のコンデ
ンサの容量の差が少なくなる。
The strip electrode 8 has a function of eliminating the variation in the capacitance of the capacitors having the two types of structures shown in FIGS. 6 and 7 during mass production of the capacitors. FIG. 6 shows a structure corresponding to FIGS. 2 to 5, which corresponds to FIG. 13 of the related art, and FIG. 7 corresponds to FIG. 14 of the related art. In FIG. 7, a second internal electrode 3 having a narrow width is arranged vertically with a first internal electrode 2 having a wide width, together with a strip electrode 8. As described above, when the green sheet is effectively used, both the capacitors shown in FIGS. 6 and 7 can be obtained. However, the strip electrode 8
Are arranged on both sides of the second inner electrode 3 having a narrow width, the electric field distributions on both side edges of the first and second inner electrodes 2 and 3 are substantially the same, and FIG. The difference in capacitance between the capacitors of No. 7 is reduced.

【0013】図8及び図9は図1〜図6のコンデンサの
製造方法の1例を原理的に示す。磁器材料と有機バイン
ダとから成るスラリを作り、このスラリからドクターブ
レード法等で長手のグリーンシート(未焼成磁器シー
ト)10を作り、このグリーンシート10の上にスクリ
ーンを使用して導電性ペーストを塗布することによって
第1及び第2の内部電極2、3及び細条電極8に対応す
る導電層2a、3a、8aを形成する。図8のP1 から
P3 までの区間の導電性ペーストの印刷は1枚のスクリ
ーンを使用して同時に行う。これにより、導電層2a、
3a、8aを均一に形成することができる。この印刷が
終了したら同一のスクリーンを使用してP3 より後の領
域にP1 〜P3 と同一パターンの導電層2a、3a、8
aを繰返して形成する。印刷が終了したら、P1 、P2
、P3 でグリーンシート10を切断する。これによ
り、第1の内部電極用導電層2aを有する第1のグリー
ンシート11と、第2の内部電極用導電層3aと細条電
極用導電層8aを有する第2のグリーンシートとが複数
枚得られる。
FIG. 8 and FIG. 9 show in principle an example of a method of manufacturing the capacitors of FIGS. A slurry made of a porcelain material and an organic binder is made, and a long green sheet (unfired porcelain sheet) 10 is made from this slurry by a doctor blade method or the like, and a conductive paste is formed on the green sheet 10 using a screen. By applying, conductive layers 2a, 3a, 8a corresponding to the first and second internal electrodes 2, 3 and the strip electrode 8 are formed. Printing of the conductive paste in the section from P1 to P3 in FIG. 8 is performed simultaneously using one screen. Thereby, the conductive layer 2a,
3a, 8a can be formed uniformly. After this printing is completed, the conductive layers 2a, 3a, 8 having the same pattern as P1 to P3 are formed in the area after P3 using the same screen.
a is repeatedly formed. After printing, P1, P2
, P3 to cut the green sheet 10. As a result, a plurality of first green sheets 11 having the first inner electrode conductive layer 2a and a plurality of second green sheets having the second inner electrode conductive layer 3a and the strip electrode conductive layer 8a are formed. can get.

【0014】次に、図9に示すように、第1及び第2の
グリーンシート11、12を積層すると共にカバー用グ
リーンシート13を積層し、これを圧着し、破線で示す
位置を切断して成形体(生チップ)を得、これを焼成
し、最後に外部電極5、7を形成する。図9のように積
層すれば図6の構造の積層コンデンサが得られる。図9
では第1のグリーンシート11が2枚であるのに対し、
第2のグリーンシート12は1枚である。図8では第1
及び第2のグリーンシート11、12を同時に形成して
いるので、第2のグリーンシート12が1枚余ることに
なる。この第2のグリーンシート12の余りを防ぐため
に、図7の積層構造のコンデンサも作る。
Next, as shown in FIG. 9, the first and second green sheets 11 and 12 are laminated and the cover green sheet 13 is laminated, and this is pressure-bonded and cut at a position indicated by a broken line. A molded body (raw chip) is obtained, and this is fired, and finally the external electrodes 5 and 7 are formed. When laminated as shown in FIG. 9, the laminated capacitor having the structure shown in FIG. 6 is obtained. Figure 9
Then, while there are two first green sheets 11,
The number of the second green sheets 12 is one. In FIG. 8, the first
Also, since the second green sheets 11 and 12 are formed at the same time, one second green sheet 12 is left. In order to prevent the excess of the second green sheet 12, the capacitor having the laminated structure shown in FIG. 7 is also manufactured.

【0015】[0015]

【変形例】本発明は上述の実施例に限定されるものでな
く、例えば次の変形が可能なものである。 (1) 図10に示すように幅狭の第2の内部電極3と
細条電極8とを外部電極7の近傍で相互に連結し、外部
電極7に対する細条電極8の接続の信頼性を向上させる
ことができる。 (2) 図11に示すように、幅狭の第2の内部電極3
の有効電極領域14と外部電極7との間に幅狭の連結領
域15を設け、第1の内部電極2の先端16の投影が連
結領域15を横切るように構成することができる。この
場合には、第1及び第2の内部電極2、3が図11の左
右方向にずれても、両者の対向面積の変化が少ないの
で、容量変化も少ない。 (3) 第1及び第2の内部電極2、3を3よりも多い
奇数個積層する場合にも本発明を適用することができ
る。
MODIFICATION The present invention is not limited to the above-mentioned embodiments, and the following modifications are possible. (1) As shown in FIG. 10, the narrow second internal electrode 3 and the strip electrode 8 are connected to each other in the vicinity of the external electrode 7 to improve the reliability of connection of the strip electrode 8 to the external electrode 7. Can be improved. (2) As shown in FIG. 11, the second internal electrode 3 having a narrow width is used.
A narrow connecting region 15 may be provided between the effective electrode region 14 and the external electrode 7 so that the projection of the tip 16 of the first internal electrode 2 crosses the connecting region 15. In this case, even if the first and second internal electrodes 2 and 3 are displaced in the left-right direction in FIG. 11, there is little change in the area where they face each other, so there is little change in capacitance. (3) The present invention can be applied to the case where an odd number of first and second internal electrodes 2 and 3 larger than 3 is stacked.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施例の積層コンデンサを示す斜視図である。FIG. 1 is a perspective view showing a multilayer capacitor of an example.

【図2】図1のコンデンサの中央縦断面図である。FIG. 2 is a central vertical cross-sectional view of the capacitor of FIG.

【図3】図2のA−A線断面図である。3 is a cross-sectional view taken along the line AA of FIG.

【図4】図2のB−B線断面図である。FIG. 4 is a sectional view taken along line BB in FIG.

【図5】図2のC−C線断面図である。5 is a cross-sectional view taken along line CC of FIG.

【図6】図2のD−D線断面図である。6 is a cross-sectional view taken along the line DD of FIG.

【図7】図6の内部電極の積層順番を変えた場合を図6
と同様に示す断面図である。
FIG. 7 shows a case where the stacking order of the internal electrodes of FIG. 6 is changed.
It is sectional drawing shown similarly to.

【図8】図1のコンデンサを製造するための導電層のパ
ターンを有するグリーンシートを示す平面図である。
8 is a plan view showing a green sheet having a pattern of a conductive layer for manufacturing the capacitor of FIG.

【図9】図1のコンデンサを製造するためのグリーンシ
ートの積層を示す断面図である。
9 is a cross-sectional view showing a stack of green sheets for manufacturing the capacitor of FIG.

【図10】変形例の内部電極のパターンを図4と同様に
示す断面図である。
FIG. 10 is a cross-sectional view showing a pattern of internal electrodes of a modified example similar to FIG.

【図11】別の変形例の内部電極のパターンを図4と同
様に示す断面図である。
FIG. 11 is a cross-sectional view showing a pattern of internal electrodes of another modified example similar to FIG.

【図12】従来の積層コンデンサを図3と同様に示す断
面図である。
FIG. 12 is a cross-sectional view showing a conventional multilayer capacitor similar to FIG.

【図13】図12のE−E線に対応する部分の断面図で
ある。
13 is a cross-sectional view of a portion corresponding to line EE in FIG.

【図14】図13の内部電極の積層順番を変えた構造を
図13と同様に示す断面図である。
14 is a cross-sectional view showing a structure in which the stacking order of the internal electrodes of FIG. 13 is changed, similar to FIG.

【符号の説明】[Explanation of symbols]

2 第1の内部電極 3 第2の内部電極 4 細条電極 2 1st internal electrode 3 2nd internal electrode 4 Strip electrode

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 互いに対向する第1及び第2の側面を有
する誘電体と、 前記誘電体の内部の互いに平行な3以上の奇数個の仮想
平面にそれぞれ設けられた奇数個の内部電極と、 前記第1の側面に形成され且つ前記奇数個の内部電極の
内の奇数番目の第1の内部電極に接続された第1の外部
電極と、 前記第2の側面に形成され且つ前記奇数個の内部電極の
内の偶数番目の第2の内部電極に接続された第2の外部
電極とを備えた積層コンデンサにおいて、 前記第1の内部電極と前記第2の内部電極との内の一方
の内部電極が他方の内部電極よりも幅広に形成され、 前記他方の内部電極と同一の仮想平面において前記他方
の内部電極の側方の両側に細条電極が配置され、 前記細条電極は前記他方の内部電極が接続されている外
部電極に対して接続され、 前記細条電極は前記仮想平面に対して垂直な方向から見
て前記一方の内部電極の側縁にほぼ一致するように配置
されていることを特徴とする積層コンデンサ。
1. A dielectric having first and second side surfaces facing each other, and an odd number of internal electrodes provided on three or more odd virtual planes parallel to each other inside the dielectric, respectively. A first external electrode formed on the first side surface and connected to an odd-numbered first internal electrode of the odd-numbered internal electrodes; and an odd-numbered first external electrode formed on the second side surface. A multilayer capacitor having a second outer electrode connected to an even-numbered second inner electrode of the inner electrodes, wherein one of the first inner electrode and the second inner electrode The electrode is formed wider than the other internal electrode, the strip electrodes are arranged on both sides of the other internal electrode in the same virtual plane as the other internal electrode, and the strip electrode is the other of the other internal electrodes. Connected to the external electrode to which the internal electrode is connected The thin strip electrode is arranged so as to substantially coincide with a side edge of the one internal electrode when viewed from a direction perpendicular to the virtual plane.
JP25737392A 1992-08-31 1992-08-31 Multilayer capacitors Expired - Lifetime JP2784862B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25737392A JP2784862B2 (en) 1992-08-31 1992-08-31 Multilayer capacitors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25737392A JP2784862B2 (en) 1992-08-31 1992-08-31 Multilayer capacitors

Publications (2)

Publication Number Publication Date
JPH0684689A true JPH0684689A (en) 1994-03-25
JP2784862B2 JP2784862B2 (en) 1998-08-06

Family

ID=17305492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25737392A Expired - Lifetime JP2784862B2 (en) 1992-08-31 1992-08-31 Multilayer capacitors

Country Status (1)

Country Link
JP (1) JP2784862B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010045372A (en) * 2008-08-18 2010-02-25 Avx Corp Ultra broadband capacitor
US8107214B2 (en) * 2008-02-13 2012-01-31 Tdk Corporation Multilayer capacitor array having terminal conductor, to which internal electrodes are connected in parallel, connected in series to external electrodes
US20140177128A1 (en) * 2012-12-20 2014-06-26 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic electronic component
JP2014123695A (en) * 2012-12-20 2014-07-03 Samsung Electro-Mechanics Co Ltd Multilayer ceramic electronic component and method of manufacturing the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8107214B2 (en) * 2008-02-13 2012-01-31 Tdk Corporation Multilayer capacitor array having terminal conductor, to which internal electrodes are connected in parallel, connected in series to external electrodes
JP2010045372A (en) * 2008-08-18 2010-02-25 Avx Corp Ultra broadband capacitor
US20140177128A1 (en) * 2012-12-20 2014-06-26 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic electronic component
JP2014123695A (en) * 2012-12-20 2014-07-03 Samsung Electro-Mechanics Co Ltd Multilayer ceramic electronic component and method of manufacturing the same
US9230738B2 (en) * 2012-12-20 2016-01-05 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic electronic component including a lateral surface and internal electrodes having different distances from the lateral surface
US9484153B2 (en) 2012-12-20 2016-11-01 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic electronic component having a plurality of internal electrodes and method for manufacturing the same

Also Published As

Publication number Publication date
JP2784862B2 (en) 1998-08-06

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