JPH0678226A - Image input device - Google Patents

Abstract

PURPOSE:To make the margin large for switching timing of a switching matrix circuit and to prevent a switching noise in switching from being mixed in a video signal in an image input device in which the correspondence of the position of a readout picture element on a local mask with a signal output line can be always taken and capable of performing the parallel readout of plural picture elements. CONSTITUTION:This device is composed in such a way that a vertical scan circuit 1, a horizontal scan circuit 2, non-destructive readable phototransistors 4-11 to 4-44, signal lines 7-1 to 7-4 connected to the output terminals of the phototransistors 4-11 to 4-44 via horizontal selection switches 6-1a to 6-4d, the switching matrix circuit 8, the signal output lines 10-1 to 10-4, and current/ voltage conversion amplifiers 11-1 to 11-4 connected to the signal output lines 10-1 to 10-4 are provided, and the switching of the signal lines 7-1 to 7-4 are performed by the horizontal selection switches 6-1a to 6-4d in horizontal scan, and the switching of the switching matrix circuit 8 is performed in a horizontal flyback period.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image input device, and more particularly to an image input device intended for use in image processing.

[0002]

2. Description of the Related Art Generally, pre-processing of ordinary image processing in an image input device using a solid-state image pickup device.
Is a neighborhood process that is performed in a region called a local mask around the point of interest having a pixel number of 2 × 2 to 9 × 9, and preprocessing is performed by performing the neighborhood process on the entire image. . Therefore, in order to perform the preprocessing, it is necessary to access the optical signal of each pixel a plurality of times, and in order to further improve the efficiency, it is desired that the optical signals can be accessed in parallel.

Therefore, conventionally, as for the preprocessing of image processing such as edge detection and image smoothing, Japanese Patent Laid-Open No. 62-1 / 1987 has been proposed.
No. 6685, for example, CMD (Charge Mod
ulation device) and SIT (Static Induction Transis)
It has been proposed to perform high-speed processing by using a photoelectric conversion element capable of nondestructive readout of an optical signal such as tor) as a pixel. Pre-processing can be done.

Next, an image preprocessing method in an image input device using a solid-state image pickup device having pixels of such photoelectric conversion elements capable of nondestructive readout of optical signals will be described. FIG. 3 is a diagram showing a circuit configuration of an image input device for explaining a conventional image preprocessing method. The image input device includes a vertical scanning circuit 51, a horizontal scanning circuit 52, and a vertical selection line 53.
-Non-destructive read-out phototransistor group 54 in which the vertical scanning circuit 51 and the control terminal are connected via -1 to 53-4
-11 to 54-44 and horizontal selection switches 56-1a to 56-4 connected to the horizontal scanning circuit 52 through the horizontal selection lines 55-1 to 55-4.
b, signal lines 57-1 to 57-4, switching matrix circuit
58, and signal output lines 59-1 to 59-4.

The vertical scanning circuit 51 includes vertical selection lines 53-1 ...
Generates vertical selection signals Φ _{G1 to} Φ _G4 on 53-4, and the horizontal scanning circuit
The reference numeral 52 is adapted to generate horizontal selection signals Φ _{S1 to} Φ _S4 on the horizontal selection lines 55-1 to 55-4. In this configuration example, the number of pixels is 4 rows × 4 columns and the local mask is 2 × 2 for the sake of simplicity. The output terminals of the phototransistor are, for example, the phototransistor 54-11 to the signal line 57-1 via the horizontal selection switch 56-1a, and the phototransistor 54-21 to the signal line 57-2 via the horizontal selection switch 56-1b.
In this manner, the signal lines are alternately connected to different signal lines in the vertical direction. In the horizontal direction, the first line is the signal line 57-1.
And 57-2, the second column is signal lines 57-3 and 57-4, and the third column is again signal lines 57-1 and 57-2. Connected to the wire.

Next, a method of driving the image input device thus configured will be described. In FIG. 4, the vertical scanning lines 51 are used to select the vertical selection lines 53-1 to 53-4 in one frame period.
Vertical selection signals Φ _{G1 to} Φ _G4 , and the horizontal scanning circuit 52
Horizontal selection signal Φ _S1 given to the horizontal selection lines 55-1 to 55-4 by
6 is a timing chart showing Φ _S4 . In the vertical selection signals Φ _{G1 to} Φ _G4 , 60 is a read pulse for reading the electric charge accumulated in the pixel, and 61 is a reset pulse for resetting the electric charge and returning the pixel to the initial state. As long as the reset pulse 61 is not applied, the pixel signal can be repeatedly read out any number of times. Read pulse 60
When the reset pulse 61 is not applied, the photo-generated charge is always stored in the storage portion. In this state, the phototransistor is off,
No signal current flows. For this operation, for example, CM
The operation of D is described in detail in JP-A-60-206063. Further, the pulse 62 is a horizontal selection pulse. By applying this pulse 62 to the horizontal selection switches 56-1a to 56-4b, the phototransistor and the signal line are
57-1 to 57-4 are connected.

First, from time t ₀ to t ₄ , the vertical selection line 53
The read pulse 60 is applied to -1 to 53-2 to select the first row and the second row. At time t ₁ during that time, the horizontal selection pulse 62 is applied to the horizontal selection lines 55-1 and 55-2, and at this time, the phototransistor 54-11 and the signal line 57 are connected to the signal line 57-1.
The signal of the phototransistor 54-21 is output to the signal line -2, the signal of the phototransistor 54-12 is output to the signal line 57-3, and the signal of the phototransistor 54-22 is output to the signal line 57-4 at the same time in parallel.
The switching matrix circuit 58 includes signal lines 57-1 to 57-4.
Among the four phototransistor signals input in parallel by, connect the signal of the phototransistor located in the upper left to the signal output line 59-1, and connect the signal of the phototransistor located in the lower left to the signal output line 59- 2 and connect the signal from the phototransistor located on the upper right to the signal output line 59
-3, and has the function of connecting the signal of the phototransistor located at the lower right to the signal output line 59-4.

Therefore, at time t ₁ , the signal line 57-1
And signal output line 59-1, signal line 57-2 and signal output line 59-2, signal line 57-3 and signal output line 59-3, signal line 57-4 and signal output line 59-4
Are connected, the signal of the phototransistor 54-11 is output to the signal output line 59-1, the signal of the phototransistor 54-21 is output to the signal output line 59-2, and the signal of the phototransistor 54-12 is output to the signal output line 59-3. Then, the signal of the phototransistor 54-22 is transmitted to the signal output line 59-4.

The necessity of the switching matrix circuit 58 is that the signal output line is determined because the coupling coefficient of each signal is determined at the position on the local mask when the signals are linearly combined in the edge detection and smoothing processing performed in the next stage. This is because it is advantageous in design that the correspondence between the position on the local mask and that on the local mask is fixed.

At the next time t ₂ , the horizontal selection pulse
62 is output to the horizontal selection lines 55-2 and 55-3, the signal of the phototransistor 54-12 is output to the signal output line 59-1, the signal of the phototransistor 54-22 is output to the signal output line 59-2, and the phototransistor 54-22 is output. The signal of 54-13 is output to the signal output line 59-3, and the signal of the phototransistor 54-23 is output to the signal output line 59-4. Next, at time t ₃ , the horizontal selection pulse 62 is output to the horizontal selection lines 55-3 and 55-4, and the signal of the phototransistor 54-13 is output to the signal output line 59-1 and the signal of the phototransistor 54-23 is output. Is output to the signal output line 59-2, the signal of the phototransistor 54-14 is output to the signal output line 59-3, and the signal of the phototransistor 54-24 is output to the signal output line 59-4.

When the first horizontal scanning is completed at time t ₄ , the reset pulse 61 is applied to the vertical selection line 53-1 and the phototransistors 54-11 to 54-14 in the first row are reset. Similarly, by performing the second and third horizontal scans, 4 corresponding to the 2 × 2 local mask is performed.
It becomes possible to scan all pixels while reading the signals of one pixel in parallel.

Therefore, by processing the four signals output in parallel to the respective signal output lines 59-1 to 59-4, high-speed preprocessing becomes possible, and the pixel itself functions as an analog memory for optical signals. The system can be simplified because it also works.

[0013]

However, the conventional image input device having the above-mentioned structure has the following problems. FIG. 5 shows a connection mode between the switching matrix circuit in FIG. 3 and another circuit configuration. The switching matrix circuit 58 needs to have a function of connecting the four signal lines 57-1 to 57-4 and the four signal output lines 59-1 to 59-4, so that the switching matrix circuit 58 is a 4 × 4 switch. Composed. FIG. 6 shows the operation of the switching matrix circuit 58 in the drive operation described above, and the black portion shows that the switch is on. (1,1) is the first
Is the operating state of the switching matrix circuit at the first sampling in the horizontal scanning, ie, at time t ₁ of the timing chart shown in FIG. Also,
(1,2) is the operation state at the time of the second sampling in the first horizontal scan, that is, at time t ₂ in FIG.
(1, 3) is the operation state at the time of the third sampling in the first horizontal scan, that is, at time t ₃ in FIG. Similarly, the operation state in the second horizontal scanning is (2,
1), (2, 2), (2, 3), and (3, 1), (3, 2), (3, 3) show the operation states in the third horizontal scanning, respectively.

As can be seen from the operating state shown in FIG.
The switching matrix circuit in the above configuration switches at the same timing as the horizontal scanning clock. In the case of square pixels, the horizontal scanning clock of the video signal is as high as about 12 MHz even in the NTSC standard, and since it is necessary to switch the switching matrix circuit at the same timing, it is necessary to take accurate synchronization and set the timing. It will be difficult. Further, switching noise when the switching matrix circuit switches is mixed directly into the signal output lines 59-1 to 59-4, which causes a problem of increasing noise of the video signal. This problem becomes more remarkable when high-speed imaging is performed.

Another problem is that the accumulation times of the four pixels in the local mask are different. As a result, for example, when outputting a signal difference between pixels, a difference in signal amount due to a difference in storage time is added, so that there is a drawback that an accurate difference in optical signal cannot be obtained.

The present invention has been made in order to solve the above problems in the conventional image input device, and it is possible to widen the margin of the switching timing of the switching matrix circuit and to prevent the switching noise at the time of switching from being applied to the video signal. It is an object of the present invention to provide an image input device capable of preventing mixture. It is another object of the present invention to provide an image input device capable of correcting an output signal difference due to a difference in storage time for each output signal.

[0017]

In order to solve the above problems, the present invention provides a solid-state image pickup device using non-destructive readable photoelectric conversion elements as pixels, and a solid-state image pickup device at an arbitrary position of the solid-state image pickup device. Pixel signal reading means including a vertical scanning circuit and a horizontal scanning circuit having a horizontal selection switch section for reading signals of a plurality of neighboring pixels in parallel to a plurality of signal lines, and a plurality of signals by the pixel signal reading means Means for outputting the pixel signals read to the lines in parallel to the plurality of signal output lines, and by switching the plurality of signal lines, the plurality of signal output lines and the pixels output to the signal output lines In an image input device in which the relationship with an arbitrary position is always matched, the switching operation of the signal lines during horizontal scanning by the horizontal scanning circuit is performed by the horizontal selection switch of the horizontal scanning circuit. It is to configured to perform at switch unit.

In the image input apparatus thus constructed, the signal line switching operation at the time of horizontal scanning is configured to be performed by the horizontal selection switch section of the horizontal scanning circuit. Therefore, the signal line switching operation in the parallel output means is performed. Can be performed during a horizontal blanking period in which no video signal is taken in. As a result, there is a switching timing margin for the horizontal blanking period, and timing setting is simplified. Further, it is possible to prevent switching noise generated at the time of switching from being mixed into the video signal. Further, by providing a signal amplification amplifier capable of adjusting the amplification factor, it becomes possible to correct the error in the signal amount due to the difference in storage time.

[0019]

EXAMPLES Next, examples will be described. FIG. 1 is a circuit configuration diagram showing an embodiment of an image input device according to the present invention. The image input device of this embodiment is a CMD capable of nondestructive reading in which the vertical scanning circuit 1 and the control terminal are connected through the vertical scanning circuit 1, the horizontal scanning circuit 2, and the vertical selection lines 3-1 to 3-4. Phototransistor group 4-11 to 4-44, etc.
Horizontal selection switches 6-1a to 6-4d in which the horizontal scanning circuit 2 and the control terminal are connected via the horizontal selection lines 5-1 to 5-3.
, Signal lines 7-1 to 7-4, switching matrix circuit 8 controlled by switching signal line 9, signal output line 10
A current signal output to -1～10-4 an amplification factor R ₁ to R ₄ is constituted by a current-voltage conversion amplifiers 11-1 to 11-4 and the signal output terminal 12-1 to 12-4 into a voltage It Then, for simplification of description and for clarifying the correspondence with the conventional image input device shown in FIG. 3, the local mask is shown as 2 × 2 and the number of pixels is shown as 4 rows × 4 columns.

The vertical scanning circuit 1 includes vertical selection lines 3-1 ...
The vertical selection signals Φ _{G1 to} Φ _G4 are generated at 3-4, and the horizontal scanning circuit 2 generates the horizontal selection signals Φ _{S1 to} Φ _S3 at the horizontal selection lines 5-1 to 5-3. The output terminals of the phototransistors 4-11 and 4-31 are connected to the signal line 7-1 through the horizontal selection switch 6-1a and the phototransistors 4-21 and 4-3.
The output terminal of -41 is connected to the signal line 7-2 via the horizontal selection switch 6-1b. The output terminals of the phototransistors 4-12 and 4-32 are horizontal selection switches 6
-2a and 6-2c are connected to the signal lines 7-1 and 7-3, and the output terminals of the phototransistors 4-22 and 4-42 are signal lines through the horizontal selection switches 6-2b and 6-2d. It is connected to 7-2 and 7-4. In addition, phototransistors 4-13, 4
The output terminal of -33 is connected to the signal lines 7-1 and 7-3 via the horizontal selection switches 6-3a and 6-3c, and the output terminals of the phototransistors 4-23 and 4-43 are horizontal selection switches 6-. 3b
, 6-3d to signal lines 7-2, 7-4. Furthermore, the output terminals of the phototransistors 4-14 and 4-34 are connected to the signal line 7-3 via the horizontal selection switch 6-4c.
The output terminals of the phototransistors 4-24 and 4-44 are connected to the signal line 7-4 via the horizontal selection switch 6-4d.

The horizontal selection signal Φ _S1 generated from the horizontal scanning circuit 2 is the horizontal selection switch 6-1a, 6-1b, 6-2.
c, 6-2d, the horizontal selection signal Φ _S2 drives the horizontal selection switches 6-2a, 6-2b, 6-3c, 6-3d, and the horizontal selection signal Φ _S3 outputs the horizontal selection switch 6-3a, 6-3b, 6-4c
, 6-4d.

Further, the switching matrix circuit 8 is
It is composed of an inverting circuit 8-0 and switches 8-1 to 8-8. The switch 8-1 is between the signal line 7-1 and the signal output line 10-2, and the switch 8-2 is between the signal line 7-2. Switch 8-3 between signal output line 10-1
Is connected between the signal line 7-1 and the signal output line 10-1, the switch 8-4 is connected between the signal line 7-2 and the signal output line 10-2, and 8-5 is connected to the signal line 7-3. Switch 8-6 between signal output lines 10-4
Is between the signal line 7-4 and the signal output line 10-3, the switch 8-7 is between the signal line 7-3 and the signal output line 10-3, and the switch 8-8 is between the signal line 7-4 and the signal output line. It is connected between 10-4 respectively. The switches 8-1, 8-2, 8-5 and 8-6 are driven by the signal Φ _I applied to the switching signal line 9 to
-3, 8-4, 8-7 and 8-8 are driven by inverted signals of the signal Φ _I applied to the switching signal line 9 by the inverting circuit 8-0.

Next, the operation of the image input apparatus thus constructed will be described based on the timing chart shown in FIG. FIG. 2 shows vertical selection signals Φ _{G1 to} Φ _G4 given to the vertical selection lines 3-1 to 3-4 by the vertical scanning circuit 1 and a horizontal selection line 5-1 by the horizontal scanning circuit 2 in one frame period.
5 is a timing chart showing horizontal selection signals Φ _{S1 to} Φ _S3 given to ˜5-3. In the vertical selection signals Φ _{G1 to} Φ _G4 ,
Reference numeral 21 is a read pulse for reading the electric charge accumulated in the pixel, and 22 is a reset pulse for resetting the electric charge and returning the pixel to the initial state. As long as this reset pulse 22 is not applied, the signal can be repeatedly read any number of times. When the read pulse 21 and the reset pulse 22 are not applied, the photo-generated electric charge is always stored in the storage unit in each pixel. In this state, the phototransistor is off and the signal current is Not flowing.

The pulse 23 of the horizontal selection signals Φ _{S1 to} Φ _S3 applied to the horizontal selection lines 5-1 to 5-3 is a horizontal selection pulse,
By applying this pulse 23 to the horizontal selection switches 6-1a to 6-4d, each phototransistor and the signal line 7
-1 to 7-4 are connected. Further, when the pulse 20 is output to the signal Φ _I applied to the switching matrix circuit 8 via the switching signal line 9, the switch 8
-1,8-2,8-5,8-6 turn on, otherwise switch 8-3,8-4,8-7,8-8 turn on through inverting circuit 8-0. To do.

First, from time t ₀ to t ₄ , the vertical selection line 3
The read pulse 21 is applied to -1 to 3-2, and the first row and the second row are selected. Further, since the pulse 20 is not applied to the switching signal line 9, in the switching matrix circuit 8, the switches 8-3, 8-4, 8-7,
8-8 is on. In the meantime the time t _1, the horizontal selection pulse 23 is applied to the horizontal selection line 5-1 horizontal selection switch 6-1a, 6-1b, 6-2c, 6-2d are turned on.
At this time, the signal of the phototransistor 4-11 passes through the switch 6-1a, the signal line 7-1 and the switch 8-3, and the signal output line.
In 10-1, the signal of the phototransistor 4-21 passes through the switch 6-1b, the signal line 7-2 and the switch 8-4, and the signal output line.
In 10-2, the signal of the phototransistor 4-12 passes through the switch 6-2c, the signal line 7-3 and the switch 8-7, and the signal output line.
In 10-3, the signal of the phototransistor 4-22 is output through the switch 6-2d, the signal line 7-4 and the switch 8-8.
10-4 are simultaneously output in parallel.

At the next time t ₂ , the horizontal selection pulse
By outputting 23 to the horizontal selection line 5-2, the horizontal selection switches 6-2a, 6-2b, 6-3c, 6-3d are turned on. At this time, the signal of the phototransistor 4-12 is sent to the signal output line 10-1 via the switch 6-2a, the signal line 7-1 and the switch 8-3, and the signal of the phototransistor 4-22 is the switch 6-2b and the signal. The signal of the phototransistor 4-13 is sent to the signal output line 10-2 via the line 7-2 and the switch 8-4, and the signal output line 10 is sent via the switch 6-3c, the signal line 7-3 and the switch 8-7. -3, the signal of the phototransistor 4-23 is simultaneously output in parallel to the signal output line 10-4 via the switch 6-3d, the signal line 7-4 and the switch 8-8.

Further, at time t ₃ , the horizontal selection pulse 23 is output to the horizontal selection line 5-3, so that the horizontal selection switches 6-3a, 6-3b, 6-4c, 6-4d are similarly activated. The signal from the phototransistor 4-13 is turned on, and the signal from the phototransistor 4-23 to the signal output line 10-1 via the switch 6-3a, the signal line 7-1 and the switch 8-3, and the signal from the phototransistor 4-23 to the switch 6-3b. , The signal output line 10-2 via the signal line 7-2 and the switch 8-4, and the signal of the phototransistor 4-14 is output via the switch 6-4c, the signal line 7-3 and the switch 8-7. The signal from the phototransistor 4-24 is simultaneously output to the line 10-3 in parallel via the switch 6-4d, the signal line 7-4 and the switch 8-8 to the signal output line 10-4.

Therefore, during this horizontal scanning period, without switching the switching matrix circuit 8, the signal of the pixel located on the upper left of the local mask on the signal output line 10-1 and the local mask on the signal output line 10-2. The signal of the pixel located at the lower left, the signal of the pixel located at the upper right of the local mask is output to the signal output line 10-3, and the signal of the pixel located at the lower right of the local mask is output to the signal output line 10-4. .

In the next second horizontal scanning, the read pulse 21 of the vertical selection signals Φ _G2 and Φ _G3 is applied to the vertical selection lines 3-2 and 3-3 so that the second and third rows are selected. To be selected. Further, a pulse 20 is applied to the switching signal line 9, and in the switching matrix circuit 8, the switches 8-1,
8-2, 8-5 and 8-6 turn on. When horizontal scanning is performed in this state, the phototransistor 4 is connected to the signal output line 10-1.
-21, 4-22, 4-23, the signal output line 10-2 is phototransistor 4-31, 4-32, 4-33, and the signal output line 10-3 is phototransistor 4-22. , 4-23,
In the order of 4-24, signals are output to the signal output line 10-4 in the order of phototransistors 4-32, 4-33, 4-34. Therefore, even in the second horizontal scanning, the signal output line 10 can be operated without switching the switching matrix circuit 8.
-1 is the signal of the pixel located at the upper left of the local mask, signal output line 10-2 is the signal of the pixel located at the lower left of the local mask, and signal output line 10-3 is the pixel located at the upper right of the local mask. Signal, and the signal of the pixel located at the lower right of the local mask is output to the signal output line 10-4.

In addition, this relationship holds in the third and subsequent horizontal scans. Therefore, switching in the switching matrix circuit 8 can be performed during the horizontal blanking period, whereby switching noise generated in the switching matrix circuit 8 can be prevented from being mixed in the video signal, and the switching timing margin can be maximized. Since the horizontal blanking period can be taken, it becomes easy to synchronize even when high-speed imaging is performed.

Next, the pixel signals output to the signal output lines 10-1 to 10-4 in this manner are converted into current-voltage conversion amplifiers 11-1 to 11-4.
Is converted into a voltage via the output terminals 12-1 to 12-4 and output. By the way, among the four pixels of this local mask, the pixels in different rows are output with different accumulation times. _{Let us assume} that the accumulation time of the upper left pixel of the local mask is t _AC1 , the accumulation time of the lower left pixel of the local mask is t _AC2 , the accumulation time of the upper right pixel of the local mask is t _AC3 , and the accumulation time of the lower right pixel of the local mask. T
_{Assuming AC4} , the relationship between the respective accumulation times is expressed by the following equations (1) to (4). t _AC1 = t _AC1 (1) t _AC2 = t _AC1 −Δ _tv (2) t _AC3 = t _AC1 (3) t _AC4 = t _AC1 -Δ _tv ... (4)

Here, Δ _tv is a vertical scanning period, that is, (t ₅ −t ₀ ) in FIG. Usually, since the accumulated signal amount can be approximated to be proportional to the accumulation time, the ratio of the values of the resistors R ₁ to R ₄ which determines the amplification factor of the current-voltage conversion amplifier 11-1 to 11-4, the equation (1) to (4 ) Is determined by taking the reciprocal of the accumulation time. That is, R ₁ = R ₁ (5) R ₂ = R ₁ × t _{AC 1} / t _{AC 2} (6) R ₃ = R ₁ × t _{AC 1} / t _{AC 3} (7) R ₄ = R ₁ × t _AC1 / t _AC4 (8) As a result, it is possible to correct the error in the signal amount due to the storage time difference in the local mask.

In the above embodiment, an image input device for image processing on the premise of a 2 × 2 local mask has been described for simplification of description, but it goes without saying that the present invention is 3 It can be easily applied to an image input device for image processing using a local mask having a pixel number of × 3 or more, and similar effects can be obtained.

Further, in the above embodiment, the one using the phototransistor with the CMD in mind as the pixel is shown, but the present invention is an image input device using the amplification type image pickup device such as SIT, FGA, AMI as the pixel. Is similarly applicable.

[0035]

As described above on the basis of the embodiments,
According to the present invention, the signal line switching operation at the time of horizontal scanning is configured to be performed by the horizontal selection switch section of the horizontal scanning circuit. Therefore, the signal line switching operation in the parallel output means should be performed during the horizontal blanking period. Therefore, the margin of the switching timing is equal to the horizontal blanking period, and the timing can be easily set, and the switching noise generated at the switching can be prevented from being mixed into the video signal. Further, by providing a signal amplification amplifier capable of adjusting the amplification factor, it is possible to correct the error in the signal amount due to the difference in storage time.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of an image input device according to the present invention.

FIG. 2 is a timing chart for explaining the operation of the embodiment shown in FIG.

FIG. 3 is a circuit configuration diagram showing a configuration example of a conventional image input device.

FIG. 4 is a timing chart for explaining the operation of the conventional image input device shown in FIG.

5 is a diagram showing a connection mode of a switching matrix circuit in the conventional image input device shown in FIG.

6 is a diagram showing an operation mode of the switching matrix circuit shown in FIG.

[Explanation of symbols]

 1 Vertical scanning circuit 2 Horizontal scanning circuit 3-1 to 3-4 Vertical selection line 4-11 to 4-44 Phototransistor 5-1 to 5-3 Horizontal selection line 6-1a to 6-4d Horizontal selection switch 7-1 ~ 7-4 Signal line 8 Switching matrix circuit 10-1 ~ 10-4 Signal output line 11-1 ~ 11-4 Current-voltage conversion amplifier

Claims (6)

[Claims] 1. A solid-state imaging device using a non-destructive readable photoelectric conversion element as a pixel, and signals for reading a plurality of pixels in the vicinity of an arbitrary position of the solid-state imaging device in parallel to a plurality of signal lines. A pixel signal reading means including a vertical scanning circuit and a horizontal scanning circuit having a horizontal selection switch section, and pixel signals read by the pixel signal reading means to a plurality of signal lines are output in parallel to a plurality of signal output lines. And switching means for switching the plurality of signal lines,
In an image input device in which the relationship between the plurality of signal output lines and an arbitrary position of a pixel output to the signal output line is always in correspondence, the signal line at the time of horizontal scanning by the horizontal scanning circuit An image input device characterized in that the switching operation is performed by a horizontal selection switch section of a horizontal scanning circuit. 2. The image input device according to claim 1, wherein the signal lines are switched during vertical scanning of the vertical scanning circuit by the parallel output means within a horizontal blanking period. 3. The image input device according to claim 1, wherein the array configuration of a plurality of pixels near an arbitrary position of the solid-state imaging device is a square pixel array. 4. A non-destructive readable photoelectric conversion element that constitutes a pixel of the solid-state image pickup device, wherein SIT, CM
The image input device according to any one of claims 1 to 3, wherein an amplification type image pickup device such as D, FGA, or AMI is used. 5. The image input device according to claim 1, wherein each of the plurality of signal output lines is provided with a signal amplification amplifier capable of adjusting an amplification factor, and each of the plurality of signal output lines includes: An image input device, wherein a signal difference corresponding to a difference in pixel accumulation time of a plurality of pixel signals output in parallel can be corrected by adjusting an amplification factor of the signal amplification amplifier. 6. The signal amplification amplifier has an amplification factor set based on a pixel accumulation time of one pixel signal among a plurality of pixel signals output in parallel to a plurality of signal output lines. The image input device according to claim 5, wherein