JPH0738814A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To improve the quality of the monitor screen of the solid-state image pickup device by compensating an offset error and a gain error between pixel signals of plural systems. CONSTITUTION:A signal supply circuit 34 supplies the same signal to all of plural read circuits. A correction signal generating circuit 47 generates a correction signal for eliminating the difference in the level of the signal supplied from said signal supply circuit among pixel signals read out of the read circuits. A correcting circuit 45 corrects the levels of the pixel signals read out of the read circuits with the correction signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device, and more particularly to a multiple-output solid-state image pickup device having a plurality of readout circuits.

In recent years, a solid-state image pickup device having a photoelectric conversion element section in which a plurality of light receiving elements are two-dimensionally arranged on a semiconductor substrate and a circuit section for reading out a photoelectrically converted signal has been increasing the number of pixels and achieving high resolution. Has been. With the increase in the number of pixels,
Since the signal reading speed becomes faster and the speed limitation of peripheral circuits and the increase of noise become problems, a solid-state imaging device in which the output is divided into a large number and the signal reading speed is kept low has been proposed.

[0003]

2. Description of the Related Art FIG. 5 shows a circuit diagram of an example of a conventional solid-state image pickup device. In this example, a MOS type element of 4 × 4 pixels and a 2-output type is used for description. In the figure, among the pixels 10 ₁₁ to 10 ₄₄ composed of photodiodes, the line selection lines 12 _{1 to} 12 ₄ connected to the vertical scanning circuit 11 are turned on and the line selection gate 13 is connected to four of the conductive lines. The output signals of the pixels are sent to the vertical signal transmission lines 14 _{1 to} 14 ₄ . The horizontal scanning circuits 15 ₁ and 15 ₂ sequentially turn on the pixel selection lines 16 ₁ and 16 ₂ , 17 ₁ and 17 ₂ to sequentially turn on the pixel selection gates 18 ₁ and 18 ₂ and 19 ₁ and 19 ₂ , respectively, and the preamplifier 20 ₁ , 20 ₂ read out pixel signals respectively. That is, the preamplifier 20 reads the pixel signals of the pixels on the left two columns, and at the same time, the preamplifier 20 reads out the pixel signals.
₂ is for reading the pixel signals of the pixels on the right two columns, and the signal read speed is 1/2 that of one preamplifier.
Can be reduced to

The pixel signals output from the preamplifiers 20 ₁ and 20 ₂ are signal transmission cables 21 ₁ and 21 ₁ shown in FIG.
21 ₂ Through each, the buffer amplifier 2 in the signal processing circuit
3 ₁ , 23 ₂ and supplied to the A / D converters 25 ₁ , 2
5 ₂ after being digitized, is arranged in the image circuit 26 as one screen monitor screen, it is output for display from the terminal 27.

[0005]

As described above, since the preamplifiers 20 ₁ and 20 ₂ output the pixel signals, the offset error occurs between the pixel signals of the two systems due to externally added noise or temperature fluctuation. Also, there is a problem that a gain error occurs and the quality of the monitor screen deteriorates.

The present invention has been made in view of the above points,
An object of the present invention is to provide a solid-state imaging device that compensates for offset errors and gain errors between pixel signals of a plurality of systems and improves the quality of a monitor screen.

[0007]

According to the solid-state image pickup device of the present invention, a plurality of vertical signal transmission lines of a pixel array are divided and connected to a plurality of readout circuits, and the plurality of readout circuits simultaneously time-series pixel signals. In a solid-state imaging device for performing a read operation, a signal supply circuit that supplies the same signal to all of the plurality of read circuits and a pixel signal read from each of the plurality of read circuits that is supplied from the signal supply circuit. A correction signal generation circuit that generates a correction signal that eliminates the level difference from the signal level difference and a correction circuit that corrects the level of the pixel signal read from each of the plurality of readout circuits by the correction signal.

[0008]

In the present invention, the signal transmission cable is used to correct the level of the pixel signal output from each read circuit by generating a correction signal from the level difference of the same signal among the pixel signals output from the plurality of read circuits. It is possible to correct the offset error and the gain error of each read circuit including the above.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a first solid-state image pickup device portion of the device of the present invention.
The circuit diagram of an Example is shown. In the figure, 30 is a pixel array of 7 pixels in the horizontal direction and n pixels in the vertical direction. Pixel array 30
Of these, the output signals of the seven pixels on the line selected by the vertical scanning circuit 31 are sent to the vertical signal transmission lines 34 _{1 to} 34 ₇ . The vertical signal transmission lines 34 _{1 to} 34 ₄ are connected to the preamplifier 40 ₁ via pixel selection gates 38 _{1 to} 38 ₄ which are switching-controlled by the pixel selection lines 36 _{1 to} 36 ₄ connected to the horizontal scanning circuit 35 _1. further, the preamplifier 4 s vertical signal transmission line 34 _{4-34 7} respectively through the pixel selection gate 39 ₁ to 39 ₄ which are switching-controlled by the pixel selection line 37 _{1-37 4} connected to the horizontal scanning circuit 35 ₂
Connected to 0 ₂ . That is, the vertical signal transmission line 34 ₄ is connected to the preamplifiers 40 ₁ and 40 ₂ via the pixel selection gates 38 ₄ and 39 ₄ , respectively.

Each of the horizontal scanning circuits 35 ₁ and 35 ₂ has a terminal 4
Pixel selection lines 36 ₁ and 37 ₁ , 36 ₂ and 37 ₂ , 3 by scanning in the arrow direction in the figure in synchronization with the control clock coming from
6 ₃ and 37 ₃ , 36 ₄ and 37 ₄ are sequentially turned on to cause the preamplifiers 40 ₁ and 40 ₂ to simultaneously output pixel signals.

The above horizontal scanning circuits 35 ₁ and 35 ₂ , pixel selection lines 36 _{1 to} 36 ₄ , 37 _{1 to} 37 ₄ , pixel selection gates 38 _{1 to} 38 ₄ , 39 _{1 to} 39 ₄ , preamplifier 4
0 ₁ , 40 ₂ constitute a read circuit. The pixel signals output from the preamplifiers 40 ₁ and 40 ₂ whose vertical signal transmission line 34 ₄ serves as a signal supply circuit are transmitted through the signal transmission cables 42 ₁ and 42 ₂ shown in FIG. Are supplied to the buffer amplifiers 43 ₁ and 43 ₂ . The output of the buffer amplifier 43 ₁ is supplied to the A / D converter 44 _1, and the output of the buffer amplifier 43 ₂ is level-shifted by the level shift circuit 45 and then supplied to the A / D converter 44 ₂ .

A / D converter 44₁, 44₂Out of each
The input digital pixel signal is the terminal 46₁, 46₂Each one
Is supplied to the subsequent image circuit and the correction signal is generated.
It is supplied to the terminals A and B of the path 47, respectively. The control circuit 48
A control clock is generated and the horizontal scanning circuit 35 is output from the terminal 41.
₁, 35₂Supply to each one and generate sampling pulse
A / D converter 44₁, 44₂Supply to each,
In addition, the pixel selection line 36 _FourAnd 37_FourWhen to turn on
The timing signal for instructing the
To pay. The correction signal generation circuit 47 outputs the timing signal
When incoming, subtract the value of terminal B from the value of terminal A,
The correction signal of the level corresponding to
Hold and output until it comes. This correction signal is the correction circuit
Is supplied to the level shift circuit 45
P 43₂The output is level-shifted according to the difference B-A.
It

Here, when the output signal levels of the buffer amplifiers 43 ₁ and 43 ₂ are as shown by the solid lines I and II in FIG. 3A, the pixel selection gates 38 ₄ and 39 ₄ become conductive at time t _0. Despite being pixel signals of the same pixel, the levels of both signals are V _A , due to offset error and gain error.
Different from V _B. At this time point t ₀ , the correction signal generation circuit 47 generates the correction signal having the level shown in FIG. Therefore, the following lines are added corrected output signal level of the buffer amplifier 43 ₂ is only V _B -V _A, the level of the next selected gate 38 _4, 39 ₄ both signals at the time t ₁ to conduction V _C Will be almost the same.

FIG. 4 is a circuit diagram of a second embodiment of the solid-state image pickup device portion of the device of the present invention. In the figure, the same parts as those in FIG. 1 are designated by the same reference numerals. In FIG. 4, reference numeral 50 denotes a pixel array of 6 horizontal pixels × n vertical pixels. The output signals of the six pixels of the line selected by the vertical scanning circuit 31 in the pixel array 50 are sent to the vertical signal transmission lines 34 _{1 to} 34 ₆ . Vertical signal transmission lines 34 ₁ to 34 ₃ gate 38 _{2-38 4} of each pixel selection gate 38 ₁ to 38 ₄ which are switching-controlled by the pixel selection line 36 _{1-36 4} connected to the horizontal scanning circuit 35 ₁ Pixel selection lines 37 _{1 to} 37 connected to the preamplifier 40 ₁ via vertical lines and vertical signal transmission lines 34 _{4 to} 34 ₆ connected to the horizontal scanning circuit 35 _2.
Pixel selection gates 39 _{1 to} 3 switching-controlled by ₄
It is connected to the preamplifier 40 ₂ via the gate 39 _{2-39 4} out of 9 _4. Further, the reference voltage source 51 of the voltage V _ref is connected to the preamplifiers 40 ₁ and 40 ₂ via the pixel selection gates 38 ₁ and 39 ₁ , respectively.

Each of the horizontal scanning circuits 35 ₁ and 35 ₂ has a terminal 4
The pixel selection line 36 is synchronized with the control clock coming from 1
₁ and 37 ₁ , 36 ₂ and 37 ₂ , 36 ₃ and 37 ₃ , 36 ₄
And 37 ₄ are sequentially turned on to simultaneously output pixel signals from the preamplifiers 40 ₁ and 40 ₂ , the pixel selection line 36 ₁
When 37 and 37 ₁ are turned on, the reference voltage V _ref is read out as a pseudo pixel signal.

In this case, the control circuit 48 of FIG. 2 generates a timing signal for instructing the timing of turning on the pixel selection lines 36 ₁ and 37 ₁ , and supplies this timing signal to the correction signal generation circuit 47. As a result, similarly to the first embodiment, the output signal levels of the buffer amplifiers 43 ₁ and 43 ₂ can be made substantially the same when the pixel selection lines 36 ₁ and 37 ₁ are turned on.

The correction signal is sent to the A / D converter 4
4 _1, 44 ₂ before input may be generated from the analog signal, also generates a correction signal of the digital value by adding the A / D converter 44 ₂ outputs the output from the terminal 46 ₂ in the correction signal generation circuit 47 The correction signal generation circuit 4
Instead of subtracting 7 outputs from the buffer amplifier 43 ₂ output, 7 outputs may be added to the buffer amplifier 43 ₁ output, and the present invention is not limited to the above embodiment.

[0018]

As described above, according to the solid-state image pickup device of the present invention, it is possible to compensate the offset error and the gain error between the pixel signals of a plurality of systems and improve the quality of the monitor screen, which is extremely useful in practice. is there.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a solid-state image sensor of the device of the present invention.

FIG. 2 is a circuit diagram of a signal processing circuit of the device of the present invention.

FIG. 3 is a signal waveform diagram for explaining the present invention.

FIG. 4 is a circuit diagram of a solid-state image sensor of the device of the present invention.

FIG. 5 is a circuit diagram of a solid-state image sensor of a conventional device.

FIG. 6 is a circuit diagram of a signal processing circuit of a conventional device.

[Explanation of symbols]

30, 50 Pixel array 31 Vertical scanning circuit 34 _{1 to} 34 ₇ Vertical signal transmission line 35 ₁ , 35 ₂ Horizontal scanning circuit 36 _{1 to} 36 ₄ , 37 _{1 to} 37 ₄ Pixel selection line 38 _{1 to} 38 ₄ , 39 _{1 to} 39 ₄ pixel selection gate 40 ₁ , 40 ₂ preamplifier 42 ₁ , 42 ₂ signal transmission cable 43 ₁ , 43 ₂ buffer amplifier 44 ₁ , 44 ₂ A / D converter 45 level shift circuit 47 correction signal generation circuit

Claims (3)

[Claims] 1. A plurality of vertical signal transmissions of a pixel array (30).
Transmission line (34₁~ 34 ₇) To a plurality of read circuits (3
5₁, 35₂~ 40₁, 40₂) Split and connect, on
Note: Multiple readout circuits can simultaneously read pixel signals in time series.
In the solid-state image pickup device for projecting, the same signal is supplied to all of the plurality of readout circuits.
Signal supply circuit (34_Four) And a pixel signal read from each of the plurality of read circuits
Of the above, the level of the signal supplied from the signal supply circuit
Generate a correction signal that eliminates the above level difference from the difference
A correction signal generating circuit (47), and the correction signal is read from each of the plurality of reading circuits.
A correction circuit (45) for correcting the level of the pixel signal to be processed
A solid-state imaging device comprising: 2. The solid-state imaging device according to claim 1, wherein the signal supply circuit is configured by connecting one vertical signal transmission line to all horizontal scanning circuits. 3. The solid-state imaging device according to claim 1, wherein the signal supply circuit is a reference voltage source.