JPH0669777A - Fet switch circuit - Google Patents

Abstract

PURPOSE:To reduce the mixing of a noise to an output signal, which is caused by a control signal, even when the parasitic capacity of a transistor is increased at the time of making the size of the transistor large so as to make ON resistance between signal input/output terminals small. CONSTITUTION:The gate electrode of the transistor Q1 is connected directly to a terminal for inputting the control signal CNT. Between the gate electrode of the transistor Q1 and a ground potential point, the capacitor C1 of a capacitor value not less than a parasitic capacitor between the gate electrode of a transistor Q1 and source/drain electrodes is connected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a FET switch circuit, and more particularly to a high frequency FET switch circuit.

[0002]

2. Description of the Related Art Conventionally, this type of FET switch circuit has been
As an example, as shown in FIG. 3, a field effect transistor Q1 having a source electrode connected to a signal input terminal TM1 and a drain electrode connected to a signal output terminal TM, and an anode connected to a gate electrode of the transistor Q1 to control a cathode. Signal CNT
A diode D1 connected to the input terminal TM3, a diode D2 having a cathode connected to the gate electrode of the transistor Q1 and an anode connected to a reference potential point (ground potential point), and one end connected to the cathode of the diode D1 and the other end. Is connected to the ground potential point, and a capacitor C2 for high frequency bypass is provided (see, for example, JP-A-60-97720).

In this FET switch circuit, since the ON resistance of the diodes D1 and D2 is small when the transistor Q1 is off, the high frequency signal (Vin) input to the signal input terminal TM1 is applied to the gate electrode / source electrode of the transistor Q1. The signal output terminal TM2 is bypassed by the capacitance Cgs and the capacitance Cgd between the gate electrode and the drain electrode.
Can be prevented, and the characteristics when the transistor Q1 is off are improved.

[0004]

In this conventional FET switch circuit, the signal input terminal TM1 and the signal output terminal TM are provided.
If the size of the transistor Q1 is increased or the width of its gate electrode is increased in order to reduce the on-resistance between the two, the capacitance C between the gate electrode and the source electrode is proportionally increased.
There is a drawback that gs and the capacitance Cgd between the gate electrode and the drain electrode increase, and the control signal CNT mixes into the output signal Vout through the capacitances Cgs and Cgd.

In particular, a signal (Vi
n) has a smaller amplitude than the control signal CNT input to the gate electrode, the control signal CNT outputs the output signal Vout.
As a glitch.

An object of the present invention is to provide an FET switch circuit capable of reducing the mixing of a control signal into the output signal when the size of the transistor is increased.

[0007]

An FET switch circuit of the present invention is a field effect transistor for a switch, in which a source electrode is connected to a signal input terminal, a drain electrode is connected to a signal output terminal, and a gate electrode receives a control signal. A gate electrode and a source electrode of the field effect transistor having one end connected to the gate electrode of the field effect transistor and the other end connected to a reference potential point. And a capacitance element having a capacitance value that is substantially equal to or larger than the parasitic capacitance between the drain electrode and the drain electrode.

The capacitance element has the same size and dimensions as the field effect transistor for switching, with the gate electrode connected to the gate electrode of the field effect transistor for switching and the source and drain electrodes both connected to the reference potential point. It is formed of a field effect transistor having a structure.

[0009]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

In this embodiment, a field effect transistor for a switch in which the source electrode is connected to the signal input terminal TM1, the drain electrode is connected to the signal output terminal TM2, and the gate electrode is connected to the control signal CNT input terminal TM3. Q1
And the one end of the field effect transistor Q1 is provided close to the gate electrode of the field effect transistor Q1.
Connected to the gate electrode and the other end is the reference potential point (ground potential point)
And the capacitances Cgs, Cg between the gate electrode and the source and drain electrodes of the field effect transistor Q1
The capacitor C1 has a capacitance value that is substantially equal to or greater than d.

In this embodiment, the current of the high frequency component (noise) of the control signal CNT is the capacitor C1 and the capacitance C.
Depending on the ratio of the sum of gs and Cgd, it is distributed to the portion flowing to the ground potential point through the capacitor C1 and the portion mixed into the output signal Vout, so that the size of the transistor Q1 is increased and the values of Cgs and Cgd are increased. However, it is possible to reduce the amount mixed in the output signal Vout.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

In this embodiment, the capacitor element has the same size as the transistor Q1 by connecting the gate electrode to the gate electrode of the switching transistor Q1 and connecting both the source electrode and the drain electrode to the reference potential point (ground potential point). It is formed by a field effect transistor Q2 having the same structure.

In the first embodiment, the transistor Q
It is necessary to estimate or measure Cgs and Cgd of 1 to determine the value of the capacitor C1. However, in the second embodiment, the capacitance value corresponding to the capacitor C1 is necessarily (Cg
s + Cgd), the output signal Vou can be accurately and reliably provided without including the step of determining the capacitance value corresponding to C1 described above.
There is an advantage that the mixing of noise due to the control signal CNT into t can be reduced to 1/2.

[0016]

As described above, the present invention has the same parasitic capacitance between the gate electrode of the switching transistor and the source electrode / drain electrode between the gate electrode of the switching transistor and the reference potential point. Since the capacitance element having a value of a degree or larger is connected, the capacitance element has an effect of reducing noise due to the control signal mixed in the output signal even if the transistor size becomes large.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing an example of a conventional FET switch circuit.

[Explanation of symbols]

 C1, C2 capacitors D1, D2 diodes Q1, Q2 transistors

Claims (2)

[Claims] 1. A field effect transistor for a switch, in which a source electrode is connected to a signal input terminal, a drain electrode is connected to a signal output terminal, and a gate electrode receives a control signal, and a field effect transistor close to the gate electrode of the field effect transistor. Is provided with one end connected to the gate electrode of the field effect transistor and the other end connected to a reference potential point, and is substantially equal to the parasitic capacitance between the gate electrode and the source electrode and the drain electrode of the field effect transistor? An FET switch circuit having a capacitance element having a large capacitance value. 2. The capacitive element has the same size and dimensions as the field effect transistor for switching, wherein the gate electrode is connected to the gate electrode of the field effect transistor for switching, and the source electrode and the drain electrode are both connected to a reference potential point. The FE according to claim 1, which is formed of a field effect transistor having a structure.
T switch circuit.