JPH066598Y2 - Negative feedback amplifier circuit - Google Patents

Negative feedback amplifier circuit

Info

Publication number
JPH066598Y2
JPH066598Y2 JP1985128909U JP12890985U JPH066598Y2 JP H066598 Y2 JPH066598 Y2 JP H066598Y2 JP 1985128909 U JP1985128909 U JP 1985128909U JP 12890985 U JP12890985 U JP 12890985U JP H066598 Y2 JPH066598 Y2 JP H066598Y2
Authority
JP
Japan
Prior art keywords
output
stage
input
transistor
negative feedback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1985128909U
Other languages
Japanese (ja)
Other versions
JPS6237429U (en
Inventor
博久 石田
光伸 岩渕
Original Assignee
日立電子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電子株式会社 filed Critical 日立電子株式会社
Priority to JP1985128909U priority Critical patent/JPH066598Y2/en
Publication of JPS6237429U publication Critical patent/JPS6237429U/ja
Application granted granted Critical
Publication of JPH066598Y2 publication Critical patent/JPH066598Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Vessels, Lead-In Wires, Accessory Apparatuses For Cathode-Ray Tubes (AREA)
  • Amplifiers (AREA)

Description

【考案の詳細な説明】 (技術分野) 本考案は,オシロスコープ用陰極線管の水平偏向板の様
な容量性負荷を駆動する負帰還増幅回路に関するもので
ある。
TECHNICAL FIELD The present invention relates to a negative feedback amplifier circuit for driving a capacitive load such as a horizontal deflection plate of a cathode ray tube for an oscilloscope.

(従来技術とその問題点) オシロスコープ用陰極線管の水平偏向板の様な容量性負
荷を駆動する負帰還増幅器の回路を第2図に示す。1は
入力端子,2,5,6,8は抵抗器,3,10,11はトランジスタ,
4,9はキャパシタ,7は定電圧源,12は出力端子,13は
陰極線管の容量性負荷を示す。
(Prior Art and Its Problems) FIG. 2 shows a circuit of a negative feedback amplifier for driving a capacitive load such as a horizontal deflection plate of a cathode ray tube for an oscilloscope. 1 is an input terminal, 2, 5, 6, 8 are resistors, 3, 10, 11 are transistors,
4, 9 are capacitors, 7 is a constant voltage source, 12 is an output terminal, and 13 is a capacitive load of the cathode ray tube.

オシロスコープの様な広範囲の高速偏向信号を忠実に陰
極線管の偏向板に加えるには、十分な変位電流を供給し
て偏向板のキャパシタ13を充電しなければならない。
なお、キャパシタ4は容量性負荷13の充放電を行うと
きの切換時、すなわち、信号の変化点における高周波成
分の電流補正用で、該キャパシタ4により、増幅すべき
高周波信号は通過し、直流成分であるバイアス成分は阻
止される。
In order to faithfully apply a wide range of high speed deflection signals such as those of an oscilloscope to the deflection plate of the cathode ray tube, it is necessary to supply a sufficient displacement current to charge the capacitor 13 of the deflection plate.
It should be noted that the capacitor 4 is for switching the charging / discharging of the capacitive load 13, that is, for correcting the current of the high frequency component at the change point of the signal. The bias component that is

抵抗8には、その抵抗値とその抵抗8の両端に印加され
る電圧の差により決まる電流が流れる。
A current, which is determined by the difference between the resistance value and the voltage applied across the resistance 8, flows in the resistance 8.

抵抗8の一端には一定の電源電圧Vcが印加され,他端に
は,トランジスタ10のエミッタ電圧が印加されるが,こ
のエミッタ電圧は直流的には,ベース電圧(電源電圧Vc
が抵抗5及び6により分圧された値)に応じて決まる一
定電圧である。よって抵抗8には直流的に一定の電流が
流れる。トランジスタ10の電力損失は,このトランジス
タ10のコレクタ・エミッタ間を流れる電流(ほぼエミッ
タ電流)と,コレクタ・エミッタ間の電圧との積で決ま
る。
A constant power supply voltage Vc is applied to one end of the resistor 8, and the emitter voltage of the transistor 10 is applied to the other end.
Is a constant voltage determined according to the voltage divided by the resistors 5 and 6. Therefore, a constant DC current flows through the resistor 8. The power loss of the transistor 10 is determined by the product of the current (almost emitter current) flowing between the collector and the emitter of the transistor 10 and the voltage between the collector and the emitter.

そのため,出力段のPNP形トランジスタ10は大電流を
流せるように,大電流容量のものを用いなければなら
ず,高価,大形かつ,放熱にも注意をはらわなければな
らないという欠点があった。
Therefore, the PNP transistor 10 in the output stage must have a large current capacity so that a large current can flow, and it has the drawback of being expensive, large, and paying attention to heat dissipation.

第3図にこれらの欠点を除去した従来実施例を示す。FIG. 3 shows a conventional embodiment in which these drawbacks are eliminated.

本回路の特徴は供給電流の一部を抵抗14に分流すること
によりPNP形出力トランジスタ10の電力損失を少なく
している。しかし第3図の回路でも分流させる抵抗14の
容量も大きくなり,新たな熱的問題が残った。
The feature of this circuit is that the power loss of the PNP output transistor 10 is reduced by distributing a part of the supply current to the resistor 14. However, in the circuit of Fig. 3 as well, the capacity of the resistor 14 for shunting became large, and a new thermal problem remained.

(目的) 本考案の目的は,出力段のPNP形トランジスタの電力
損失を減少させる負帰還増幅器の提供にある。
(Object) An object of the present invention is to provide a negative feedback amplifier that reduces the power loss of the PNP transistor in the output stage.

(実施例) 第1図の本考案の一実施例を示す。(Embodiment) FIG. 1 shows an embodiment of the present invention.

本回路は,NPN形出力トランジスタ11のコレクタ電流
が減少すると,PNP形出力トランジスタ10の出力電流
で,容量性負荷13のキャパシタを充電して正電圧を生
じ,その逆の場合には放電する。
In this circuit, when the collector current of the NPN type output transistor 11 decreases, the output current of the PNP type output transistor 10 charges the capacitor of the capacitive load 13 to generate a positive voltage and discharges it in the opposite case.

抵抗8を通じて供給すべき電流は容量性負荷13のキャパ
シタを充電して正電圧を生じさせるときにのみ必要であ
り,上記放電期間には必要ない。すなわち,従来の方式
のごとく,PNP形出力トランジスタ10に常に一定の電
流を流しておく必要はない。
The current to be supplied through the resistor 8 is necessary only when charging the capacitor of the capacitive load 13 to generate a positive voltage, not during the discharging period. That is, unlike the conventional method, it is not necessary to constantly supply a constant current to the PNP type output transistor 10.

本考案は,このことに着目し,先に記したように,電流
を支配しているPNP形出力トランジスタ10のベース電
圧に,出力端子12と逆極性の電圧源16()を印加す
ることにより,電流を制御し,PNP形出力トランジス
タ10の電力損失を少なくすることを特徴とする。
In consideration of this, the present invention applies a voltage source 16 ( 0 ) having a polarity opposite to that of the output terminal 12 to the base voltage of the PNP type output transistor 10 which controls the current, as described above. Is used to control the current and reduce the power loss of the PNP type output transistor 10.

(効果) 以上のごとく,本考案によればPNP形出力トランジス
タは従来に比べ,電流容量の小さいものでよく,安価か
つ小形となる。
(Effects) As described above, according to the present invention, the PNP type output transistor may have a smaller current capacity than conventional ones, which is inexpensive and compact.

また,前述の出力と逆極性の電圧は,オシロスコープの
水平軸出力段の如き,差動出力形の増幅器においては,
各々の極性の出力を交叉して用いることができる。
In addition, the voltage of the opposite polarity to the above-mentioned output, in the differential output type amplifier such as the horizontal axis output stage of the oscilloscope,
The outputs of each polarity can be crossed and used.

【図面の簡単な説明】[Brief description of drawings]

第1図は,この考案の一実施例を示す回路図,第2図及
び第3図は従来の回路図。 1:入力端子,2,5,6,8,14,15:抵抗器,3,10,11:トラ
ンジスタ,4,9:キャパシタ,7:定電圧源,12:出力
端子,13:偏向板のキャパシタ,16:出力端子12の出力
電圧Eと逆極性の信号源()を示す。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIGS. 2 and 3 are conventional circuit diagrams. 1: Input terminal, 2,5,6,8,14,15: Resistor, 3,10,11: Transistor, 4,9: Capacitor, 7: Constant voltage source, 12: Output terminal, 13: Deflection plate Capacitor, 16: indicates a signal source ( 0 ) having a polarity opposite to the output voltage E 0 of the output terminal 12.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】入力信号が供給される入力端を有する入力
段と出力端が容量性負荷に接続され、上記入力段の出力
信号に応じて上記容量性負荷を駆動する出力段と、該出
力段の出力端及び上記入力段の入力端子間に接続された
負帰還回路とを具え、上記出力段は上記入力段の出力信
号により駆動されたNPN形トランジスタと、コレクタ
が上記NPN形トランジスタのコレクタに接続されたP
NP形トランジスタと、該PNP形トランジスタのベー
スと上記NPN形トランジスタのベースとの間に接続さ
れたキャパシタと、前記PNP形トランジスタのエミッ
タに第1抵抗器を介して第1所定電圧が供給されるとと
もに、ベースに上記出力段の出力信号とは逆極性の信号
とともに上記キャパシタを介して上記入力段の出力信号
を印加することを特徴とする負帰還増幅回路。
1. An output stage having an input end supplied with an input signal and an output end connected to a capacitive load, the output stage driving the capacitive load in response to an output signal of the input stage, and the output. A negative feedback circuit connected between the output terminal of the stage and the input terminal of the input stage, the output stage being an NPN transistor driven by the output signal of the input stage, and the collector being the collector of the NPN transistor. Connected to P
A first predetermined voltage is supplied to the NP transistor, a capacitor connected between the base of the PNP transistor and the base of the NPN transistor, and the emitter of the PNP transistor via a first resistor. At the same time, the negative feedback amplifier circuit is characterized in that the output signal of the input stage is applied to the base through the capacitor together with a signal having a polarity opposite to that of the output signal of the output stage.
JP1985128909U 1985-08-26 1985-08-26 Negative feedback amplifier circuit Expired - Lifetime JPH066598Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985128909U JPH066598Y2 (en) 1985-08-26 1985-08-26 Negative feedback amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985128909U JPH066598Y2 (en) 1985-08-26 1985-08-26 Negative feedback amplifier circuit

Publications (2)

Publication Number Publication Date
JPS6237429U JPS6237429U (en) 1987-03-05
JPH066598Y2 true JPH066598Y2 (en) 1994-02-16

Family

ID=31025005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985128909U Expired - Lifetime JPH066598Y2 (en) 1985-08-26 1985-08-26 Negative feedback amplifier circuit

Country Status (1)

Country Link
JP (1) JPH066598Y2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5048536U (en) * 1973-08-30 1975-05-13
JPS6049369B2 (en) * 1979-04-16 1985-11-01 株式会社ケンウッド push-pull amplifier circuit

Also Published As

Publication number Publication date
JPS6237429U (en) 1987-03-05

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