JPH0661852A - Phase locked loop - Google Patents

Abstract

PURPOSE:To reduce the lockup time by making a control voltage of a voltage controlled oscillator correspond to a set frequency and applying a control voltage having been stored corresponding to the set frequency in the voltage controlled oscillator at the time of an end of frequency setting. CONSTITUTION:Control voltages each corresponding to an oscillated frequency of a voltage controlled oscillator VCO 7 in use are stored in advance in a ROM 8 as digital values. When an output frequency is set, a frequency setting signal (a) is used to read a set voltage corresponding to the set frequency from the ROM 8 and a digital value read from the ROM 8 is converted into an analog voltage by a D/A converter 9. When the setting of frequency is finished, a frequency setting end signal (b) is outputted to allow a voltage application changeover circuit 10 to apply an output voltage of the D/A converter 9 to the VCO 7. When the signal (b) is lost, the circuit 10 stops application of the output signal of the D/A converter 9 and then the similar operation to that of a conventional loop is implemented. Thus, the lockup time is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked loop, and more particularly to a phase locked loop that locks up at high speed.

[0002]

2. Description of the Related Art A conventional phase-locked loop is shown in FIG.
As shown in FIG. 1, the signal generator 1, the first frequency divider 2, the second frequency divider 3, the phase comparator 4, the charge pump 5, the low-pass filter 6 (hereinafter referred to as LPF), and the voltage-controlled oscillator 7 are included. (Hereinafter referred to as VCO).

In this phase locked loop, first,
The reference frequency signal c obtained by dividing the signal of the signal generator 1 by the first frequency divider 2 and the output signal of the VCO 7 by the second frequency divider 3 are divided by the value set by the frequency setting signal a. The comparison frequency signal d is input to the phase comparator 4, and a phase difference output based on the frequencies of the reference frequency signal c and the comparison frequency signal d and the phase difference is obtained.

Next, these two phase difference outputs from the phase comparator 4 are input to the charge pump 5 for smoothing, and V
A control voltage for controlling the oscillation frequency of CO7 is created. Further, the VCO 7 determines the oscillation frequency by the output voltage of the LPF 6, and the output signal of the VCO 7 becomes the input of the second frequency divider 3 and forms a feedback loop.

By forming the feedback loop in this way, the output signal of the VCO 7 tends to have a frequency that is a frequency division multiple of the second frequency divider 3 of the reference frequency signal c, and the output signal of the reference frequency signal c In order to eliminate the phase difference, the set frequency signal synchronized with the reference frequency signal c is output.

[0006]

In the phase-locked loop of the prior art described above, the control voltage applied to the VCO is uncertain at the initial synchronous operation such as when the power is turned on.
There is a problem that it takes a long time to achieve synchronization when the initial control voltage is far from the control voltage for the required frequency.

Further, when the set frequency is switched, there is a problem that it takes a long time to achieve synchronization when the difference between the previous frequency and the set frequency is large.

In view of the above-mentioned drawbacks, the technical problem of the present invention is to shorten the frequency pull-in time when the control voltage of the voltage-controlled oscillator greatly differs from the set frequency when the power is turned on, and ultimately, It is to provide a phase locked loop capable of shortening the lockup time.

[0009]

According to the present invention, the phase difference between the reference signal obtained by dividing the output of the signal generator and the signal obtained by dividing the output of the voltage controlled oscillator is detected. In a phase-locked loop that has a phase comparator and a low-pass filter that smoothes the output of the phase comparator, and controls the output of the voltage-controlled oscillator based on the output voltage of the low-pass filter. Storing means for storing the corresponding control voltage value of the voltage controlled oscillator, and voltage application switching for converting the control voltage value stored in the storing means into a voltage and applying it to the voltage controlled oscillator at the end of frequency setting. A phase-locked loop is obtained.

Further, according to the present invention, there is provided a phase comparator for detecting a phase difference between a reference signal obtained by dividing the output of the signal generator and a signal obtained by dividing the output of the voltage controlled oscillator. A low-pass filter for smoothing the output of the phase comparator, the phase-locked loop controlling the output of the voltage-controlled oscillator based on the output voltage of the low-pass filter, the voltage corresponding to the frequency used in advance. A voltage selection means for selecting a control voltage value of the controlled oscillator by resistance voltage division, and a voltage applied to the voltage controlled oscillator by converting the control voltage value selected by the voltage selection means into a voltage at the end of frequency setting. A phase-locked loop having an application switching means is obtained.

That is, the present invention has one of the following configurations. (1). A circuit that stores the control voltage of the voltage controlled oscillator corresponding to the frequency to be used in advance and converts the stored control voltage corresponding to the set frequency into a voltage and applies it to the voltage controlled oscillator at the end of frequency setting is provided. (Claim 1). (2). A circuit that allows the control voltage of the voltage controlled oscillator corresponding to the frequency to be used to be obtained selectively by resistance voltage division, and selects the control voltage corresponding to the set frequency at the end of frequency setting and applies it to the voltage controlled oscillator. Is provided (claim 2).

[0012]

When the frequency is set, a control voltage prepared in advance corresponding to the set frequency is selected and applied to the voltage controlled oscillator.

[0013]

Embodiments of the present invention will now be described with reference to the drawings.

1. First Embodiment Corresponding to Claim 1 (See FIG. 1) A first embodiment of the present invention corresponding to claim 1 will be described with reference to FIG. As shown in FIG. 1, the phase-locked loop of this example includes a signal generator 1, a first frequency divider 2, and a second frequency divider 2.
Frequency divider 3, phase comparator 4, charge pump 5, low-pass filter 6 (hereinafter LPF 6), voltage controlled oscillator 7 (hereinafter VCO 7), read-only memory 8
(Hereinafter referred to as ROM), digital-analog converter 9 (hereinafter referred to as D / A converter 9), and voltage application switching circuit 1
It is composed of 0s.

In this example, first, the reference frequency signal c obtained by dividing the signal of the signal generator 1 by the first divider 2 and VC
A comparison frequency signal d obtained by dividing the output signal of O7 by the value set by the frequency setting signal a by the second frequency divider 3 is input to the phase comparator 4.

As a result, a phase difference output based on the frequency difference between the reference frequency signal c and the comparison frequency signal d and the phase difference is obtained. Next, these two phase difference outputs of the phase comparator 4 are input to the charge pump 5, and the charge pump 5
Is output to the LPF 6 to be smoothed and a control voltage for controlling the oscillation frequency of the VCO 7 is created.

Then, the output voltage of the LPF 6 causes the VCO
7 determines the oscillation frequency, and the output signal of the VCO 7 becomes the input of the second frequency divider 3 and forms a feedback loop.

By forming the feedback loop in this way, the output signal of the VCO 7 tends to have a frequency that is a frequency division multiple of the second frequency divider 3 of the reference frequency signal c, and the phase difference from the reference frequency signal c. To eliminate the reference frequency signal c
And output the set frequency Shingo synchronized. This is called a locked state.

Here, it is assumed that the control voltage corresponding to the oscillation frequency of the VCO 7 to be used is stored in the ROM 8 in advance as a digital value.

Therefore, when setting the output frequency, the control voltage corresponding to the set frequency is read from the ROM 8 by the frequency setting signal a, and the digital value read from the ROM 8 is converted into an analog voltage by the D / A converter 9. Convert.

When the frequency setting is completed,
By issuing the frequency setting end signal b, the voltage application switching circuit 10 applies the output voltage of the D / A converter 9 to the VCO 7. When the frequency setting end signal b disappears, the voltage application switching circuit 10 stops the application of the output signal of the D / A converter 9 and performs the same operation as the conventional one.

2. Second Embodiment Corresponding to Claim 2 (See FIG. 2) A second embodiment of the present invention corresponding to claim 2 will be described with reference to FIG. As shown in FIG. 2, the phase-locked loop of this example includes a signal generator 1, a first frequency divider 2, and a second frequency divider 2.
Frequency divider 3, phase comparator 4, charge pump 5, LPF
6, VCO 7, voltage application switching circuit 10, voltage selection circuit 1
1 and a control voltage generation circuit 12.

Also in this example, the basic operation is the same as that of the first embodiment. However, in the circuit configuration, a voltage selection circuit 11 and a voltage generation circuit 12 are provided instead of the ROM 8 and the D / A converter 9 in the first embodiment (see FIG. 1).

Then, the control voltage corresponding to the oscillation frequency of the VCO 7 used in advance is built into the resistance value of the voltage creating circuit 12 which is obtained by resistance-dividing the power supply voltage, and the voltage selecting circuit 11 simply The resistance is changed over, and the control voltage is changed over by the voltage division by the resistance.

3. Step response characteristic of the phase-locked loop according to the present invention In FIG. 3 explaining the step response characteristic, from point A to point B
The point is the frequency pull-in period, and the points B to C are the phase synchronization period.

Conventionally, the frequency pull-in period (A-
After passing through B), passing through the phase pull-in period (BC),
Locking, but since the initial voltage is applied in the present invention,
It is possible to suddenly go to the point B, so that the frequency pull-in period is shortened.

Therefore, when the control voltage of the voltage controlled oscillator is greatly different from the set frequency when the power is turned on,
The lock-up time can be greatly shortened.

[0028]

According to the present invention, when the control voltage of the voltage controlled oscillator is greatly different from the set frequency when the power is turned on, the frequency pull-in time is shortened, and the lock-up time is ultimately shortened. It is possible to provide a phase-locked loop that can be used.

[Brief description of drawings]

FIG. 1 is a block connection diagram of a phase locked loop illustrating a first embodiment of the present invention.

FIG. 2 is a block connection diagram of a phase locked loop illustrating a second embodiment of the present invention.

FIG. 3 is a step response diagram of a phase locked loop according to the present invention.

FIG. 4 is a block connection diagram illustrating a conventional phase locked loop.

[Explanation of symbols]

 8 Read Only Memory 9 Digital-Analog Converter 10 Voltage Application Switching Circuit 11 Voltage Selection Circuit 12 Control Voltage Creation Circuit

Claims (2)

[Claims] 1. A phase comparator for detecting a phase difference between a reference signal obtained by dividing an output of a signal generator and a signal obtained by dividing an output of a voltage controlled oscillator, and a phase comparator of the phase comparator. A low-pass filter for smoothing the output, in a phase-locked loop for controlling the output of the voltage-controlled oscillator based on the output voltage of the low-pass filter, a control voltage value of the voltage-controlled oscillator corresponding to a frequency used in advance. And a voltage application switching means for converting the control voltage value stored in the storage means into a voltage and applying the voltage to the voltage controlled oscillator when the frequency setting is completed. Locked loop. 2. A phase comparator for detecting a phase difference between a reference signal obtained by dividing the output of the signal generator and a signal obtained by dividing the output of the voltage controlled oscillator, and a phase comparator of the phase comparator. A low-pass filter for smoothing the output, in a phase-locked loop for controlling the output of the voltage-controlled oscillator based on the output voltage of the low-pass filter, a control voltage value of the voltage-controlled oscillator corresponding to a frequency used in advance. And a voltage application switching means for converting the control voltage value selected by the voltage selection means into a voltage and applying the voltage to the voltage controlled oscillator when the frequency setting is completed. A phase-locked loop characterized by that.