JPH0661392A - Semiconductor device lead frame - Google Patents

Semiconductor device lead frame

Info

Publication number
JPH0661392A
JPH0661392A JP20824692A JP20824692A JPH0661392A JP H0661392 A JPH0661392 A JP H0661392A JP 20824692 A JP20824692 A JP 20824692A JP 20824692 A JP20824692 A JP 20824692A JP H0661392 A JPH0661392 A JP H0661392A
Authority
JP
Japan
Prior art keywords
plating
element mounting
mounting portion
lead frame
alloy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20824692A
Other languages
Japanese (ja)
Inventor
Satoshi Chinda
聡 珍田
Kenichi Fujiwara
健一 藤原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP20824692A priority Critical patent/JPH0661392A/en
Publication of JPH0661392A publication Critical patent/JPH0661392A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Abstract

PURPOSE:To prevent the rear side of an element mount exposed to the outside from discoloring at assembly. CONSTITUTION:A Ni plating film 15 is provided at least to an element mounting pad 6, a wire bonding part, and a rear side 10 of the element mounting pad 6 of a transistor lead frame. Furthermore, an Ni-P alloy plating film 16 is provided to a part where the glazing Ni plating film 15 is provided excluding the rear side 10 of the element mounting pad 6 to form a two-layered plating film. By this setup, only the glazing Ni plating film 15 is provided to the rear side 10 of the element mounting pad exposed to the outside after assembly, and the Ni-P alloy plating film 16 is not provided.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置用リードフレ
ームに係り、特に組立てパッケージ後外部に露出させる
外部露出部面を改善したものに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device lead frame, and more particularly, to a semiconductor device lead frame having an external exposed surface which is exposed to the outside after assembly and packaging.

【0002】[0002]

【従来の技術】一般に、トランジスタの組立工程は次の
ように行われる。まず、リードフレームと称する、主に
銅合金からなる基体にトランジスタのシリコン素子(シ
リコンチップ)を載せ、はんだ、銀ペーストまたはAu
−Si共晶等で、素子を基体上に接合した後、素子と基
体のリードとをAuまたはAl線でワイヤボンディング
する。次に、素子およびワイヤ保護のために、多くの場
合、樹脂封止を行う。その後、アウターリード間を切断
し、アウターリードにはんだめっきを設け、完成品とな
る。
2. Description of the Related Art Generally, a process of assembling a transistor is performed as follows. First, a silicon element (silicon chip) of a transistor is placed on a base body called a lead frame, which is mainly made of a copper alloy, and solder, silver paste or Au is used.
After the element is bonded to the base by using —Si eutectic or the like, the element and the lead of the base are wire-bonded with Au or Al wire. Next, in many cases, resin sealing is performed to protect the element and the wire. After that, the outer leads are cut and the outer leads are solder-plated to complete the product.

【0003】ところで、シリコン素子の接合が銀ペース
ト又はAu−Si共晶で接合する場合、リードフレーム
の素子載置部にはAgめっきが設けられるが、はんだ付
けで素子を接合する場合は、光沢Niめっきを設けた上
にNi−P合金めっきを0.2μm程度設けた2層めっ
きが用いられるようになった(例えば特公昭60−33
312号公報)。Ni−Pははんだ付け性に優れている
ためである。
By the way, when the silicon element is joined by silver paste or Au-Si eutectic, Ag plating is provided on the element mounting portion of the lead frame. However, when the element is joined by soldering, it is glossy. Two-layer plating in which a Ni—P alloy plating is provided to a thickness of about 0.2 μm in addition to a Ni plating has come to be used (for example, Japanese Patent Publication No. 60-33).
No. 312). This is because Ni-P has excellent solderability.

【0004】また、リードフレームのワイヤボンディン
グ部は、特にパワトランジスタにおいては信頼性の点か
らコストは高いがAl線が接続ワイヤとして用いられ
る。Al線はAu線と異なり、ボールボンディングがで
きないため、1回目、2回目とも超音波ウェッジボンデ
ィングである。超音波ボンディングにおいては基体表面
は硬く滑らかな方が、加えられた超音波が吸収されず、
接合強度が高まる。この点で、Ni−P合金はめっき直
後でも硬く(ビッカース硬さHv400以上)、300
〜400℃の熱処理を受けるとさらに硬くなるため(H
v800)、光沢Niめっきのみを設ける場合よりもN
i−P合金めっきをその上に薄く設けると、ワイヤボン
ディング強度が向上する。
In the wire bonding portion of the lead frame, especially in the power transistor, the Al wire is used as the connecting wire although the cost is high in terms of reliability. Unlike the Au wire, the Al wire cannot be ball-bonded, and therefore ultrasonic wave wedge bonding is used for the first and second times. In ultrasonic bonding, if the surface of the substrate is hard and smooth, the applied ultrasonic waves will not be absorbed,
Bonding strength is increased. In this respect, the Ni-P alloy is hard even immediately after plating (Vickers hardness Hv 400 or more), 300
It becomes harder when subjected to heat treatment at ~ 400 ° C (H
v800), more N than when only bright Ni plating is provided
When the i-P alloy plating is thinly provided on the i-P alloy plating, the wire bonding strength is improved.

【0005】以上の理由から、はんだ付けにより素子を
接合するパワトランジスタ用リードフレームにおいては
少なくとも素子載置部およびリードのワイヤボンディン
グ部に、はんだ付け性およびボンディング性に優れたN
i−P/光沢Ni2層めっきを設けるのが普通である。
2層にする理由は、下地銅合金材からの銅の拡散を抑え
るにはNi系めっきが最低1μmは必要であるが、これ
を全てNi−P合金めっきとすると、Ni−P合金は非
常に硬いため、折曲げ加工あるいはプレスによる成形加
工の際、めっき層にクラックが入り、めっき欠陥が生じ
る。このため比較的軟らかい光沢Niめっきを設けた後
に、表面特性を向上させるために、Ni−P合金めっき
を0.2μm程度設けるものである。これによりクラッ
ク発生は最小限に抑制される。
For the above reason, in the lead frame for power transistor in which elements are joined by soldering, at least the element mounting portion and the wire bonding portion of the lead are N excellent in solderability and bondability.
It is common to provide iP / bright Ni bilayer plating.
The reason for forming two layers is that Ni-based plating needs to be at least 1 μm in order to suppress the diffusion of copper from the underlying copper alloy material, but if this is all Ni-P alloy plating, the Ni-P alloy is very Since it is hard, cracks occur in the plating layer during bending or forming by pressing, resulting in plating defects. For this reason, after providing a relatively soft bright Ni plating, Ni-P alloy plating is applied to about 0.2 μm in order to improve the surface characteristics. This minimizes the occurrence of cracks.

【0006】このようなはんだ付け性およびボンディン
グ性に優れたパワトランジスタ用Ni−P/光沢Ni2
層めっきリードフレームは、次のように製造される。ま
ず銅合金条表面を脱脂、酸洗により清浄化した後、光沢
Niめっきを3μm程度設ける。めっき液はワット浴に
光沢剤を添加したものが主に用いられる。このとき、め
っきは少なくとも素子載置部とワイヤボンディング部に
必要であるが、それ以外の部分、例えば素子載置部の裏
面やアウターリード部には必ずしも設ける必要がないの
で、めっきを省略することもある。ただし、素子載置部
の裏面が組立て後外部露出する場合には後述する理由か
らめっきを設ける場合が多い。めっきを省略する時はめ
っき不要部をマスキングテープ等で覆って、必要な部分
にのみ、帯状にめっきを設けるいわゆる部分ストライク
めっき法がとられる。
Ni-P / gloss Ni2 for power transistors, which is excellent in solderability and bondability.
The layer-plated lead frame is manufactured as follows. First, the surface of the copper alloy strip is degreased and cleaned by pickling, and then bright Ni plating is provided to a thickness of about 3 μm. The plating solution is mainly a Watts bath to which a brightening agent is added. At this time, the plating is required at least on the element mounting portion and the wire bonding portion, but it is not necessary to provide it on the other portion, for example, the back surface of the element mounting portion or the outer lead portion, so the plating is omitted. There is also. However, when the back surface of the element mounting portion is exposed to the outside after assembly, plating is often provided for the reason described below. When the plating is omitted, a so-called partial strike plating method is used in which the unnecessary plating portion is covered with a masking tape or the like and only the necessary portion is plated in a strip shape.

【0007】光沢Niめっきを設けた部分には、さらに
Ni−P合金めっきが0.2μm程度設けられ、洗浄、
乾燥を経て、めっき工程が完了する。次に、少なくとも
素子載置部とリードのワイヤボンディング部とに2層め
っきを設けたリードフレームがプレスにより成形加工さ
れる。
[0007] Ni-P alloy plating is further provided on the portion where the bright Ni plating is provided by about 0.2 μm, and cleaning,
After drying, the plating process is completed. Next, a lead frame in which two-layer plating is provided on at least the element mounting portion and the wire bonding portion of the lead is formed by pressing.

【0008】[0008]

【発明が解決しようとする課題】ところで、素子載置部
の裏面は素子からの発熱を逃すために樹脂封止した際、
外部に露出する構造をとるものが多い。従って銅合金材
がむき出しになっていると、組立工程の熱履歴や、使用
中の雰囲気により銅が変色して、商品価値を損なうこと
がある。そこで、外部に露出する素子載置部の裏面に
も、表面と同様の工程で銅より耐変色性に優れたNi−
P/光沢Ni2層めっきを設け、耐熱変色性および耐湿
変色性を向上させている。
By the way, when the back surface of the element mounting portion is resin-sealed to release heat from the element,
Many have a structure exposed to the outside. Therefore, if the copper alloy material is exposed, the copper may be discolored due to the heat history of the assembly process and the atmosphere during use, and the commercial value may be impaired. Therefore, even on the back surface of the element mounting portion exposed to the outside, in the same process as the front surface, Ni-
A P / bright Ni two-layer plating is provided to improve heat discoloration resistance and humidity discoloration resistance.

【0009】しかし、Ni−P合金めっきの特性とし
て、銅よりは耐熱性および耐変色性に対して優れている
が、空気中で加熱するとリン酸ニッケルが生成し、黄変
色する。また酸水溶液(PH3以下)中では短時間で黒
変色する。これは酸によりNiが溶解し、Niのリン化
合物が表面に残り黒色化するものと推定される。黄変色
はNi−P/光沢Ni2層めっきリードフレームを還元
性ガス雰囲気の炉中に入れ、素子付き工程で加熱した
際、炉のシールドが悪く、空気が入り込んだ場合、特に
素子載置部の裏面側、すなわちヒートブロック接触部に
選択的に発生する。また、樹脂封止および切断成形が完
了し、アウターリード部に溶融はんだを設ける工程で
は、リードの酸化皮膜を除去するためにフラックスに浸
漬した後、溶融はんだ槽に入れ、次にフラックス残渣を
洗浄するが、フラックスは通常、強酸の場合が多いた
め、洗浄が不十分だったり、フレーム同士が密着して間
に酸が残っている時は、残留する酸によって外部に露出
するNi−Pめっき部、すなわち素子載置部の裏面に黒
変色が発生するのである。
However, as a characteristic of the Ni-P alloy plating, it is superior to copper in heat resistance and discoloration resistance, but when it is heated in the air, nickel phosphate is produced and the color changes to yellow. Further, in an acid aqueous solution (PH3 or less), the color changes to black in a short time. It is presumed that this is because Ni is dissolved by the acid, and the phosphorus compound of Ni remains on the surface to turn black. The yellow discoloration is caused by Ni-P / bright Ni 2 layer plating lead frame placed in a furnace in a reducing gas atmosphere and heated in the element attaching process, when the furnace shield is poor and air enters, especially in the element mounting part. It selectively occurs on the back surface side, that is, on the heat block contact portion. In addition, in the step of providing molten solder on the outer lead part after resin sealing and cutting and molding are completed, after dipping in flux to remove the oxide film of the lead, put it in the molten solder bath and then wash the flux residue. However, since the flux is usually a strong acid, the Ni-P plating part that is exposed to the outside by the residual acid when cleaning is insufficient or when the frames are in close contact with each other and the acid remains between them. That is, black discoloration occurs on the back surface of the element mounting portion.

【0010】このようにNi−P合金めっきはリードフ
レームの素子載置部およびワイヤボンディング部には必
要なめっきであるが、Ni−Pが外部に露出する素子載
置部裏面などでは、組立工程が不完全であると変色が発
生することがあり、著しく商品価値を低下させる一因と
なる。
As described above, the Ni-P alloy plating is necessary for the element mounting portion and the wire bonding portion of the lead frame, but for the back surface of the element mounting portion where Ni-P is exposed to the outside, the assembly process is performed. If it is incomplete, discoloration may occur, which is one of the factors that significantly reduce the commercial value.

【0011】本発明の目的は、前記した従来技術の欠点
を解消し、外部に露出する素子載置部裏面の変色を防止
する新規な半導体装置用リードフレームを提供すること
にある。
An object of the present invention is to solve the above-mentioned drawbacks of the prior art and to provide a novel lead frame for a semiconductor device which prevents discoloration of the rear surface of the element mounting portion exposed to the outside.

【0012】[0012]

【課題を解決するための手段】本発明は、Ni−P/光
沢Ni2層めっきのリードフレームが組立時にNi−P
合金めっき面が変色する現象が生じたことに着目し、N
i−P合金めっきは機能面のみにし、外部に露出する面
は耐変色性に優れた光沢Niめっきのみにすればよいと
の知見に基づいてなされたものである。
According to the present invention, a Ni-P / bright Ni two-layer plated lead frame is assembled into a Ni-P.
Focusing on the phenomenon that the alloy-plated surface is discolored, N
The i-P alloy plating is based on the knowledge that only the functional surface and only the bright Ni plating excellent in discoloration resistance should be used for the surface exposed to the outside.

【0013】すなわち、本発明は、銅、銅合金または鉄
合金からなる半導体装置用リードフレームにおいて、少
なくとも素子載置部、ワイヤボンディング部および組立
パッケージ後に外部に露出させる素子載置部の裏面に光
沢Niめっきを設け、素子載置部の裏面を除いた少なく
とも光沢Niめっきを設けた部分に、さらにNi−P合
金めっきを設け、組立てパッケージ後外部に露出させる
素子載置部の裏面には光沢Niめっきのみが設けられ、
Ni−P合金めっきを設けないようにしたものである。
That is, according to the present invention, in a semiconductor device lead frame made of copper, a copper alloy, or an iron alloy, at least the element mounting portion, the wire bonding portion, and the back surface of the element mounting portion exposed to the outside after the assembly package are glossy. Ni plating is provided, and at least a portion of the element mounting portion excluding the back surface of the element mounting portion, which is provided with bright Ni plating, is further provided with Ni-P alloy plating, and the rear surface of the element mounting portion that is exposed to the outside after assembly and packaging is bright Ni. Only plating is provided,
The Ni-P alloy plating is not provided.

【0014】このように少なくとも素子載置部、ワイヤ
ボンディング部はNi−P/光沢Ni2層めっきとし、
素子載置部の裏面は光沢Niのみとすることにより、素
子付け性およびワイヤボンディング性の向上を図ると同
時に、組立時の変色を受けにくい耐変色性に優れた表面
を得るものである。
Thus, at least the element mounting portion and the wire bonding portion are Ni-P / bright Ni 2 layer plating,
By providing only the gloss Ni on the back surface of the element mounting portion, it is possible to improve the element attaching property and the wire bonding property, and at the same time, obtain the surface excellent in discoloration resistance that is not easily discolored during assembly.

【0015】[0015]

【作用】光沢Niめっきは酸の存在や空気中での加熱に
よる変色がNi−P合金めっきに比べて少ない。従って
リードフレーム製造工程において、少なくとも素子載置
部とその裏面およびワイヤボンディング部に光沢Niめ
っきを設けた後、素子載置部裏面をマスキングテープや
ベルトマスクで覆ってから、少なくとも素子載置部およ
びワイヤボンディング部にNi−P合金めっきを設け、
洗浄、乾燥すればよい。光沢Niめっきの厚さは3μm
程度がよいが、めっき厚はこれに限定されない。
[Function] The bright Ni plating is less discolored due to the presence of an acid or heating in air than the Ni-P alloy plating. Therefore, in the lead frame manufacturing process, after at least the element mounting portion and its back surface and the wire bonding portion are provided with bright Ni plating, the back surface of the element mounting portion is covered with a masking tape or a belt mask, and then at least the element mounting portion and Ni-P alloy plating is provided on the wire bonding part,
It may be washed and dried. Bright Ni plating thickness is 3μm
Although the degree is good, the plating thickness is not limited to this.

【0016】なお、光沢Niめっきを設けた後、素子載
置部裏面にマスキングテープを貼りつけて遮蔽する場合
は、裏面が濡れているとテープが付着しない。しかし加
熱して水分を蒸発除去したのでは、表面のNi−P合金
めっき層にも熱が加わり、乾燥して酸化皮膜が生成し、
はんだ濡れ性が悪くなるので、加熱乾燥は行わない方が
よい。この場合、光沢Niめっきを設けた後、例えば裏
面のみをエアナイフで水切りすれば、テープ貼付けがで
きる上、表面のNi−P合金めっきの酸化もほとんど問
題にならない。
When a masking tape is attached to the back surface of the element mounting portion to shield it after providing the bright Ni plating, the tape does not adhere if the back surface is wet. However, if the water is evaporated to remove water, heat is also applied to the Ni-P alloy plating layer on the surface, and the oxide film is formed by drying,
It is better not to heat and dry it because the solder wettability deteriorates. In this case, after providing the bright Ni plating, the tape can be attached by draining only the back surface with an air knife, and the oxidation of the Ni-P alloy plating on the surface hardly poses a problem.

【0017】[0017]

【実施例】以下、本発明の実施例によるトランジスタ用
リードフレーム及びそれを用いたパワトランジスタの製
造工程を説明する。Snと無酸素銅(OFC)との合金
である12Sn−OFCからなる異形銅合金条のコイル
を準備した。この異形銅合金条Sは、図2に示すよう
に、中央部に厚板部、両サイドに薄板部をもち、同一断
面で異なる板厚部を有する断面形状をしており、準備し
たコイルは条幅約50mm、重量約200kgである。
これを自動一貫ストライプめっき条製造用量産装置に設
置した。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A lead frame for a transistor according to an embodiment of the present invention and a manufacturing process of a power transistor using the same will be described below. A coil of a deformed copper alloy strip made of 12Sn-OFC which is an alloy of Sn and oxygen-free copper (OFC) was prepared. As shown in FIG. 2, this modified copper alloy strip S has a thick plate portion in the central portion and thin plate portions on both sides, and has a cross-sectional shape having different thickness portions in the same cross section. The strip width is about 50 mm and the weight is about 200 kg.
This was installed in a mass production device for automatic striped strip manufacturing.

【0018】まず、全面を陰極電解脱脂した後、プレス
成形した際に、機能面めっき部位2(素子載置部、ワイ
ヤボンディング部に当る部分)および素子載置部の裏面
めっき部位4(素子載置部の裏面に当る部分)を除く他
の部分21、23(アウターリードとなるべき部分)に
熱粘着性マスキングテープ1、3をそれぞれ貼り付けた
(図3、図4)。そしてもう一度、陰極電解脱脂および
酸洗工程を経て、マスキングテープ1、3を貼り付けて
いない、めっきを設ける部位2、4を清浄化した。
First, when the entire surface is subjected to cathodic electrolytic degreasing and then press-molded, a functional surface plating portion 2 (element mounting portion, a portion corresponding to a wire bonding portion) and a back surface plating portion 4 of the element mounting portion (element mounting The heat-adhesive masking tapes 1 and 3 were attached to the other portions 21 and 23 (portions to be outer leads) except for the portion corresponding to the back surface of the placing portion (FIGS. 3 and 4). Then, once again, through the steps of cathodic electrolytic degreasing and pickling, the parts 2 and 4 to which plating is to be applied, to which the masking tapes 1 and 3 are not attached, are cleaned.

【0019】次に、その部位2、4に光沢Niめっき1
5を約3μm、電解法により設け、回収、水洗工程を経
た後、条Sの素子載置部の裏面に当る側にエアナイフで
高圧空気を吹き付けて、付着している水分を除去し、貼
り付けているマスキングテープ3の上から、裏面のNi
めっき面露出部が被覆されるように、マスキングテープ
11を重ね貼りした(図5)。マスキングテープ11は
条Sの片面のみに貼り付け、素子載置部およびワイヤボ
ンディング部側の面は貼付けは行わない。
Next, bright Ni plating 1 is applied to the portions 2 and 4.
5 was provided by an electrolysis method with a thickness of about 3 μm, and after the collection and washing steps, high-pressure air was blown to the side of the strip S that contacts the back surface of the element mounting portion with an air knife to remove the attached water and paste From the top of the masking tape 3
The masking tape 11 was laminated and attached so that the exposed portion of the plated surface was covered (FIG. 5). The masking tape 11 is attached only to one side of the strip S, and the surface on the element mounting portion side and the wire bonding portion side is not attached.

【0020】その後、Ni−P電解めっきを行った。素
子載置部の裏面めっき部位4は全てテープマスキングさ
れているから、Ni−P合金めっき16は素子載置部お
よびワイヤボンディング部に当る光沢Niめっきされた
面上に設けられた。Ni−P合金めっきの厚さは0.2
μmとした。そして表裏のマスキングテープ1、3、1
1を除去し、多段水洗および乾燥工程を経て、片面がN
i−P/光沢Ni2層ストライプめっき13、もう一方
の面が光沢Niストライプめっき15のみの銅合金条を
作製した(図6)。この銅合金条を点線で示す所望のト
ランジスタ用リードフレーム形状12にプレス機で成形
した。
After that, Ni-P electrolytic plating was performed. Since the backside plating portion 4 of the element mounting portion is all tape-masked, the Ni-P alloy plating 16 was provided on the surface of the element mounting portion and the wire-bonding portion, which was bright Ni-plated. The thickness of Ni-P alloy plating is 0.2
μm. And the front and back masking tapes 1, 3, 1
1 was removed, and after one step of multi-step water washing and drying,
A copper alloy strip having only i-P / bright Ni two-layer stripe plating 13 and the other surface having a bright Ni stripe plating 15 was prepared (FIG. 6). This copper alloy strip was formed into a desired transistor lead frame shape 12 shown by a dotted line by a press machine.

【0021】そして、トランジスタ素子7を素子載置部
6にはんだ付けで接合した後、トランジスタ素子7とワ
イヤボンディング部17とをAl線8でワイヤボンディ
ングしてから、プラスチックレジン5で樹脂封止し、そ
の後、アウターリード9間を切断することによりトラン
ジスタを作製した(図1(A)〜(C))。なおこの場
合、トランジスタ用リードフレームの素子載置部の裏面
10はモールドレジン5に覆われず、外部に露出する。
既述した様に、これは素子7からの発熱を放熱するため
である。
After the transistor element 7 is joined to the element mounting portion 6 by soldering, the transistor element 7 and the wire bonding portion 17 are wire-bonded with the Al wire 8 and then resin-sealed with the plastic resin 5. After that, a transistor was manufactured by cutting the outer leads 9 (FIGS. 1A to 1C). In this case, the back surface 10 of the element mounting portion of the transistor lead frame is not covered with the mold resin 5 and is exposed to the outside.
As described above, this is to radiate the heat generated from the element 7.

【0022】ここで、比較のために表裏面ともにNi−
P/光沢Ni2層めっきを設けたストライプめっき条か
ら作製した従来のリードフレームでも上記実施例と同様
にトランジスタを組立てた。
For comparison, both the front and back surfaces were made of Ni-
A transistor was assembled in the same manner as in the above-mentioned embodiment even with a conventional lead frame manufactured from a stripe plating strip provided with P / bright Ni two-layer plating.

【0023】次に、本実施例のリードフレームと比較例
のリードフレームとを用いてそれぞれ組立てたトランジ
スタを、塩酸によりpH3.0に調整した40℃の水溶
液中に放置し、外部に露出している素子載置部裏面10
の変色状況を観察した。pH3.0の塩酸水溶液に浸漬
した理由であるが、トランジスタのアウターリード9に
は通常、溶融はんだが設けられる。従ってリード9の酸
化皮膜を除去するため、塩酸、塩化亜鉛、有機酸等から
構成されるフラックスにリード9が浸漬され、その後、
溶融はんだ槽中に浸漬される。次に残留フラックスを除
去するために洗浄工程を経るが、洗浄が不十分である
と、フラックス中の酸によってめっき面が浸食されるこ
とが経験的に認められている。そこでフラックス成分の
残留を模擬したpH3.0の塩酸水溶液を準備し、組立
てたトランジスタを浸漬することにしたものである。
Next, the transistors respectively assembled using the lead frame of this example and the lead frame of the comparative example were left to stand in an aqueous solution of 40 ° C. adjusted to pH 3.0 with hydrochloric acid and exposed to the outside. Back of the element mounting part 10
The discoloration situation of was observed. Although it is the reason for the immersion in the hydrochloric acid aqueous solution of pH 3.0, the outer lead 9 of the transistor is usually provided with molten solder. Therefore, in order to remove the oxide film of the lead 9, the lead 9 is immersed in a flux composed of hydrochloric acid, zinc chloride, organic acid, etc.
Immersed in a molten solder bath. Next, a cleaning process is performed to remove the residual flux, but it is empirically recognized that if the cleaning is insufficient, the plating surface is eroded by the acid in the flux. Therefore, a hydrochloric acid aqueous solution having a pH of 3.0 simulating the residual flux components is prepared and the assembled transistor is immersed.

【0024】この結果、比較例のトランジスタは、外部
露出部である素子載置部裏面10のNi−P合金めっき
面が約20分間の浸漬で黒変色することが観察された。
しかし本実施例のリードフレームを用いたトランジスタ
は2時間後も変色は全く認められず、金属光沢を維持し
た。
As a result, in the transistor of the comparative example, it was observed that the Ni-P alloy plated surface of the device mounting portion rear surface 10 which is an externally exposed portion was discolored black by immersion for about 20 minutes.
However, the transistor using the lead frame of this example did not show any discoloration even after 2 hours, and maintained the metallic luster.

【0025】また、本実施例と比較例のリードフレーム
とを10枚ずつ350℃の恒温槽に入れ、10分間放置
した後、めっき面の変色状況を観察した。その結果、比
較例のリードフレームはNi−P合金めっき面が空気酸
化を受けて、僅かに黄変色することが認められた。これ
に対して本実施例のリードフレームは、Ni−P合金め
っき面はわずかに黄変色したが、素子載置部裏面10の
光沢Niめっきのみの面は変色が認められず金属光沢を
維持した。
Ten lead frames of this example and the comparative example were placed in a constant temperature bath at 350 ° C. for 10 minutes each, and then the discoloration of the plated surface was observed. As a result, in the lead frame of the comparative example, it was confirmed that the Ni—P alloy plated surface was subjected to air oxidation and slightly discolored. On the other hand, in the lead frame of the present example, the Ni-P alloy plated surface was slightly discolored in yellow, but the surface of the device mounting portion back surface 10 only having the bright Ni plating was not discolored and maintained the metallic luster. .

【0026】既述したように、Ni−P合金めっきはワ
イヤボンディング性およびはんだ付け性に優れためっき
膜であるが、変色現象が起きることがある。本実施例に
よるトランジスタ用リードフレームは、Ni−P合金め
っきを機能面にのみ設け、外部露出部となる素子載置部
裏面は、耐熱変色性や耐酸性に富んだ光沢Niめっき面
としたものである。これによって組立ての際の高温酸化
による黄変色およびフラックス残渣による黒変色がほと
んど発生しないことが確かめられた。なお、変色が発生
したからといって機能的特性が低下するわけではない
が、変色は商品価値を著しく低下させるため、その発生
は絶対防止すべき性質のものである。
As described above, the Ni-P alloy plating is a plating film having excellent wire bonding and soldering properties, but discoloration may occur. In the lead frame for a transistor according to this example, Ni—P alloy plating was provided only on the functional surface, and the back surface of the element mounting portion, which is the externally exposed portion, was a glossy Ni plating surface rich in heat discoloration resistance and acid resistance. Is. From this, it was confirmed that yellow discoloration due to high temperature oxidation and black discoloration due to flux residue hardly occurred during assembly. It should be noted that the occurrence of discoloration does not mean that the functional characteristics are deteriorated, but the discoloration markedly reduces the commercial value, and therefore the occurrence thereof is a property that should be absolutely prevented.

【0027】[0027]

【発明の効果】本発明によれば、Ni−P合金めっきを
機能面にのみ設け、外部露出面である素子載置部裏面に
は、耐熱変色性や耐酸性に富んだ光沢Niめっき面とし
たので、これによって組立ての際の外部露出面の変色不
良の発生を有効に防止することができる。
According to the present invention, the Ni-P alloy plating is provided only on the functional surface, and the back surface of the element mounting portion, which is the externally exposed surface, has a bright Ni plating surface rich in heat discoloration resistance and acid resistance. As a result, it is possible to effectively prevent the occurrence of discoloration defects on the externally exposed surface during assembly.

【図面の簡単な説明】[Brief description of drawings]

【図1】本実施例によるリードフレームを用いて組立て
たトランジスタの機能面透視概念図、横から透視した概
念図および素子載置部裏面の外観図。
FIG. 1 is a conceptual view of a functional surface of a transistor assembled using a lead frame according to the present embodiment, a conceptual view of a transistor viewed from the side, and an external view of the back surface of an element mounting portion.

【図2】本実施例で用いる異形銅合金条の斜視図。FIG. 2 is a perspective view of a modified copper alloy strip used in this embodiment.

【図3】本実施例による素子載置部およびワイヤボンデ
ィング部に当たる面側に光沢Niめっきを設ける際のマ
スキングテープ位置とめっき面とを示す異形銅合金条の
斜視図。
FIG. 3 is a perspective view of a modified copper alloy strip showing a masking tape position and a plated surface when a bright Ni plating is provided on the surface of the element mounting portion and the wire bonding portion according to the present embodiment.

【図4】本実施例による素子載置部の裏面側に光沢Ni
めっきを設ける際のマスキングテープ位置とめっき面と
を示す異形銅合金条の斜視図。
FIG. 4 shows a gloss Ni on the back surface side of the element mounting portion according to the present embodiment.
The perspective view of the variant copper alloy strip which shows the masking tape position at the time of providing plating, and a plating surface.

【図5】本実施例による機能面の光沢Niめっき上のみ
に更にNi−P合金めっきを設ける際に、裏面を被覆す
るマスキングテープ位置を示す異形銅合金条の斜視図。
FIG. 5 is a perspective view of a modified copper alloy strip showing the position of a masking tape that covers the back surface when Ni-P alloy plating is further provided only on the bright Ni plating on the functional surface according to the present embodiment.

【図6】本発明の実施例による片面がNi−P/光沢N
i2層ストライプめっき、もう一方の面が光沢Niスト
ライプめっきのみを設けたトランジスタ用リードフレー
ムとなるべき銅合金条の斜視図。
FIG. 6 is Ni-P / gloss N on one side according to an embodiment of the present invention.
FIG. 3 is a perspective view of a copper alloy strip to be a lead frame for a transistor, in which only i2 layer stripe plating and the other surface is provided with bright Ni stripe plating.

【符号の説明】[Explanation of symbols]

1 マスキングテープ 2 機能面めっき部位 3 マスキングテープ 4 素子載置部の裏面めっき部位 5 プラスチックレジン 6 素子載置部 7 トランジスタ素子 8 Al線(ボンディングワイヤ) 9 アウターリード 10 外部露出部としての素子載置部の裏面 11 マスキングテープ 12 トランジスタ用リードフレーム形状 13 Ni−P/光沢Ni2層めっき部 15 光沢Niめっき 16 Ni−P合金めっき 21 アウターリードとなるべき部分 23 アウターリードとなるべき部分 S 異形銅合金条 1 Masking tape 2 Functional surface plating part 3 Masking tape 4 Backside plating part of element mounting part 5 Plastic resin 6 Element mounting part 7 Transistor element 8 Al wire (bonding wire) 9 Outer lead 10 Device mounting as externally exposed part Back surface of the part 11 Masking tape 12 Lead frame shape for transistor 13 Ni-P / bright Ni 2 layer plating part 15 Bright Ni plating 16 Ni-P alloy plating 21 Part to be the outer lead 23 Part to be the outer lead S Deformed copper alloy Article

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】銅、銅合金または鉄合金からなる半導体装
置用リードフレームにおいて、少なくとも素子載置部、
ワイヤボンディング部および組立パッケージ後外部に露
出させる素子載置部の裏面に光沢Niめっきを設け、上
記素子載置部の裏面を除いた少なくとも素子載置部およ
びワイヤボンディング部に、さらにNi−P合金めっき
を設け、上記素子載置部の裏面にNi−P合金めっきを
設けないようにしたことを特徴とする半導体装置用リー
ドフレーム。
1. A lead frame for a semiconductor device made of copper, a copper alloy or an iron alloy, at least an element mounting portion,
A bright Ni plating is provided on the back surface of the wire bonding portion and the element mounting portion exposed to the outside after the assembly package, and at least the element mounting portion and the wire bonding portion excluding the back surface of the element mounting portion are further Ni-P alloy. A lead frame for a semiconductor device, wherein plating is provided, and the back surface of the element mounting portion is not provided with Ni-P alloy plating.
JP20824692A 1992-08-04 1992-08-04 Semiconductor device lead frame Pending JPH0661392A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20824692A JPH0661392A (en) 1992-08-04 1992-08-04 Semiconductor device lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20824692A JPH0661392A (en) 1992-08-04 1992-08-04 Semiconductor device lead frame

Publications (1)

Publication Number Publication Date
JPH0661392A true JPH0661392A (en) 1994-03-04

Family

ID=16553076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20824692A Pending JPH0661392A (en) 1992-08-04 1992-08-04 Semiconductor device lead frame

Country Status (1)

Country Link
JP (1) JPH0661392A (en)

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