JPH066018A - Printed board and manufacture thereof - Google Patents
Printed board and manufacture thereofInfo
- Publication number
- JPH066018A JPH066018A JP15911892A JP15911892A JPH066018A JP H066018 A JPH066018 A JP H066018A JP 15911892 A JP15911892 A JP 15911892A JP 15911892 A JP15911892 A JP 15911892A JP H066018 A JPH066018 A JP H066018A
- Authority
- JP
- Japan
- Prior art keywords
- film
- solder resist
- circuit board
- printed circuit
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、回路配線パターン上に
ソルダーレジストが塗布されたプリント基板およびその
製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board having a circuit wiring pattern coated with a solder resist and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】一般に回路配線パターンの形成されたプ
リント基板上には、電子部品を接続するスルーホールや
ランド部、さらには外部端子となる接続領域を除いてソ
ルダーレジストが塗布されている。周知のように、この
ソルダーレジストは、電子部品を基板に搭載、はんだ接
続する際に、回路配線パターンを絶縁保護するために保
護膜として形成されるもので、はんだ等の接続時には加
熱下に晒されるため例えばエポキシ系の耐熱性樹脂で構
成され、しかもリソグラフィ技術でパターン化するため
感光性を有するものが好ましく、例えば紫外線露光で硬
化する所謂ＵＶ硬化型ソルダーレジストが使用されてい
る。2. Description of the Related Art Generally, a printed circuit board having a circuit wiring pattern formed thereon is coated with a solder resist except for through holes and lands for connecting electronic parts, and connection regions for external terminals. As is well known, this solder resist is formed as a protective film to insulate and protect the circuit wiring pattern when mounting electronic components on the board and connecting them by solder, and it is exposed to heat when connecting solder or the like. For this reason, it is preferable to use, for example, a heat-resistant resin of epoxy type and a photosensitive material that is patterned by the lithography technique and has photosensitivity. For example, a so-called UV-curable solder resist that is cured by exposure to ultraviolet rays is used.
【０００３】プリント基板の製造時に、このＵＶ硬化型
ソルダーレジストをマスクとして、露出した回路構成部
に銅めっきをする場合、６０〜７０℃の高温で、しかも
ｐＨ１０〜１２という強アルカリの無電解銅めっき液の
過酷な条件下に晒されるため、めっき液に長時間（例え
ば１０時間以上）浸漬すると表層が侵食されて、経時的
に溶解する現象が起こる。したがって、プリント基板製
造メーカーの多くは、図２の（ｄ）工程〜（ｅ）工程に
例示するように無電解銅めっき４を形成した後にＵＶ硬
化型ソルダーレジスト５を塗布する工程を選択して、こ
の不良を回避していた。When copper is plated on the exposed circuit components by using this UV-curable solder resist as a mask when manufacturing a printed circuit board, a strong alkaline electroless copper having a high temperature of 60 to 70 ° C. and a pH of 10 to 12 is used. Since the plating solution is exposed to the harsh conditions, the surface layer is eroded when it is immersed in the plating solution for a long time (for example, 10 hours or more), and the plating solution dissolves over time. Therefore, most of the printed circuit board manufacturers select the step of applying the UV-curable solder resist 5 after forming the electroless copper plating 4 as illustrated in steps (d) to (e) of FIG. , I was avoiding this defect.
【０００４】また、最近では耐めっき液性のＵＶ硬化型
ソルダーレジストも開発され、前述の問題が解消されつ
つあるが、新たな問題としてソルダーレジスト５とそれ
を被覆した回路パターン（ライン）の銅箔表面が点状に
剥離すると云う現象が起こった。この剥離の問題につき
種々実験、検討した結果、ソルダーレジスト成分である
エポキシ樹脂を硬化するときの熱処理により、ラインの
銅箔表面が酸化され、エポキシ樹脂と銅箔との結合が阻
害され、その個所の密着力が弱まることによることが分
かった。したがって、この酸化を防止するために、加熱
による樹脂の硬化処理は非酸化性の例えば窒素充填式の
乾燥炉を使用する方法がとられている。Recently, a UV curable solder resist resistant to a plating solution has also been developed, and the above-mentioned problems are being solved. However, as a new problem, the solder resist 5 and the copper of the circuit pattern (line) covering it A phenomenon that the foil surface was peeled off in a dot shape occurred. As a result of various experiments and studies on this problem of peeling, the heat treatment when curing the epoxy resin, which is the solder resist component, oxidizes the copper foil surface of the line and inhibits the bonding between the epoxy resin and the copper foil. It was found that the adhesive strength of was weakened. Therefore, in order to prevent this oxidation, a method of using a non-oxidizing, for example, nitrogen-filling type drying furnace is used for the curing treatment of the resin by heating.
【０００５】上記ソルダーレジストの塗布工程を有する
二つのプリント基板の製造方法につき、以下に図２の工
程図を用いてさらに具体的に説明する。 〈従来例の１〉 （ａ）工程：銅箔８を両面に張った銅張積層板１に穴明
けを行ない、スルーホール２を形成する。A method of manufacturing two printed circuit boards having the solder resist coating step will be described more specifically below with reference to the process chart of FIG. <Conventional Example 1> Step (a): A through hole 2 is formed by making a hole in a copper clad laminate 1 having copper foils 8 on both sides.
【０００６】（ｂ）工程：触媒３を基板全面に吸着させ
る。Step (b): The catalyst 3 is adsorbed on the entire surface of the substrate.
【０００７】（ｃ）工程：所定パターンの回路マスクを
用いてエッチングにより、回路パターン８ａ、ランド８
ｂを形成する。Step (c): The circuit pattern 8a and the land 8 are formed by etching using a circuit mask having a predetermined pattern.
b is formed.
【０００８】（ｄ）工程：無電解銅めっき４をスルーホ
ール２内および回路パターン８ａ、ランド８ｂ上に析出
させる。Step (d): Electroless copper plating 4 is deposited in through hole 2 and on circuit pattern 8a and land 8b.
【０００９】（ｅ）工程：ＵＶ硬化型ソルダーレジスト
５を全面に塗布し、露光、現像を行ないスルーホール２
およびランド部４ａ（８ｂ）上のＵＶ硬化型ソルダーレ
ジスト５を溶解除去した後、乾燥炉により熱硬化する。Step (e): A UV-curable solder resist 5 is applied to the entire surface, exposed and developed to form through holes 2.
After the UV curing type solder resist 5 on the land portion 4a (8b) is dissolved and removed, it is thermally cured in a drying furnace.
【００１０】〈従来例の２〉（ａ）工程〜（ｃ）工程
は、従来例の１と同様。<Conventional Example 2> Steps (a) to (c) are the same as those in Conventional Example 1.
【００１１】（ｄ）工程：ソルダーレジスト５を全面に
塗布し、露光、現像を行ないスルーホール２およびラン
ド部のソルダーレジストを溶解除去した後、窒素充填式
乾燥炉により熱硬化する。Step (d): The solder resist 5 is applied to the entire surface, exposed and developed to dissolve and remove the solder resist in the through holes 2 and the land portion, and then thermally cured in a nitrogen filling type drying furnace.
【００１２】（ｅ）工程：ソルダーレジストを溶解除去
したスルーホール２およびランド部に無電解銅めっき４
を行なう。Step (e): Electroless copper plating 4 on the through holes 2 and lands where the solder resist is dissolved and removed.
Do.
【００１３】[0013]
【発明が解決しようとする課題】上記従来例の１に示し
たように、無電解銅めっき４をＵＶ硬化型ソルダ−レジ
スト５の塗布形成前に行なう工程では、銅のめっき液に
ＵＶ硬化型ソルダ−レジスト５を晒さないので回路パタ
ーンの酸化の問題は解消されるが、（ｄ）工程に示すよ
うに回路パターン形成後の銅めっきであるため、スル−
ホ−ル２以外のライン部（回路パターン）８ａまで銅め
っきを析出してしまい、ライン部が太くなり高密度、高
細線パタ−ンを形成するときの障害となる。また、銅め
っきされる領域が、スルーホール２やランド部のみなら
ず回路パターン全体となるので、銅めっき液の消費量が
多くなり、材料費のコストが上昇するという問題もあ
る。As shown in the above-mentioned conventional example 1, in the step of performing the electroless copper plating 4 before forming the UV-curable solder resist 5 by coating, the UV-curable copper plating solution is used. Since the solder resist 5 is not exposed, the problem of oxidation of the circuit pattern is solved, but as shown in step (d), the copper plating is performed after the circuit pattern is formed.
Copper plating is deposited even on the line portion (circuit pattern) 8a other than the hole 2, and the line portion becomes thick, which becomes an obstacle when forming a high-density and high-fine wire pattern. Further, since the area to be copper-plated is not only the through hole 2 and the land but the entire circuit pattern, there is a problem that the consumption of the copper plating solution is increased and the material cost is increased.
【００１４】また、従来例の２の場合は、銅めっき液に
対する耐性を改善したＵＶ硬化型ソルダ−レジストを使
用するため、銅めっきをＵＶ硬化型ソルダ−レジスト５
の塗布形成後に行なう工程とすることが可能であり、従
来例の１のようにライン部がめっき太りになると云う問
題は解消される。しかし、銅パターンの酸化防止をしな
がらＵＶ硬化型ソルダ−レジスト５を加熱硬化するため
に使用する窒素充填式乾燥炉は、大型のプリント基板
（600×600サイズ）の場合に、特別な仕様になるため設
備コストが高くなること、また、バッチ方式による処理
のため量産性に問題があった。Further, in the case of the conventional example 2, since the UV curing type solder resist having improved resistance to the copper plating solution is used, the copper plating is changed to the UV curing type solder resist 5.
It is possible to carry out the step after the coating formation, and the problem that the line portion becomes thicker in plating as in the conventional example 1 is solved. However, the nitrogen-filled drying oven used for heating and curing the UV-curable solder resist 5 while preventing the copper pattern from being oxidized has special specifications for large printed circuit boards (600 x 600 size). Therefore, there is a problem in that the facility cost is high and the mass productivity is due to the batch process.
【００１５】したがって、本発明の目的は上記従来の問
題点を解決することにあり、その第１の目的は、ソルダ
−レジストの乾燥時におけるレジスト内部でのライン部
表面の酸化を防止し、無電解銅めっき処理の条件下にお
いても、ライン部とソルダ−レジストとの密着力を劣化
させず、信頼性の高い高密度配線を可能とする改良され
たプリント基板を、そして第２の目的は、その製造方法
をそれぞれ提供することにある。Therefore, an object of the present invention is to solve the above-mentioned conventional problems, and the first object thereof is to prevent oxidation of the surface of the line portion inside the resist when the solder resist is dried, An improved printed circuit board that enables highly reliable and high-density wiring without deteriorating the adhesion between the line portion and the solder resist even under the conditions of electrolytic copper plating, and the second purpose is to It is to provide each of the manufacturing methods.
【００１６】[0016]
【課題を解決するための手段】上記第１の目的は、銅張
積層板に、スル−ホ−ル、ランドからなる部品接続部
と、導体回路（ライン部）と、外部接続端子とが配置さ
れると共に、前記部品接続部および外部接続端子を除く
少なくとも前記導体回路上をソルダ−レジストで被覆し
て成るプリント基板であって、前記ソルダ−レジストが
被覆された導体回路上に銅と錯体構造を形成した皮膜を
０．５〜３．０μｍ形成して成るプリント基板により、
達成される。A first object of the present invention is to arrange a component connecting portion including a through hole and a land, a conductor circuit (line portion), and an external connecting terminal on a copper clad laminate. And a copper-complex structure on the conductor circuit coated with the solder resist, which is a printed circuit board formed by coating at least the conductor circuit except the component connection portion and the external connection terminal with a solder resist. With a printed circuit board formed by forming a film having a thickness of 0.5 to 3.0 μm,
To be achieved.
【００１７】銅と錯体構造を形成した皮膜としては、銅
の酸化を防止することができ、かつソルダ−レジストと
の結合を劣化させない皮膜であれば良く、例えばアルキ
ルイミダゾールのごときイミダゾール系化合物を銅表面
で反応させた錯体構造の皮膜が好ましい。皮膜の厚みが
重要であるため、皮膜を形成せずに単に銅と錯塩を形成
する錯形成剤で処理したものでは効果が不十分であり、
目的を達成することができない。The film forming a complex structure with copper may be any film which can prevent the oxidation of copper and which does not deteriorate the bond with the solder resist. For example, an imidazole compound such as an alkylimidazole can be used as a copper film. A film having a complex structure reacted on the surface is preferable. Since the thickness of the film is important, the effect is not sufficient if treated with a complexing agent that forms a complex salt with copper without forming the film,
I cannot achieve my purpose.
【００１８】この皮膜の厚みがソルダ−レジストの密着
性に及ぼす影響について、図４により具体的に説明する
と、図示のように銅と錯体構造を形成した皮膜は薄すぎ
ても厚すぎても好ましくないことが分かる。前述の通り
０．５〜３μｍが好ましく、更に好ましくは、１．０〜
２．５μｍである。３．０μｍを超えると、レジストと
皮膜の層間で剥離の傾向が徐々に増大し、また、０．５
μｍよりも薄くなると皮膜が粗に形成されているため、
レジストとライン間に点々と剥離が生じ密着性に悪い影
響を及ぼすことが分かった。なお、この図の縦軸の剥離
幅は、ソルダ−レジストが塗布されたプリント基板を目
視による外観検査により剥離の程度を測定したもので、
レジストが配線から剥離していとその部分が配線回路の
パターン形状に沿ってライン状に白く観察され、その幅
を測定したものである。密着している場合には白い点あ
るいはラインが観測されない。The effect of the thickness of the film on the adhesion of the solder resist will be described in detail with reference to FIG. 4. As shown in the figure, the film having a complex structure with copper is preferably either too thin or too thick. I know there isn't. As described above, the thickness is preferably 0.5 to 3 μm, more preferably 1.0 to 3 μm.
It is 2.5 μm. If it exceeds 3.0 μm, the tendency of peeling between the resist layer and the film layer gradually increases, and 0.5
When the thickness is less than μm, the film is coarsely formed,
It was found that peeling occurred between the resist and the line, which adversely affected the adhesion. The peeling width on the vertical axis in this figure is the degree of peeling measured by visual inspection of the printed circuit board coated with the solder resist.
When the resist is peeled off from the wiring, the portion is observed in white in a line shape along the pattern shape of the wiring circuit, and the width is measured. No white dots or lines are observed when they are in close contact.
【００１９】ソルダ−レジストとしては、ＵＶ硬化型ソ
ルダ−レジストが好ましいが、これに限らず、その他周
知の熱硬化型ソルダ−レジスト、光硬化型ソルダ−レジ
スト等の耐熱性（半田処理に耐えれば良い）とレジスト
としてのパターン化が可能な絶縁材料であれば何れのも
のでも使用できる。ただし、製造方法の項で後述するよ
うに、ソルダ−レジストは無電解銅めっき液（一般に強
アルカリ）に溶解しない耐めっき液性のソルダ−レジス
トを適用することが必要となる。その理由は、無電解銅
めっきは、一般に析出速度が遅いため（例えば１〜４μ
ｍ／ｈ）、数十μｍのスル−ホ−ルめっきを必要とする
場合、高ｐＨで、しかも高温の環境下に長時間浸漬しな
ければならないからである。As the solder resist, a UV-curable solder resist is preferable, but the solder resist is not limited to this, and heat resistance of other well-known thermosetting solder resist, photocurable solder resist, etc. (if it can withstand soldering, (Good) and any insulating material that can be patterned as a resist can be used. However, as described later in the section of the manufacturing method, it is necessary to apply a plating resisting solder resist that does not dissolve in the electroless copper plating liquid (generally strong alkali). The reason is that electroless copper plating generally has a slow deposition rate (for example, 1 to 4 μm).
This is because, when the through-hole plating of m / h) and several tens of μm is required, it has to be immersed in a high-pH environment for a long time at a high pH.
【００２０】なお、スルーホール内には無電解銅めっき
の下地として、無電解Ｎｉめっき、無電解銅めっきの如
き導体を形成しておくこともできる。A conductor such as electroless Ni plating or electroless copper plating may be formed in the through hole as a base of electroless copper plating.
【００２１】上記第２の目的は、銅張積層板に（ａ）例
えばドリルやパンチでスル−ホ−ルの穴あけを行なう工
程と、（ｂ）少なくともスルーホール内へ触媒を付与す
る工程と、（ｃ）所定のレジストマスクパターンを用い
てランドと外部接続端子を含む導体回路（ライン部）パ
ターンとをエッチングにより形成する工程と、（ｄ）基
板表面に皮膜形成用錯形成剤を塗布し、ランド及び導体
回路表面の銅と反応させて厚さ０．５〜３μｍの錯体構
造皮膜を形成する工程と、（ｅ）耐めっき液性のソルダ
−レジストを全面に塗布し、スル−ホ−ル、ランド部及
び外部接続端子上のソルダ−レジストを選択的に除去
し、熱硬化する工程と、（ｆ）ソルダ−レジストの除去
された領域（スル−ホ−ル、ランド部及び外部接続端
子）に前処理として錯体構造皮膜を溶解除去してから、
無電解銅めっきを施す工程とを有して成るプリント基板
の製造方法により、達成される（第１の製造方法）。The second object is to: (a) drill a through hole in the copper clad laminate with, for example, a drill or punch; and (b) apply a catalyst into at least the through hole. (C) a step of forming a land and a conductor circuit (line portion) pattern including an external connection terminal by etching using a predetermined resist mask pattern; and (d) applying a film-forming complex forming agent to the substrate surface, A step of reacting with copper on the surface of the land and the conductor circuit to form a complex structure film having a thickness of 0.5 to 3 μm; and (e) a plating solution resistant solder resist is applied to the entire surface to form a through hole. A step of selectively removing and thermally curing the solder resist on the land portion and the external connection terminal; and (f) a region where the solder resist is removed (through hole, land portion and external connection terminal). As a pretreatment After dissolving and removing the structure film,
This is achieved by a method for manufacturing a printed circuit board including a step of applying electroless copper plating (first manufacturing method).
【００２２】好ましい製造方法として、上記耐めっき液
性のソルダ−レジストを感光性を有するＵＶ硬化型ソル
ダ−レジストとした場合には、スル−ホ−ル、ランド部
及び外部接続端子がマスキングされたマスクを介してＵ
Ｖ露光し、マスキング部分以外を光硬化させる。その
後、未露光部を有機溶剤の現像液で溶解除去し、乾燥炉
にいれてＵＶ硬化型ソルダ−レジストを熱硬化させ、無
電解銅めっきを施す工程とすればよい。As a preferred manufacturing method, when the plating resisting liquid solder resist is a UV curable solder resist having photosensitivity, the through holes, lands and external connection terminals are masked. U through the mask
V-exposure is performed, and the portion other than the masking portion is photocured. Then, the unexposed portion may be dissolved and removed with a developing solution of an organic solvent, placed in a drying oven to thermally cure the UV curable solder resist, and electroless copper plating may be performed.
【００２３】また、基板表面に錯形成剤を塗布する方法
としては種々の塗布方法が用いられるが、例えば浸漬、
シルクスクリーン、スプレー、ローラー方式等によって
塗布することができる。Various coating methods may be used to coat the substrate surface with the complex-forming agent. For example, dipping,
It can be applied by silk screen, spray, roller method or the like.
【００２４】なお、（ｄ）工程の皮膜形成用錯形成剤と
しては、銅の酸化を防止する防錆剤としての作用とソル
ダーレジストとの良好な結合性とを有するものが使用さ
れ、アルキルイミダゾールの如きイミダゾール化合物、
ベンゾトリアゾール、ベンゾチアゾール等の不対電子を
有する含窒素有機化合物が好ましい。また、錯体構造皮
膜の形成時の反応条件としては、皮膜形成用錯形剤を塗
布して常温〜６０℃で反応させる。膜厚調整は、基板を
溶液に接触させる時間を制御することにより容易に行な
うことができ、時間を長くすれば膜厚は厚くなる。As the complex-forming agent for forming the film in the step (d), a compound having an action as a rust preventive for preventing the oxidation of copper and a good bondability with a solder resist is used, and alkyl imidazole is used. An imidazole compound such as
Nitrogen-containing organic compounds having unpaired electrons such as benzotriazole and benzothiazole are preferable. In addition, as a reaction condition for forming the complex structure film, a complexing agent for film formation is applied and reacted at room temperature to 60 ° C. The film thickness can be easily adjusted by controlling the time during which the substrate is brought into contact with the solution, and the longer the time, the thicker the film becomes.
【００２５】また、（ｆ）工程の無電解銅めっきを施す
工程において、銅箔上に形成された銅と錯体構造になる
皮膜は銅めっきの前処理で容易に溶解可能でなければな
らない。これが残渣していると、ボイド不良などの銅め
っき品質を悪化させる原因となる。溶解処理液として
は、塩酸、硫酸、硝酸の如き無機酸、もしくは例えば過
硫酸ソーダの如き過酸化物の２〜３重量％溶液が用いら
れる。Further, in the step (f) of performing electroless copper plating, the film formed on the copper foil and having a complex structure with copper must be easily soluble by the pretreatment of copper plating. If this remains, it becomes a cause of deteriorating the copper plating quality such as void defects. As the dissolution treatment liquid, a 2 to 3 wt% solution of an inorganic acid such as hydrochloric acid, sulfuric acid or nitric acid, or a peroxide such as sodium persulfate is used.
【００２６】また、上記第２の目的は、次の第２の製造
方法によっても、達成される。すなわち、銅張積層板に
例えばドリルやパンチによりスル−ホ−ルを形成した
後、触媒を基板全面に吸着させ、無電解Ｎｉめっきを
０．５〜１．０μｍ析出させる。さらに、基板表面を研
磨してＮｉめっきを除去した後（Ｎｉめっきはスルーホ
ール内にのみ残す）、電着型ＵＶレジストによりランド
と外部接続端子を含む導体回路（ライン部）以外がマス
キングされたマスクを用いＵＶ露光機により露光する。
さらに、現像により回路パターンを描きエッチングによ
りランド及び導体回路パターンを形成する。The second object can also be achieved by the following second manufacturing method. That is, after forming a through hole on a copper clad laminate with, for example, a drill or a punch, a catalyst is adsorbed on the entire surface of the substrate and electroless Ni plating is deposited to 0.5 to 1.0 μm. Further, after polishing the surface of the substrate to remove the Ni plating (the Ni plating is left only in the through holes), the electrodeposition type UV resist masks parts other than the conductor circuit (line part) including the land and the external connection terminal. It exposes with a UV exposure machine using a mask.
Further, a circuit pattern is drawn by development and a land and a conductor circuit pattern are formed by etching.
【００２７】この後の工程は、前述した第１の製造方法
における（ｄ）工程の基板表面に皮膜形成用錯形成剤を
塗布し、ランド及び導体回路表面の銅と反応させて厚さ
０．５〜３μｍの錯体構造皮膜を形成する工程に続き、
以下同様の工程にしたがって行なう。この方法はスルー
ホールの銅めっきの下地としてＮｉめっきを行なうもの
であり、銅めっき時の電蝕対策として下地導体を形成し
ておくものであることから、Ｎｉめっきの代わりにその
他のめっき容易な導体金属を形成してもよい。なお、無
電解Ｎｉめっきの厚さは０．５μｍ以上が好ましい。さ
らに、好ましくは０．５〜１．０μｍがよい。０．５μ
ｍより薄いと、粗いめっきになるため電着型ＵＶレジス
トでスル−ホ−ル内を完全に皮膜することが出来ない。
したがって、触媒が露出した箇所は、エッチング液によ
り溶解除去されてしまいスル−ホ−ルボイドの原因とな
る。また、Ｎｉめっき液は高価なため、必要以上に厚く
せず長寿命化による原価低減の点からも０．５〜１．０
μｍが好ましい。In the subsequent steps, the film forming complex-forming agent is applied to the substrate surface in the step (d) in the above-mentioned first manufacturing method, and reacted with the lands and the copper on the surface of the conductor circuit to have a thickness of 0. Following the step of forming a 5 to 3 μm complex structure film,
Thereafter, the same steps are performed. In this method, Ni plating is performed as a base for copper plating of through holes, and since a base conductor is formed as a countermeasure against electrolytic corrosion during copper plating, other plating can be easily performed instead of Ni plating. Conductor metal may be formed. The thickness of the electroless Ni plating is preferably 0.5 μm or more. Further, it is preferably 0.5 to 1.0 μm. 0.5μ
If the thickness is less than m, the plating will be rough and the inside of the through-hole cannot be completely coated with the electrodeposition UV resist.
Therefore, the exposed portion of the catalyst is dissolved and removed by the etching solution, which becomes a cause of through-hole voids. In addition, since the Ni plating solution is expensive, 0.5 to 1.0 is also required from the viewpoint of reducing the cost by prolonging the life without thickening it more than necessary.
μm is preferred.
【００２８】さらにまた、上記第２の目的は、次の第３
の製造方法によっても、達成される。 すなわち、上記
第１の製造方法における（ｂ）工程の少なくともスルー
ホール内へ触媒を付与する工程の後に、無電解銅めっき
を２．５〜１０．０μｍ形成する工程を付加する。これ
により少なくともスルーホール内に予め第１の銅めっき
を形成しておく。以降、上記第１の製造方法と同様な工
程を行なう。この製造法によればスルーホール内は第
１、第２〔第１の製造方法における（ｆ）工程の銅めっ
き〕の二重の銅めっきが行なわれる。Furthermore, the above second object is the following third object.
It is also achieved by the manufacturing method of. That is, a step of forming electroless copper plating in a thickness of 2.5 to 10.0 μm is added after at least the step of applying the catalyst into the through holes in the step (b) in the first manufacturing method. Thereby, at least the first copper plating is formed in advance in the through holes. After that, steps similar to those of the first manufacturing method are performed. According to this manufacturing method, double copper plating of the first and second [copper plating in step (f) in the first manufacturing method] is performed in the through hole.
【００２９】この場合の第１の無電解銅めっき膜厚は、
２．５μｍ以上が好ましい。また、好ましくは３．０〜
１０．０μｍである。膜厚が２．５μｍよりも薄い場
合、第２の無電解銅めっきの前処理であるソフトエッチ
ング液（第２の銅めっき前の表面清浄化処理）で銅めっ
きが全て溶解され、そのときに触媒も一緒に一部脱落し
て、局所的にスル−ホ−ルボイドが発生することがあ
り、厚みについては注意を要する。In this case, the first electroless copper plating film thickness is
It is preferably 2.5 μm or more. Also, preferably 3.0 to
It is 10.0 μm. When the film thickness is thinner than 2.5 μm, the copper plating is completely dissolved by the soft etching solution (surface cleaning treatment before the second copper plating) which is the pretreatment for the second electroless copper plating, and at that time, The catalyst may partly fall off together with the formation of sul-hole voids locally, and caution is required regarding the thickness.
【００３０】[0030]
【作用】ソルダ−レジストが被覆された導通回路パタ−
ン上に、表面処理膜として設けた銅と錯体構造を形成す
る皮膜は、図４に示したように０．５〜３．０μｍの厚
さで、ソルダ−レジストの剥離を充分に防止することが
でき、密着性の良好なソルダ−レジストの形成を容易と
する。それによって、レジスト内部でのライン銅箔表面
の酸化を防止することができるので、無電解銅めっき条
件下において、ソルダ−レジストとライン銅箔表面が剥
離せず、信頼性の高いプリント基板を実現することがで
きる。Operation: Conductor circuit pattern coated with solder resist
The film that forms a complex structure with copper, which is provided as a surface treatment film on the solder, has a thickness of 0.5 to 3.0 μm as shown in FIG. 4 and should sufficiently prevent the peeling of the solder resist. And facilitates formation of a solder resist having good adhesion. As a result, oxidation of the line copper foil surface inside the resist can be prevented, so the solder resist and line copper foil surface do not peel off under electroless copper plating conditions, and a highly reliable printed circuit board is realized. can do.
【００３１】[0031]
【実施例】以下、本発明の実施例を図面を用いて説明す
る。 〈実施例１〉図１は、本発明のプリント基板の製造方法
の一例を説明する工程図であり、以下、図示の（ａ）工
程〜（ｆ）工程に従い、その内容を順次説明する。 （ａ）工程：両面に銅箔８を張り合わせた銅張積層板１
に、ドリル又はパンチにより穴あけを行ないスルーホー
ル２を形成する。 （ｂ）工程：基板１をパラジウムとスズを含むコロイド
溶液に浸漬し、基板全面に触媒３を吸着、付与する。Embodiments of the present invention will be described below with reference to the drawings. <Embodiment 1> FIG. 1 is a process chart for explaining an example of a method for manufacturing a printed circuit board according to the present invention. The contents will be sequentially described below in accordance with the steps (a) to (f) shown in the drawing. Step (a): Copper-clad laminate 1 in which copper foils 8 are attached to both sides
Then, a through hole 2 is formed by drilling with a drill or a punch. Step (b): The substrate 1 is dipped in a colloidal solution containing palladium and tin to adsorb and apply the catalyst 3 on the entire surface of the substrate.
【００３２】（ｃ）工程：導通回路パタ−ン８ａを形成
する。パターン形成方法としては、まず、基板表面をブ
ラシで整面後、ＵＶ硬化型ドライフィルムを熱圧着し、
ランド及び外部接続端子を含む回路パターン（ライン
部）８ａ以外がマスキングされたマスクを両面に密着さ
せ、超高圧水銀灯を用いた高真空露光機により、４０〜
８００ｍｊ／ｃｍ2の露光量で焼付けを行なう。その
後、アルカリ型現像液により未露光部を溶解除去し、ド
ライフィルムのマスクパターンを形成し、アルカリエッ
チング液により、露出した銅箔を溶解する。そして、不
要なＵＶ硬化型ドライフィルムをＮａＯＨを含有した剥
離液で除去する。Step (c): Conducting circuit pattern 8a is formed. As a pattern forming method, first, the surface of the substrate is prepared with a brush, and then a UV curable dry film is thermocompression-bonded,
A mask masked except for the circuit pattern (line portion) 8a including the land and the external connection terminal is brought into close contact with both sides, and a high vacuum exposure machine using an ultra-high pressure mercury lamp is used to
Baking is performed with an exposure amount of 800 mj / cm 2 . After that, the unexposed portion is dissolved and removed with an alkaline developing solution, a mask pattern of a dry film is formed, and the exposed copper foil is dissolved with an alkaline etching solution. Then, the unnecessary UV-curable dry film is removed with a stripping solution containing NaOH.
【００３３】（ｄ）工程：銅箔と錯体構造を形成する皮
膜６を銅箔パターン上に形成する。錯体構造の皮膜形成
方法としては、基板全面に皮膜形成用錯形成剤を噴射、
塗布し、常温で成膜した。皮膜形成用錯形成剤としては
市販のアルキルイミダゾール系化合物を使用した。皮膜
の厚さと成膜時間との関係は図５に示すとおりであり、
約１５分の噴射で、１．５μｍ形成した。Step (d): A film 6 forming a complex structure with the copper foil is formed on the copper foil pattern. As a method for forming a film having a complex structure, a film-forming complexing agent is sprayed on the entire surface of the substrate,
It was applied and formed into a film at room temperature. A commercially available alkyl imidazole compound was used as the complex-forming agent for forming a film. The relationship between the film thickness and the film formation time is as shown in FIG.
A jet of about 15 minutes formed 1.5 μm.
【００３４】（ｅ）工程：ＵＶ硬化型ソルダ−レジスト
５を全面に塗布し仮乾燥を行なう。そして、スル−ホ−
ル２、ランド部分８ｂ及び図示されていない外部電極接
続端子がマスキングされたマスクを用いて基板に密着さ
せ、高真空露光機により８０〜８００ｍｊ／ｃｍ2照射
して、マスクから露出した領域を光硬化させる。さら
に、現像液として1，1，1−トリクロロエタンを用いて
未露光部を溶解除去し、通常の乾燥炉に入れて１４０〜
１６０℃でＵＶ硬化型ソルダ−レジスト５を熱硬化す
る。Step (e): The UV-curable solder resist 5 is applied to the entire surface and temporarily dried. And through
And the land portion 8b and an external electrode connection terminal (not shown) are masked to be closely attached to the substrate and irradiated with 80 to 800 mj / cm 2 by a high vacuum exposure machine to expose the area exposed from the mask to light. Let it harden. Further, the unexposed portion is dissolved and removed by using 1,1,1-trichloroethane as a developing solution, and the mixture is put in an ordinary drying oven to remove 140-
The UV-curable solder resist 5 is thermally cured at 160 ° C.
【００３５】（ｆ）工程：過硫酸ソ−ダを含有したソフ
トエッチング溶液を用いて、露出した導体上の銅と錯体
構造を成す皮膜６を溶解除去した後、無電解銅めっき４
を行なう。Step (f): Using a soft etching solution containing soda persulfate to dissolve and remove the film 6 which forms a complex structure with copper on the exposed conductor, electroless copper plating 4
Do.
【００３６】〈実施例２〉実施例１の（ｂ）工程と
（ｃ）工程との間に、無電解Ｎｉめっき工程を付加し、
めっき液中に基板を浸漬してＮｉめっきを０．５〜１．
０μｍ析出させる。めっき終了後、基板表面を研磨し、
銅箔８上のＮｉめっきを除去し、スルーホール２内にの
みＮｉめっきを残した。次いで、実施例１の（ｃ）工程
におけるＵＶ硬化型ドライフィルムの代わりに、電着型
ＵＶレジストを用いて基板に塗布し、ランド及び外部接
続端子を含む回路パターン（ライン部）８ａ以外がマス
キングされたマスクを両面に密着させ、超高圧水銀灯を
用いた高真空露光機により露光する。さらに、現像によ
り回路パターンを描きマスクを形成する。このマスクを
用いて銅箔８を選択的にエッチングすることにより回路
パターン８ａを形成する。これ以降の工程は、実施例１
の（ｄ）〜（ｆ）工程にしたがって実施した。このよう
にして得られたプリント基板の要部断面図を図３に示し
た。図示のように、スルーホール２内は、下地膜として
のＮｉめっき７と銅めっき４の二層構造となる。<Example 2> An electroless Ni plating step is added between the steps (b) and (c) of Example 1,
The substrate is immersed in a plating solution and Ni plating is performed for 0.5 to 1.
Precipitate to 0 μm. After plating, polish the substrate surface,
The Ni plating on the copper foil 8 was removed, and the Ni plating was left only in the through holes 2. Then, instead of the UV-curable dry film in the step (c) of Example 1, an electrodeposition UV resist is used to coat the substrate, and masks except for the circuit pattern (line portion) 8a including lands and external connection terminals. The mask thus formed is adhered to both sides and exposed by a high vacuum exposure machine using an ultra-high pressure mercury lamp. Further, a circuit pattern is drawn by development to form a mask. The circuit pattern 8a is formed by selectively etching the copper foil 8 using this mask. The subsequent steps are the same as those in Example 1.
It carried out according to the steps (d) to (f). A cross-sectional view of the main part of the printed circuit board thus obtained is shown in FIG. As shown in the figure, the through hole 2 has a two-layer structure of Ni plating 7 and copper plating 4 as a base film.
【００３７】〈実施例３〉この実施例は、実施例２の変
形例で、図３に示したスルーホール２内の下地めっきと
してのＮｉめっき７の代わりに、銅めっきを施すもので
ある。したがってスルーホール２内は、下地膜として形
成した第１の銅めっき（Ｎｉめっき７に相当するもの）
と第２の銅めっき４（実施例１及び２の銅めっき４と同
一）の二層構造となる。<Third Embodiment> This embodiment is a modification of the second embodiment, in which copper plating is applied instead of the Ni plating 7 as the underlying plating in the through hole 2 shown in FIG. Therefore, the inside of the through hole 2 is the first copper plating (corresponding to the Ni plating 7) formed as a base film.
And a second copper plating 4 (same as the copper plating 4 of Examples 1 and 2) has a two-layer structure.
【００３８】すなわち、この実施例について具体的に説
明すると、実施例１の（ｂ）工程と（ｃ）工程との間
に、第１の銅めっき工程としての無電解銅めっき工程を
付加し、めっき液中に基板を浸漬して銅めっきを３．０
〜１０．０μｍ析出させる。これ以降の工程は、実施例
１の（ｃ）〜（ｆ）工程にしたがって実施した。More specifically, this embodiment will be described in detail. An electroless copper plating step as a first copper plating step is added between the steps (b) and (c) of Example 1, Immerse the substrate in the plating solution and apply the copper plating to 3.0
~ 10.0 μm is deposited. The subsequent steps were performed according to the steps (c) to (f) of Example 1.
【００３９】〈実施例４〉実施例１の（ａ）〜（ｄ）工
程まで同一工程を実施し、（ｅ）工程として実施例１で
使用したＵＶ硬化型ソルダ−レジスト５の代わりに熱硬
化型ソルダ−レジストを、スル−ホ−ル２、ランド部分
８ｂ及び図示されていない外部電極接続端子がマスキン
グされたシルクスクリーン版を用いて全面に塗布し、こ
の後、基板を通常の乾燥炉に入れて１４０〜１６０℃で
熱硬化型ソルダ−レジストを硬化する。次いで、実施例
１と同様に（ｆ）工程を実施した。すなわち、過硫酸ソ
−ダを含有したソフトエッチング溶液を用いて、露出し
た導体上の銅と錯体構造を成す皮膜６を溶解除去した
後、無電解銅めっき４を行った。<Example 4> The same steps as steps (a) to (d) of Example 1 were carried out, and as the step (e), heat curing was carried out instead of the UV-curable solder resist 5 used in Example 1. Type solder resist is applied to the entire surface by using a silk screen plate in which the through holes 2, the land portions 8b and the external electrode connecting terminals (not shown) are masked, and then the substrate is placed in a normal drying oven. Then, the thermosetting solder resist is cured at 140 to 160 ° C. Then, step (f) was performed in the same manner as in Example 1. That is, the electroless copper plating 4 was performed after the exposed film 6 of the conductor forming a complex structure with copper was dissolved and removed using a soft etching solution containing sodium persulfate.
【００４０】[0040]
【発明の効果】上述したように、本発明により所期の目
的を達成することができた。すなわち、プリント基板
は、ソルダ−レジストを塗布した後の乾燥時に発生する
レジストとライン銅箔表面の酸化を防止することができ
るため、無電解銅めっき条件下においてもレジストとラ
イン銅箔表面の剥離が生じない。従って、工程を付加す
るだけで従来の工程を変更する必要がないため、導通回
路パタ−ンを細線化することができる。即ち、より高密
度なプリント基板が製造できる。As described above, according to the present invention, the intended purpose can be achieved. That is, the printed circuit board can prevent the resist and the line copper foil surface from being oxidized during the drying after applying the solder resist, so that the resist and the line copper foil surface can be separated even under the electroless copper plating condition. Does not occur. Therefore, since it is not necessary to change the conventional process only by adding the process, the conductive circuit pattern can be thinned. That is, a higher-density printed circuit board can be manufactured.
【図１】本発明の一実施例となるプリント基板の製造工
程を示す工程概略図。FIG. 1 is a process schematic diagram showing a manufacturing process of a printed circuit board according to an embodiment of the present invention.
【図２】従来のプリント基板の製造工程を示す工程概略
図。FIG. 2 is a process schematic diagram showing a conventional process for manufacturing a printed circuit board.
【図３】本発明の他の実施例となるプリント基板の要部
断面図。FIG. 3 is a cross-sectional view of a main part of a printed circuit board according to another embodiment of the present invention.
【図４】同じく本発明の一実施例となるもので、銅と錯
体構造になる皮膜の厚さが、ソルダ−レジストとライン
銅箔表面との剥離幅に及ぼす影響について計測した特性
曲線図。FIG. 4 is a characteristic curve diagram, which is also an example of the present invention, in which the effect of the thickness of a film having a complex structure with copper on the peeling width between the solder resist and the surface of the line copper foil is measured.
【図５】同じく本発明の一実施例となるもので、銅と錯
体構造になる皮膜の厚さと成膜時間との関係を示した特
性曲線図。FIG. 5 is a characteristic curve diagram showing the relationship between the thickness of a film forming a complex structure with copper and the film forming time, which is also an example of the present invention.
１…銅張積層板、 ２…スル−ホ
−ル、３…触媒、 ４…無
電解銅めっき、５…ＵＶ硬化型ソルダ−レジスト、
６…銅と錯体構造になる皮膜、７…無電解Ｎｉめっ
き、 ８…銅箔、８ａ…回路パターン、
８ｂ（４ａ）…ランド。DESCRIPTION OF SYMBOLS 1 ... Copper clad laminated board, 2 ... Through-hole, 3 ... Catalyst, 4 ... Electroless copper plating, 5 ... UV curable solder resist,
6 ... A film that forms a complex structure with copper, 7 ... Electroless Ni plating, 8 ... Copper foil, 8a ... Circuit pattern,
8b (4a) ... Land.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 浜岡 伸夫 神奈川県横浜市戸塚区戸塚町216番地株式 会社日立製作所情報通信事業部内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Nobuo Hamaoka Inventor Nobuo Hamaoka 216 Totsuka-cho, Totsuka-ku, Yokohama-shi Kanagawa Ltd. Information & Communication Division, Hitachi, Ltd.
Claims (17)
らなる部品接続部と、外部接続端子を含む導体回路とが
配置されると共に、前記部品接続部及び外部接続端子を
除く少なくとも前記導体回路上をソルダ−レジストで被
覆して成るプリント基板であって、前記ソルダ−レジス
トが被覆された導体回路上に銅と錯体構造を形成した皮
膜を０．５〜３．０μｍ形成して成るプリント基板。1. A copper clad laminate is provided with a component connecting portion including a through hole and a land and a conductor circuit including an external connecting terminal, and at least the component connecting portion and the external connecting terminal are excluded. A printed circuit board obtained by coating the conductor circuit with a solder resist, wherein a film having a complex structure with copper is formed in a thickness of 0.5 to 3.0 μm on the conductor circuit coated with the solder resist. Printed circuit board.
酸化を防止することができ、かつソルダ−レジストとの
結合を劣化させない不対電子を有する含窒素有機化合物
の錯体構造皮膜から成る請求項１記載のプリント基板。2. A complex structure film of a nitrogen-containing organic compound having an unpaired electron capable of preventing the oxidation of copper and preventing the bond with a solder resist from deteriorating. The printed circuit board according to claim 1, wherein the printed circuit board comprises:
イミダゾール系化合物から成る請求項２記載のプリント
基板。3. The printed circuit board according to claim 2, wherein the nitrogen-containing organic compound having an unpaired electron is an imidazole compound.
ダ−レジスト、熱硬化型ソルダ−レジスト及び光硬化型
ソルダ−レジストの何れかから選択される耐熱性と耐銅
めっき液性とを有するレジストで構成して成る請求項１
乃至３何れか記載のプリント基板。4. A resist having heat resistance and copper plating solution resistance, wherein the solder resist is selected from a UV-curable solder resist, a thermosetting solder resist, and a photocurable solder resist. Claim 1 which consists of
4. The printed board according to any one of 3 to 3.
地膜として、導体膜を形成して成る請求項１乃至４何れ
か記載のプリント基板。5. The printed circuit board according to claim 1, wherein a conductor film is formed as a base film for electroless copper plating in the through hole.
無電解Ｎｉめっきとするか、膜厚２．５〜１０．０μｍ
の無電解銅めっきとして成る請求項５記載のプリント基
板。6. The electroconductive Ni plating having a film thickness of 0.5 to 1.0 μm, or the film thickness of 2.5 to 10.0 μm.
The printed circuit board according to claim 5, which is formed by electroless copper plating.
する穴あけを行なう工程と、（ｂ）少なくともスルーホ
ール内へ触媒を付与する工程と、（ｃ）所定のレジスト
マスクパターンを用いてランドと外部接続端子を含む導
体回路パターンとをエッチングにより形成する工程と、
（ｄ）基板表面に皮膜形成用錯形成剤を塗布し、ランド
及び導体回路表面の銅と反応させて厚さ０．５〜３μｍ
の錯体構造皮膜を形成する工程と、（ｅ）耐めっき液性
のソルダ−レジストを全面に塗布し、スル−ホ−ル、ラ
ンド部及び外部接続端子上のソルダ−レジストを選択的
に除去し、熱硬化する工程と、（ｆ）ソルダ−レジスト
が選択的に除去された領域に前処理として錯体構造皮膜
を溶解除去してから、無電解銅めっきを施す工程とを有
して成るプリント基板の製造方法。7. A copper clad laminate is provided with (a) a step of forming a through hole, (b) a step of applying a catalyst into at least the through hole, and (c) a predetermined resist mask pattern. Forming a land and a conductor circuit pattern including an external connection terminal by etching,
(D) A complex forming agent for forming a film is applied to the surface of the substrate and reacted with copper on the land and the surface of the conductor circuit to have a thickness of 0.5 to 3 μm.
And the step of forming a complex structure coating film of (e) on the entire surface, and selectively removing the solder resist on the through holes, lands and external connection terminals. A printed circuit board comprising: a step of thermally curing; and (f) a step of dissolving and removing the complex structure coating in a region where the solder resist has been selectively removed as a pretreatment and then performing electroless copper plating. Manufacturing method.
光性を有するＵＶ硬化型ソルダ−レジストとし、スル−
ホ−ル、ランド部及び外部接続端子がマスキングされた
マスクを介してＵＶ露光し、マスキング部分以外を光硬
化させて未露光部を現像液で溶解除去し、ＵＶ硬化型ソ
ルダ−レジストを熱硬化させ、無電解銅めっきを施す工
程として成る請求項７記載のプリント基板の製造方法。8. The UV resisting solder resist having photosensitivity is used as the plating resisting liquid solder resist, and
UV exposure is performed through a mask in which the holes, lands and external connection terminals are masked, the parts other than the masked parts are photo-cured and the unexposed parts are dissolved and removed with a developing solution, and the UV-curable solder resist is thermally cured. The method of manufacturing a printed circuit board according to claim 7, which is a step of performing electroless copper plating.
て、銅の酸化を防止する防錆効果とソルダーレジストと
の結合性とを有し、しかも銅と錯体を形成する不対電子
を有する含窒素有機化合物を用いると共に、錯体構造皮
膜の膜厚を、基板を皮膜形成用錯形成剤溶液に接触させ
る時間を制御して調整する成膜工程として成る請求項７
記載のプリント基板の製造方法。9. An unpaired electron which has a rust preventive effect for preventing the oxidation of copper and a bondability with a solder resist and which forms a complex with copper as a complex forming agent for forming a film in the step (d). 8. A film-forming step of using a nitrogen-containing organic compound having, and adjusting the film thickness of the complex structure film by controlling the time for which the substrate is brought into contact with the film-forming complexing agent solution.
A method for manufacturing the printed circuit board described.
化合物、ベンゾトリアゾール、ベンゾチアゾールの何れ
かの含窒素有機化合物で構成して成る請求項７乃至９何
れか記載のプリント基板の製造方法。10. The method of manufacturing a printed circuit board according to claim 7, wherein the film forming complex-forming agent is composed of a nitrogen-containing organic compound selected from the group consisting of imidazole compounds, benzotriazoles and benzothiazoles.
ゼンイミダゾール化合物として成る請求項１０記載のプ
リント基板の製造方法。11. The method for producing a printed circuit board according to claim 10, wherein the imidazole compound is an alkylbenzeneimidazole compound.
工程において、銅箔上に形成された銅との錯体構造皮膜
を溶解除去する処理液を、無機強酸もしくは過過酸化物
の稀釈溶液として成る請求項７乃至１１何れか記載のプ
リント基板の製造方法。12. In the step (f) of performing electroless copper plating, a treatment liquid for dissolving and removing the complex structure film with copper formed on the copper foil is diluted with a strong inorganic acid or a peroxide. The method for manufacturing a printed circuit board according to claim 7, which is formed as a solution.
かとするか、過過酸化物を硫酸ソーダとし、何れも２〜
３重量％の稀釈溶液として成る請求項１２記載のプリン
ト基板の製造方法。13. The inorganic strong acid is any one of hydrochloric acid, sulfuric acid and nitric acid, or the peroxide is sodium sulfate, and both are 2 to
13. The method for manufacturing a printed circuit board according to claim 12, which is a 3% by weight diluting solution.
無電解Ｎｉめっきを０．５〜１．０μｍ析出させ、さら
に基板表面を研磨してＮｉめっきを基板表面から除去
し、スルーホール内にのみ残す工程を付加し、最終工程
でスルーホール内にＮｉめっきと銅めっきから成る二重
のめっき膜を形成して成る請求項７記載のプリント基板
の製造方法。14. Between the step (b) and the step (c),
Electroless Ni plating is deposited to 0.5 to 1.0 μm, the substrate surface is further polished to remove the Ni plating from the substrate surface, and a step of leaving only in the through holes is added. The method for manufacturing a printed circuit board according to claim 7, wherein a double plating film made of plating and copper plating is formed.
クパターンを、電着型ＵＶレジストによりランドと外部
接続端子を含む導体回路以外がマスキングされたマスク
を用いＵＶ露光機により露光し、現像により回路パター
ンを描き、これをマスクとして銅箔をエッチングし、ラ
ンド及び導体回路パターンを形成する工程として成る請
求項７もしくは１４記載のプリント基板の製造方法。15. In the step (c), the resist mask pattern is exposed by a UV exposure machine using a mask in which a portion other than a conductor circuit including a land and an external connection terminal is masked by an electrodeposition type UV resist, and the circuit is developed by development. The method for manufacturing a printed circuit board according to claim 7 or 14, which comprises a step of drawing a pattern and etching the copper foil using the pattern as a mask to form a land and a conductor circuit pattern.
無電解銅めっきを２．５〜１０．０μｍ形成する工程を
付加し、これにより少なくともスルーホール内に予め第
１の銅めっきを形成した後、上記（ｃ）工程〜（ｆ）工
程を施し、スルーホール内に二重の銅めっきを形成して
成る請求項７記載のプリント基板の製造方法。16. Between the step (b) and the step (c),
A step of forming electroless copper plating in the range of 2.5 to 10.0 μm is added, thereby forming the first copper plating in advance in at least the through hole, and then performing the above steps (c) to (f), The method for manufacturing a printed circuit board according to claim 7, wherein double copper plating is formed in the through hole.
膜形成用錯形成剤を塗布する方法として、浸漬、シルク
スクリーン、スプレー、ローラーの何れかの方式を選択
して成る請求項７記載のプリント基板の製造方法。17. The method according to claim 7, wherein in the step (d), a method of applying a complex forming agent for forming a film on the surface of the substrate is selected from dipping, silk screen, spraying and roller methods. Printed circuit board manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15911892A JP2919181B2 (en) | 1992-06-18 | 1992-06-18 | Printed circuit board manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15911892A JP2919181B2 (en) | 1992-06-18 | 1992-06-18 | Printed circuit board manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH066018A true JPH066018A (en) | 1994-01-14 |
| JP2919181B2 JP2919181B2 (en) | 1999-07-12 |
Family
ID=15686636
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15911892A Expired - Fee Related JP2919181B2 (en) | 1992-06-18 | 1992-06-18 | Printed circuit board manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2919181B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10321994A (en) * | 1997-05-16 | 1998-12-04 | Senju Metal Ind Co Ltd | Method of preventing migration in conductor parts of electronics |
| WO2012173178A1 (en) | 2011-06-14 | 2012-12-20 | 大日本印刷株式会社 | Conductive base for forming wiring pattern of collector sheet for solar cells, and method for producing collector sheet for solar cells |
| JP2014229895A (en) * | 2013-05-23 | 2014-12-08 | サムソン エレクトロ−メカニックス カンパニーリミテッド． | Printed circuit board and method of manufacturing printed circuit board |
| JP2016105516A (en) * | 2016-03-02 | 2016-06-09 | 日立化成株式会社 | Printed wiring board and manufacturing method thereof, and thermosetting resin composition |
-
1992
- 1992-06-18 JP JP15911892A patent/JP2919181B2/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10321994A (en) * | 1997-05-16 | 1998-12-04 | Senju Metal Ind Co Ltd | Method of preventing migration in conductor parts of electronics |
| WO2012173178A1 (en) | 2011-06-14 | 2012-12-20 | 大日本印刷株式会社 | Conductive base for forming wiring pattern of collector sheet for solar cells, and method for producing collector sheet for solar cells |
| KR20140016392A (en) | 2011-06-14 | 2014-02-07 | 다이니폰 인사츠 가부시키가이샤 | Conductive base for forming wiring pattern of collector sheet for solar cells, and method for producing collector sheet for solar cells |
| US9666746B2 (en) | 2011-06-14 | 2017-05-30 | Dai Nippon Printing Co., Ltd. | Conductive base for forming wiring pattern of collector sheet for solar cells, and method for producing collector sheet for solar cells |
| JP2014229895A (en) * | 2013-05-23 | 2014-12-08 | サムソン エレクトロ−メカニックス カンパニーリミテッド． | Printed circuit board and method of manufacturing printed circuit board |
| US9629260B2 (en) | 2013-05-23 | 2017-04-18 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board and method of manufacturing the same |
| JP2016105516A (en) * | 2016-03-02 | 2016-06-09 | 日立化成株式会社 | Printed wiring board and manufacturing method thereof, and thermosetting resin composition |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2919181B2 (en) | 1999-07-12 |
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