JPH0654226A - Sampling/holding circuit - Google Patents

Abstract

PURPOSE:To amplify the signal level to an optional level and to output the signal with no deterioration of the SN ratio by amplifying the sampled signal level with combination of an amplifying means having a fixed smplification factor and an attenuating means which can vary its attenuation factor. CONSTITUTION:A CCD signal processing circuit 10 samples a color signal level of the CCD output signal S1 of a CCD element 2 by a sample and hold circuit 4 and supplies the sampled signal level to an amplifier 11. The gain of an amplified signal S2 is controlled based on a voltage source E1 and with variation of the dividing ratio of a variable resistance R1. Then, the voltage that internally divided the source E1 and the signal S2 is outputted to an amplifier 6 as the attenuated voltage. Meanwhile, the output of the fixed amplifier 11 and a potential equal to the source E1 during the operation of a clamping circuit 7. Thus no potential difference is produced between the output terminal of the amplifier 11 and the source E1. Therefore, the voltage inputted to the amplifier 6 in a clamping period is always set at a fixed black level regardless of the resistance value of the resistance R1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sample and hold circuit, and is suitable for application to, for example, a device for sampling and holding the signal level of an output signal output from a solid-state image sensor.

[0002]

2. Description of the Related Art Today, many image pickup devices for video tape recorders with a built-in camera are smaller than a pickup tube and have low power consumption.
Element) is widely used. On the surface of this CCD element, there are arranged special color filters for extracting the color signals of red, blue, red, blue ... And green, blue, green, blue. It is designed to output data centered on a video signal component that repeats blue.

Therefore, when only the video signal component is extracted from the CCD output signal, or when the signal level of the CCD output signal is too large or too small, a signal processing circuit for controlling this to a constant level is required. A CCD signal processing circuit 1 as shown in FIG. 3 is generally used.

That is, the CCD signal processing circuit 1 inputs the CCD output signal S1 output from the solid-state image pickup device 2 to the sample hold circuit 4 via the clamp capacitor 3 and outputs the signal level of each color signal to the sampling pulse SH.
The sampling is performed according to the timing of P.

Here, when the signal level of the sampled and held CCD output signal is small, the CCD signal processing circuit 1 amplifies the signal level to a predetermined value by the gain control amplifier 5, and thereafter, the amplifier at the subsequent stage. It is designed to output via the 6.

Further, the CCD signal processing circuit 1 clamps the black level and the reference voltage of the video signal output from the gain control amplifier 5 in the clamp circuit 7 with a clamp pulse C.
The comparison is performed at the timing of LP, and the potential of the clamping capacitor 3 is feedback-controlled so that the black level value is fixed at a constant potential.

[0007]

However, since the gain control amplifier 5 used for adjusting the signal level generally has a poor SN ratio, there is a problem that noise is superimposed during amplification and the image quality of the output video signal deteriorates.

The present invention has been made in consideration of the above points, and proposes a sample hold circuit having a better SN ratio than the conventional one regardless of the variable gain of the signal level.

[0009]

In order to solve such a problem, in the present invention, the signal level of the input analog signal S1 is sampled and held at a predetermined timing, and the sampled signal level is set to an arbitrary amplification factor. In the sample-and-hold circuit 10 that amplifies and outputs according to the above, the amplifying means 11 that amplifies the sampled signal level by a fixed amplification factor, and one end is connected to the output end of the amplifying means 11 and the other end. Is grounded, and an attenuation amount variable type attenuation unit R1 that attenuates the output signal output from the amplification unit 11 by an arbitrary attenuation amount and outputs the attenuated signal is provided.

In the present invention, a video signal is input as the input analog signal S1 and the output of the attenuation amount variable type attenuation means R1 is supplied to the black level clamp circuits 21 and 22.
Output via. Further, in the present invention, a video signal is input as the input analog signal S1, and one end of the attenuation amount variable type attenuation means R1 is connected to the amplification means 1.
1 and the other end is connected to the reference power supply E1 for black level clamp.

[0011]

Amplification means 1 having a fixed amplification factor in place of the conventional gain control amplifier for the sampled signal level
By amplifying by a combination of 1 and the attenuation amount variable type attenuation means R1, it is possible to output a signal amplified at an arbitrary amplification rate without fear of deterioration of the SN ratio by the gain control amplifier.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1 in which parts corresponding to those in FIG. 3 are designated by the same reference numerals, 10 denotes a CCD output processing circuit as a whole, and instead of the gain control amplifier 5, a fixed gain amplifier 11 and a resistance value for attenuation. It has the same configuration except that it has a variable resistor R1.

Here, a variable resistance resistor R for attenuation is used.
A voltage source E1 for supplying a black level reference potential is connected to one end of the CCD 1 with its other end grounded.
The video signal is attenuated on the basis of the potential of the voltage source E1 and is output to the amplifier 6 in the subsequent stage.

In the above-mentioned structure, the CCD signal processing circuit 10 has the CCD output signal S output from the CCD element 2.
The sample and hold circuit 4 changes the signal level of the color signal from 1.
And sampled values are supplied to the amplifier 11. In the case of this embodiment, the gain of the amplifier 11 is constant, and the input sample value is amplified to a constant level with low noise.

The gain of the amplified signal S2 amplified at this time is adjusted by changing the voltage division ratio of the resistance value variable resistor R1 with the voltage source E1 as a reference.
The voltage obtained by internally dividing 2 is output to the amplifier 6 as an attenuated voltage.

On the other hand, while the clamp circuit 7 is operating by the input of the clamp pulse CLP, the output of the fixed amplifier 11 becomes the same potential as the voltage source E1, so that the output end of the fixed amplifier 11 and the voltage source E1. There is no potential difference between them. As a result, the voltage level input to the amplifier 6 during the clamp period is always a constant black level voltage (that is, the potential of the voltage source E1) regardless of the resistance value of the variable resistor R1.

According to the above configuration, even when the signal level of the CCD output S1 is small, it is possible to adjust the signal level to an arbitrary signal level without degrading the SN ratio even when the signal level needs to be amplified. The black level during the clamp period can be kept constant regardless of the adjustment value of the attenuation amount.

In the above embodiment, the case where the voltage source E1 for supplying the black level voltage is connected to one end of the resistor variable resistance R1 for attenuation has been described, but the present invention is not limited to this. One end of the variable resistance value resistor R1 for use is directly grounded, and its output end is connected to the clamp circuit 22 via the coupling capacitor 21 to reset the black level value varying according to the adjustment value of the attenuation amount to a predetermined value. You may make it set (FIG. 2). Even in this case, as in the case described above, even if the signal level is adjusted, it is possible to effectively avoid the possibility that the SN ratio deteriorates.

In the above embodiment, the case where the CCD output S1 is sampled and held has been described, but the present invention is not limited to this, the input analog signal is sampled and held, and the amplification factor of this signal level is arbitrarily changed. The present invention can be widely applied to analog signal processing circuits that output the output.

[0021]

As described above, according to the present invention, the sampled signal level is amplified by a combination of an amplification means having a fixed amplification factor and a variable attenuation type attenuation means instead of the gain control amplifier. By doing so, the signal level can be amplified to an arbitrary signal level and output without deterioration of the SN ratio.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a sample hold circuit according to the present invention.

FIG. 2 is a block diagram for explaining another embodiment.

FIG. 3 is a block diagram for explaining a conventional sample hold circuit.

[Explanation of symbols]

1, 10, 20, CCD output processing circuit, 2 solid-state image sensor, 4 sample hold circuit, 5 gain control amplifier, 6 11 amplifier.

Claims (3)

[Claims] 1. A sampling and holding circuit for sampling and holding a signal level of an input analog signal at a predetermined timing, and amplifying and sampling the sampled signal level by an arbitrary amplification factor. An amplifying means for amplifying the signal level obtained by a fixed amplification factor, one end of which is connected to the output end of the amplifying means and the other end of which is grounded, and an output signal output from the amplifying means is arbitrarily attenuated A sample-hold circuit, comprising: an attenuation amount variable attenuation unit that attenuates an amount and outputs. 2. A sample hold according to claim 1, wherein a video signal is input as the input analog signal, and the output of the attenuation amount variable type attenuation means is output via a black level clamp circuit. circuit. 3. A video signal is input as the input analog signal, one end of the attenuation amount variable type attenuation means is connected to the output end of the amplification means, and the other end is connected to a reference power source for black level clamp. The sample hold circuit according to claim 1, wherein