JP2755514B2 - CCD solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD solid-state image pickup device (charge-coupled solid-state image pickup device) used for a monitoring black-and-white video camera or the like.

[0002]

2. Description of the Related Art As a conventional example of this kind of black-and-white video camera for monitoring, a signal (imaging signal) output from a CCD solid-state imaging device is sampled and held by a sample and hold circuit, and then converted into a video signal through a signal processing circuit. Some systems have a system configuration for conversion. In addition, the surveillance monochrome video camera is provided with an automatic lens aperture adjustment mechanism. The automatic lens aperture adjustment mechanism automatically adjusts the aperture of the camera lens so that the output level of the video signal becomes substantially constant when the illuminance of the subject is within a certain range.

Further, this surveillance monochrome video camera includes:
When the illuminance of the subject is lower than a predetermined level, an AGC circuit or the like for automatically setting the amplifier amplification factor to be higher to obtain a video signal of a higher level is provided.

FIG. 3 shows a specific example of the conventional monitoring black-and-white video camera. The schematic configuration will be described below. CC
The D solid-state imaging device 1 captures an image of a subject through the camera lens 20 and the aperture 19 of the camera lens, and outputs an imaging signal. In the CCD solid-state imaging device 1, a pulse for driving a vertical shift register and a pulse 3 for driving a horizontal shift register (both not shown) (usually two types of pulses are used, but only one pulse 3 is used in the drawing). Is displayed) from the pulse generator 2. Further, the pulse generator 2 gives a reset pulse 4 for resetting the signal charge to an output circuit (not shown) of the CCD solid-state imaging device 1 which receives the transfer signal charge from the horizontal shift register.

[0005] An output signal 5 output from the CCD solid-state imaging device 1 is input to a correlated double sampling circuit (hereinafter referred to as a CDS circuit) 6. The CDS circuit 6 controls the CC according to the CDS pulses 7 and 8 given from the pulse generator 2.
The input signal from the D solid-state imaging device 1 is sampled and held. The sampled and held signal 9 is then
Input to the circuit 10. An unnecessary frequency component is removed from an output signal 11 from the AGC circuit 10 by a low-pass filter (hereinafter referred to as LPF) 12. The LPF output signal 13 from which unnecessary frequency components have been removed is input to a signal processing circuit (process circuit) 14.

A signal processing circuit 14 processes an input signal and outputs a video signal 16. This signal processing is performed according to the pulse 15 given from the pulse generator 2. Further, the signal processing circuit 14 provides a feedback signal 18 to the automatic lens aperture adjustment mechanism 17 and the AGC circuit 10. The automatic lens aperture adjustment mechanism 17 automatically adjusts the opening of the aperture 19 of the camera lens based on the feedback signal 18. That is, the opening of the aperture 19 of the camera lens is automatically adjusted according to the level of the video signal 16. Also, AGC
The circuit 10 automatically adjusts the amplifier amplification factor (hereinafter simply referred to as amplification factor) by the feedback signal 18.

More specifically, a case where the illuminance of a subject imaged by the CCD solid-state imaging device 1 is small and the level of the video signal 16 does not reach a predetermined level even if the aperture of the aperture 19 of the camera lens is increased. In addition, the amplification factor of the AGC circuit 10 is increased to increase the level of the video signal.

FIG. 4 shows the operation timing of the CCD solid-state imaging device. 4A shows the waveform of the pulse 3 (= φH1) for driving the horizontal shift register, and FIG.
4C shows the waveform of the reset pulse 4 (= φR), FIG. 4C shows the waveform of the output signal 5 of the CCD solid-state imaging device 1, and FIG.
FIG. 4D shows the waveform of one CDS pulse 7 (= φCDS) applied to the CDS circuit 6, and FIG.
4F shows the waveform of the other CDS pulse 8 (= φS), FIG. 4F shows the waveform of the output signal 9 from the CDS circuit 6, and FIG. 4G shows the waveform of the LPF output signal 13. I have.

The above-described operations of the CCD solid-state imaging device 1, the CDS circuit 6, and the like are performed at the operation timings shown in the figure.

[0010]

By the way, when the level of the video signal 16 is low as described above, the system configuration for restoring the level of the video signal 16 by increasing the opening of the aperture 19 of the camera lens is as follows. , Video signal 16
There is a limit in restoring your level. That is, if the illuminance of the subject is smaller, there is a problem that it cannot be dealt with.

Therefore, although the AGC circuit 10 is provided, there is a limit in increasing the amplification factor of the AGC circuit 10. The reason is that, when the amplification factor of the AGC circuit 10 is increased, the level of the video signal 16 can be increased accordingly, but there is a new problem that the S / N ratio of the video signal 16 deteriorates and the reliability decreases. It is.

As another means other than the above, another means may be considered in which the sensitivity of the CCD solid-state imaging device 1 is increased so that the level of the video signal 16 is set high even when the illuminance of the subject is small. However, it is not easy to increase the sensitivity of the CCD solid-state imaging device 1.

For these reasons, for example, in the conventional CCD solid-state imaging device used as a black-and-white video camera for surveillance, it has not been possible to cope with the situation where the illuminance of a subject falls below a certain level.

The present invention solves such a problem of the prior art, and can obtain an image signal of a predetermined level without deteriorating the S / N ratio even when the illuminance of the subject is small. It is an object of the present invention to provide a CCD solid-state imaging device capable of performing the above.

[0015]

According to the present invention, there is provided a CCD solid-state imaging device which outputs an imaging signal corresponding to the illuminance of a subject.
D solid-state imaging device, a sample-and-hold circuit that samples and holds an output signal from the CCD solid-state imaging device, a plurality of types of filters that limit the band of the sampled and held signals, and performs signal processing on a signal provided through the filter. A signal processing circuit for obtaining an image signal from the CCD solid-state imaging device; and determining that the output level of the image signal is equal to or lower than a predetermined level. Control for controlling a reset pulse applied to the element to add a pixel signal in the horizontal direction of the CCD solid-state imaging element and controlling the added output signal to coincide with a sample-hold pulse applied to the sample-hold circuit A circuit and a filter that matches the frequency of the added output signal is selected from the plurality of types of filters. And a switching means that, above-described object can be achieved.

[0016]

In the above arrangement, the illuminance of the subject is small,
When the level of the video signal (image signal) is low, the CCD
If the reset pulse applied to the solid-state image sensor is controlled so that, for example, two pulses applied in the normal state are paused one time and only one is applied, adjacent two of the horizontal pixel signals of the CCD solid-state image sensor are output. The signals for the pixels are added and mixed.

Then, the output signal of the CCD solid-state imaging device is supplied to a sample-and-hold circuit for sampling and holding, and when a sample-and-hold pulse for setting the sample-and-hold timing is paused and supplied one by two like the reset pulse. The phase of the sample hold pulse coincides with the phase of the output signal of the CCD solid-state imaging device to which the two adjacent pixels have been added. With this setting, the output level of the output signal of the sample and hold circuit is
This is twice the output level of the output signal during normal operation. At this time, the S / N ratio does not decrease.

Here, the frequency band of the output signal of the sample and hold circuit is half the frequency band of the output signal of the sample and hold circuit during normal operation. Therefore,
Even as a low-pass filter (filter), the bandwidth is １ ／
Must be used.

In this regard, in the above-described configuration, a plurality of types of low-pass filters for limiting the band of the output of the sample-and-hold circuit are provided, and the frequency of the output of the sample-and-hold circuit at that point in time, that is, Since a low-pass filter that matches the frequency of the added output signal is selected, that is, the low-pass filter is switched, unnecessary frequency components of the added output signal can be reliably removed by the low-pass filter. . Therefore, it is possible to obtain a video signal of a predetermined level which has a clean waveform without a noise component.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the CCD solid-state imaging device according to the present invention will be described below.

FIG. 1 shows a system configuration when the CCD solid-state imaging device of the present invention is used for a black-and-white video camera for monitoring.
The schematic configuration will be described below.

The CCD solid-state image pickup device 21 picks up an image of a subject through a camera lens 45 and an aperture 44 of the camera lens, and outputs an image pickup signal. The CCD solid-state imaging device 21 has a pulse 2 for driving a vertical shift register and a pulse 2 for driving a horizontal shift register (both not shown).
3 (usually two types of pulses are used, but only one pulse 23 is shown in the drawing) is a pulse generator 2
Given by 2. Further, the pulse generator 22 gives a reset pulse 24 for resetting the signal charge to an output circuit (not shown) of the CCD solid-state imaging device 21 which receives the transfer signal charge from the horizontal shift register.

An output signal 25 output from the CCD solid-state imaging device 21 is input to a CDS circuit 26. The CDS circuit 26 samples and holds an input signal from the CCD solid-state imaging device 21 in accordance with CDS pulses 27 and 28 given from the pulse generator 22. The sampled and held signal 29 is then input to the AGC circuit 30. Output signal 31 from AGC circuit 30 is applied to LPF 33 and LPF 35.

Here, the LPFs 33 and 35 have different low-pass frequencies. In this embodiment, the LPF
The frequency band 35 is set to １ ／ of the frequency band of the LPF 33. The LPF output signal 34 from which unnecessary frequency components have been removed by the LPF 33 or the LPF output signal 36 from which unnecessary frequency components have been removed by the LPF 35 are supplied to a switching circuit 37.

The switching circuit 37 is constituted by, for example, a selector switch or the like, and the connection state is changed to one of the LPFs 33 by a switching pulse 48 given from the control circuit 46.
(Or LPF 35). The control circuit 46 serves as a control center of the CCD solid-state imaging device, and controls the generation timing of the various pulses generated from the pulse generator 22 in addition to the switching control.

The LPF output signal 34 or the LPF output signal 36 selectively output from the switching circuit 37 is input to a signal processing circuit 39. The signal processing circuit 39 processes the input signal and outputs a video signal 40. This signal processing is performed according to the pulse 45 given from the pulse generator 22. Further, the signal processing circuit 39 provides a feedback signal 49 to the automatic lens aperture adjustment mechanism 41. The automatic lens aperture adjusting mechanism 41 automatically adjusts the opening of the aperture 44 of the camera lens based on the feedback signal 49. That is, the opening of the aperture 44 of the camera lens is automatically adjusted according to the level of the video signal.

The control circuit 46 receives a diaphragm opening signal 43 of the camera lens from the automatic lens diaphragm adjusting mechanism 41. A signal 32 indicating the amplification factor is input from the AGC circuit 30, and a signal 42 indicating the magnitude of the output level of the video signal 40 is provided from the signal processing circuit 39.

Based on these input signals, the control circuit 46 controls the illuminance of the object to be small,
When the output level of the video signal 40 is confirmed to be equal to or lower than a predetermined level despite that the opening of the A.4 is maximum and the amplification factor of the AGC circuit 30 is the maximum, the pulse generator 22 Is output. The pulse 4
7, the pulse generator 22 operates as shown in FIG.
A reset pulse 24 (= φR), a CDS pulse 27 (= φCDS) and a CDS pulse 28 (= φS) whose output waveforms are shown in (d) and (e) are applied to the CCD solid-state imaging device 21 and the CDS circuit 26, respectively.

FIGS. 2B, 2D and 2E and FIG.
As is clear from comparison between (b), (d), and (e), when the output level of the video signal 40 is equal to or lower than a predetermined level, the reset pulse 24, the CDS pulse 27, and the CDS pulse 28 The generation timing is half that of the normal operation shown in FIG. That is, FIG.
Are generated so as to pause every other pulse.

When the reset pulse 24 applied to the CCD solid-state imaging device 21 is paused for every two pulses as shown in FIG. 2B, the output signal 25 of the CCD solid-state imaging device 21 is shown in FIG. 2C. Thus, two adjacent pixels (two pixels in the horizontal direction) are added and mixed.

The output signal 25 of the CCD solid-state imaging device 21 is supplied to a CDS circuit 26 for sampling and holding, and a CDS pulse 27 and a CDS pulse 28 for setting the timing of the sample and hold are reset to a reset pulse 24.
In the same manner as described above, one of the two signals is given and the phase of the CDS pulse 28 matches the phase of the output signal 25 of the CCD solid-state imaging device 21 to which the adjacent two pixels have been added, as shown in FIG. Set to Then, the CDS circuit 26
The output level of the output signal 29 of FIG.
As can be seen by comparing (f), the output level of the output signal during normal operation is twice as high. At this time, S /
The N ratio does not decrease.

Here, the CDS circuit 26 at that time is
Of the output signal 29 of the CDS circuit 26 during normal operation is half the frequency band of the output signal 29 of the CDS circuit 26 during normal operation. Therefore, in this case, the switching circuit 37 that has received the switching pulse 48 from the control circuit 46 switches the connection state to the LPF 35 side. Therefore, the output signal 29 of the CDS circuit 26 in this case is provided to the signal processing circuit 39 after removing unnecessary frequency components by the LPF 35. Therefore, according to the above system configuration, it is possible to finally obtain a video signal of a predetermined level with a clean waveform having no noise component.

[0033]

The above-described CCD solid-state imaging device according to the present invention is configured to add the horizontal pixel signals of the CCD solid-state imaging device and set the output signal of the CCD solid-state imaging device large when the illuminance of the subject is small. Therefore, even when the illuminance of the subject is small, the S / N ratio does not decrease,
An image signal of a predetermined level can be obtained. Therefore, the reliability of the entire imaging system can be remarkably improved. Another advantage is that it is not necessary to increase the sensitivity of the CCD solid-state imaging device itself.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a system configuration of a CCD solid-state imaging device according to the present invention.

FIG. 2 is a timing chart showing the operation of the CCD solid-state imaging device of the present invention.

FIG. 3 is a block diagram showing a conventional example of a CCD solid-state imaging device.

FIG. 4 is a timing chart showing the operation of the CCD solid-state imaging device shown in FIG. 3;

[Explanation of symbols]

 Reference Signs List 21 CCD solid-state imaging device 22 Pulse generator 26 CDS circuit 30 AGC circuit 33, 35 LPF 37 Switching circuit 39 Signal processing circuit 41 Automatic lens aperture adjustment mechanism 44 Camera lens aperture 46 Control circuit

Claims (1)

(57) [Claims] 1. A CCD solid-state imaging device for outputting an imaging signal according to the illuminance of a subject, a sample-and-hold circuit for sampling and holding an output signal from the CCD solid-state imaging device, and a band limitation of the sampled and held signal. A plurality of types of filters; a signal processing circuit for performing signal processing on a signal provided through the filter to obtain an image signal; determining an output level of the image signal; determining that the output level is equal to or lower than a predetermined level; In order to increase the output signal of the CCD solid-state imaging device, a reset pulse applied to the CCD solid-state imaging device is controlled to add horizontal pixel signals of the CCD solid-state imaging device, and the added output signal is used as the sample signal. A control circuit for controlling so as to match a sample hold pulse given to the hold circuit; CCD solid-state imaging device provided with a switching means for selecting the filter that matches the frequency of the summed output signal from the.