JPH0653502A - Thin film transistor and fabrication thereof - Google Patents

Abstract

PURPOSE:To allow deposition of SiO2 with uniform thickness and quality on a large area substrate by depositing SiO2 under 8 specific filming temperature while generating oxygen plasma through CVD employing TEOS + O2 gas. CONSTITUTION:Large area sample substrates Z are mounted oppositely on a supporting table in a silicon chamber l and then O2 gas and TEOS gas are introduced through gas introduction ports 3, 4, respectively, into the silicon chamber 1. Sin, is then deposited with small quantity of plasma assist under filming temperature of 550-650 deg.C through CVD employing TEOS + O2 gas. When a film thus deposited is annealed for a long time at a temperature of 550 deg.C or above, more stable SiO2 can be obtained. When an SiO2 film thus formed is employed, a gate oxide excellent in step coverage having low interface state density and high withstand voltage can be obtained. A TFT employing such gate oxide can have thick active Si layer and mobility thereof is increased.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a thin film transistor (Th
in Film Transistor (hereinafter referred to as TFT)) and a manufacturing method thereof, and particularly, Si having a good film quality suitable for a gate oxide film of a TFT and having a uniform film thickness.
The present invention relates to a TFT having an O ₂ film and a manufacturing method thereof.

[0002]

2. Description of the Related Art The gate oxide film of a TFT used in a facsimile image sensor, liquid crystal, thin film IC, etc.
When forming a TFT on a large-area substrate, it is required that the film quality be uniform and the film thickness be uniform.

It is well known that a SiO ₂ film for a gate oxide film suitable for such a TFT is conventionally manufactured by a CVD method. It is also well known to form a SiO ₂ film by the CVD method (for example, JP-A 61-63020, JP-A 62-216261 and JP-A 1-23).
8024, JP-A-2-93069, JP-A-2-170974, etc.).

SiO ₂ for a typical conventional gate oxide film
The SiO ₂ film formed by the film manufacturing method is (1) tetraethoxysilane [Si (OC ₂ H ₅ ) ₄ ] (hereinafter referred to as T
Low pressure CVD method (LPC) with O ₂ gas and EOS
SiO ₂ film formed by VD method, (2) SiO ₂ film formed by sputtering method, (3) SiO ₂ film formed by ECR plasma CVD method (4) Plasma CVD method using TEOS and O ₂ gas (P- There is a SiO ₂ film or the like formed by the CVD method.

Table 1 shows the characteristics of these SiO ₂ films for gate oxide films.

[0006]

[Table 1]

Generally, a SiO ₂ film for a gate oxide film has a breakdown voltage of 6 MV / cm or more and an interface state density of 1 × 10 ^11.
A material having a refractive index of about 1.46 / cm ² · eV or less is required.

As is clear from Table 1, (1) TEOS +
The SiO ₂ film formed by the LP-CVD method using O ₂ gas has a problem that the withstand voltage is low and the refractive index varies. (2) The SiO ₂ film formed by the sputtering method has a problem that the step coverage is poor and a gate leak is likely to occur.

(3) SiO by ECR plasma CVD method
₂ film has a high interface state density, and when a TFT is formed,
There is a problem that the off current of the device is large. (4) SiO ₂ by P-CVD method using TEOS + O ₂ gas
The film is the best in the properties shown in Table 1.

[0010]

However, TEOS +
The conventional apparatus for forming a SiO ₂ film by the P-CVD method using O ₂ gas must use a suspension stainless chamber. Then, there are problems that the impurities in the suspension stainless chamber are easily mixed in the oxide film generated, and the film formation temperature of the oxide film is as low as 450 ° C. or lower, so that the film formation at high temperature is impossible. .

Further, P by the TEOS + O ₂ gas
When a SiO ₂ film is formed on a large-area substrate by the CVD method, a flat plate electrode is provided outside the chamber in order to generate uniform plasma in the chamber in order to obtain uniform film thickness and film quality. Parallel to this suspension or A
Must be manufactured in the l-electrode.

Therefore, it is difficult to form a SiO ₂ film on a substrate larger than the size of the parallel plate electrodes. Therefore, the object of the present invention is to provide PC with TEOS + O ₂ gas.
The VD method is to form a SiO ₂ film having a uniform film thickness and a suitable gate oxide film on a large-area substrate.

[0013]

In order to achieve the above-mentioned object, the present inventor has earnestly studied and as a result, in the CVD method using TEOS + O ₂ gas, the film forming temperature was 550 ° C. to 650 ° C.
It has been found that a SiO ₂ film having a uniform film thickness and film quality can be formed on a large-area substrate by forming a SiO ₂ film by assisting a small amount of plasma at a temperature of ° C.

At this time, the electrode for generating the O ₂ plasma does not need to generate a uniform plasma in the chamber, and therefore, a parallel plate electrode is not used as in the conventional case, and a sufficiently uniform SiO 2 is formed by a rod-shaped electrode. _Two membranes can be obtained.

[0015]

[Function] The SiO ₂ film is formed at 620 ° C. by the thermal CVD method.
Starting from the degree, this is sufficient for the uniformity of the film thickness, but O ₂ plasma is generated to improve the film quality.

By generating plasma, a uniform film can be formed even in a low temperature region. This makes it possible to obtain a good-quality SiO ₂ film with a uniform film thickness on a large-area substrate.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. 1A and 1B are schematic configuration diagrams showing a CVD apparatus for manufacturing a thin film transistor according to the present invention. FIG. 1A is a sectional view of the apparatus and FIG. 1B is a plan view of the apparatus.

In FIG. 1, 1 is a quartz chamber, 2 is a sample substrate, 3 and 4 are gas inlets, 5 is an exhaust pump, 6 is a heater, and 7 and 7 ′ are rod-shaped electrodes. Gas inlet 3, 4
O ₂ gas and TEOS gas are introduced into the quartz chamber 1 respectively. Further, the exhaust pump 5 reduces the pressure in the quartz chamber 1.

The film forming temperature in the quartz chamber is controlled by the heater 6 provided outside the quartz chamber 1.
In this embodiment, a pair of rod-shaped electrodes 7 and 7'having a diameter of, for example, 2 cm are provided between the quartz chamber 1 and the heater 6, and an O ₂ plasma is generated in the quartz chamber 1 by applying a voltage to them. It is what makes me.

Next, a method of forming a SiO ₂ film using this apparatus will be described. For example, 30 in the quartz chamber 1.
cm * 30 cm square large area sample substrates 2 ... Are placed on a supporting base (not shown) so as to face each other, and a SiO ₂ film is formed on the sample substrate 2 under the following film forming conditions. .

TEOS gas 50 sccm O ₂ gas 500 sccm power 100 W film formation temperature 600 ° C. pressure 0.05 Torr to 2.0 Torr The film formed under these conditions was annealed at a temperature of 550 ° C. or higher for a long time to stabilize the film. A SiO ₂ film can be obtained. Even if the amounts of TEOS gas and O ₂ gas are changed, the same stabilized SiO ₂ film can be obtained.

The formed SiO ₂ film has excellent properties such as a refractive index of 1.46, a breakdown voltage and an interface state density which are not different from those of the conventional P-CVD method using TEOS + O ₂ gas. Moreover, the step coverage is also good because it is formed by the CVD method.

On a large-area sample substrate as in this embodiment, SiO
_When forming _two films, variations in the film thickness affect the characteristics of the device. The film thickness uniformity mainly relates to the film forming temperature.

FIG. 2 shows the relationship between the film thickness variation and the film thickness variation of the SiO ₂ film formed by the CVD method of this embodiment using TEOS + O ₂ gas formed on a 30 cm × 25 cm substrate.

The film forming conditions at this time are as follows. TEOS: 50 sccm O ₂ 300 sccm Power 100 W Pressure 0.05 Torr to 2.0 Torr As is apparent from FIG. Uniformity can be obtained.

The formation of the SiO ₂ film by the thermal CVD method is 62
Although it starts from 0 ° C., since plasma is applied in the present invention,
A uniform film can be formed even in a lower temperature region. However, as shown in FIG. 2, the film forming temperature is 550 to 650.
℃ is suitable.

Further, although the electric power is 100 W in this embodiment, the electric power is not limited to this value, and may take a value between 10 W and 500 W as required. Next, as an example of a TFT using the SiO ₂ film according to the present invention as a gate oxide film, a C-MOS is formed on a glass substrate.
A manufacturing process for forming a TFT composed of an FET will be described with reference to FIGS.

First, as a glass substrate, for example, a neoceram (trade name) glass substrate 31 manufactured by Nippon Electric Glass Co., Ltd. is prepared, and disilane (S) is placed on the neoceram glass substrate 31.
An amorphous silicon (a-Si) layer 32 is formed to a thickness of about 1000Å by a low pressure CVD method using i ₂ H ₆ ) gas (see FIG. 3A).

The film forming conditions are as follows. Si ₂ H ₆ gas 100 sccm pressure 0.3 Torr He gas 200 sccm heating temperature 450 to 570 ° C. film thickness growth rate 50 Å to 500 Å / min. Next, the a-Si layer 32 is 550 ° C. to 600 in an N ₂ atmosphere.
A solid-phase-grown film 32 'is obtained by heating at 8 ° C to 56 hours for solid-phase growth.

A SiO ₂ film 33 for a field oxide film is formed on the solid-phase grown film 32 'by RF sputtering, and then patterned with a resist to open a channel portion (see FIG. 3B).

[0031] forming the SiO ₂ film 34 'for a gate oxide film of the present invention on a substrate containing SiO ₂ film. The film forming conditions at this time are the same as those in the above embodiment. TEOS gas 50 sccm O ₂ gas 500 sccm power 100 W film formation temperature 600 ° C. pressure 0.05 Torr to 2.0 Torr film thickness 500Å to 1500Å The formed film is annealed at a temperature of 550 ° C. or higher for a long time.

Next, an a-Si layer 35 'for the gate electrode is formed on the SiO ₂ film 34' (see FIG. 3C).
The gate electrode is patterned by two-step etching using a resist to form the gate oxide film 34 and the gate electrode 35 (see FIG. 3D).

As a mask for ion implantation, a resist 36 is formed in one channel opening, and the opening is doped with a first dopant ion, for example, phosphorus (P) ion (see FIG. 3C). ).

The resist 36 is peeled off to form a resist 37 for a second ion implantation mask, and the opening is doped with, for example, boron (B) ions to form a C-MOSF.
ET is formed (see FIG. 3 (f)).

Next, after removing the resist 37, it is heated in an N ₂ atmosphere at 550 ° C. to 600 ° C. for 24 hours to activate the dopant and crystallize the a-Si layer 35 of the gate electrode. Further, hydrogenation is performed by heating at 400 ° C. for 30 minutes in an H ₂ atmosphere to reduce the defect level of the semiconductor layer including the channel layer (see FIG. 4A).

After that, a SiO ₂ film 38 is formed as an interlayer insulating film on the entire substrate by sputtering (FIG. 4).
(See (b)). Next, a contact hole is formed in the SiO ₂ film 38, an aluminum film for an electrode is formed, and then patterning is performed to complete a C-MOSFET in the non-single crystal semiconductor layer on the glass substrate by a low temperature process.

[0037]

EFFECTS OF THE INVENTION S for gate oxide film formed by the present invention
The iO ₂ film is P-CVD using the conventional TEOS + O ₂ gas.
The SiO ₂ film as well as high-quality SiO ₂ film by law, can be formed while maintaining a uniform film thickness and film quality such as a large-area substrate, for example, 30 cm × 30 cm square.

Further, by using the SiO ₂ film formed according to the present invention, a current oxide film having an excellent step coverage, a low interface state density and a high breakdown voltage can be obtained.
Therefore, the TFT using this gate oxide film has an effect that the thickness of the active Si layer can be increased and the mobility of the TFT can be increased.

[Brief description of drawings]

FIG. 1 is a CV for manufacturing a thin film transistor according to the present invention.
It is a schematic block diagram of a D device.

FIG. 2 is a diagram showing a relationship between film thickness variation and film thickness variation of a SiO ₂ film formed according to the present invention.

FIG. 3 shows C- using an SiO ₂ film formed according to the present invention.
It is a part of manufacturing process explanatory drawing of MOSFET.

FIG. 4 shows C- using an SiO ₂ film formed according to the present invention.
FIG. 4 is an explanatory view of the next step of FIG. 3 in the MOSFET manufacturing step explanatory views.

[Explanation of symbols]

 1 Quartz Chamber 2 Sample Substrate 6 Heater 7, 7'Rod Electrode 34 Gate Oxide Film 35 Gate Electrode

Claims (2)

[Claims] 1. A gate oxide film used for a thin film transistor is formed by a plasma CVD method using tetraethoxysilane (TEOS) gas and oxygen gas at a film forming temperature of 55.
A thin film transistor, which is formed at 0 ° C. to 650 ° C. while generating oxygen plasma, and uses a SiO ₂ film having a uniform film thickness and film quality. 2. A gate oxide film used for a thin film transistor is formed by a plasma CVD method using tetraethoxysilane (TEOS) gas and oxygen gas at a film forming temperature of 55.
A method of manufacturing a thin film transistor, comprising a step of forming a film while setting plasma at 0 ° C. to 650 ° C. with a rod-shaped electrode to generate plasma.