JPH0648599B2 - Optical shift register circuit - Google Patents

Description

The present invention relates to an optical digital logic circuit used in an optical communication system, an optical information processing system, an optical switching system, an optical computer, and the like.

<Prior Art> With the recent development of optical fiber technology and optical semiconductor technology, a long-distance optical communication system intended for backbone transmission and an optical LAN system for highly efficiently connecting distributed processing devices have been put to practical use.

In these systems, the optical technology is mainly used as a connecting means between the functional devices, and the function is largely borne by the electronic circuit technology centering on the LSI.

Reflecting the arrival of the advanced information society in the near future, as the diversification of information to be processed and the increase in capacity are further advanced, ultra-high processing speed and complicated processing are required.

To meet these demands, it is necessary to use optical technology not only as a connecting means but also as a logic processing means.

That is, the transmitted optical digital signal can be digitally processed as it is, and the processing result can be output as light to be transmitted to another device. High speed of light, wide band property, non-inductive property, etc. An optical processing device (optical information processing system, optical switching system, etc.) that makes full use of the characteristics of is essential.

To realize this type of device, an optical logic function block similar to that used in a general electric logic circuit, for example, an optical gate (INVERTOR, OR, AND, EXOR, etc.), an optical flip-flop circuit, an optical shift register circuit, etc. , Optical counters etc. must be configured.

Conventionally, none of these optical logic function blocks has been practically used.

<Object of the Invention> In view of the above, the present invention is to provide a small-sized and practical optical shift register circuit suitable for integration.

Configuration of the Invention The optical shift register circuit of the present invention is composed of an optical switch having a first input end, a second input end, and an output end, and an optical bistable element that outputs light from the output end as an optical input. Then, optical digital data is input to the first input end, bias light having a DC amplitude value is input to the second input end, and the first optical switch of the optical switch obtained corresponding to the first state of the clock is input. In the state, the bias light is output from the output terminal, the optical bistable element is biased to one of the stable points, and the second state of the optical switch obtained corresponding to the second state of the clock is obtained. In this state, when the optical digital data is in the logic "1" state, a positive optical pulse having a positive amplitude value than the direct current amplitude value is output from the output terminal, and the positive optical pulse drives the optical bistable element. When the optical digital data is set to the logical "0" state, the DC amplitude value is A negative polarity optical pulse having a negative amplitude value is output from the output terminal, and the negative polarity optical pulse is driven to reset the optical bistable element, thereby inputting the optical digital data and synchronizing with the clock. A plurality of optical D flip-flop circuits characterized by obtaining the above-mentioned optical output signal are cascade-connected so that the optical output from the optical bistable element is inputted to the first input terminal of the next stage. .

<Example> Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is an optical shift register circuit showing a first embodiment of the present invention. This circuit is an optical D flip-flop circuit 101,10.
2, 103, 104 are connected in cascade, and at each connection, an optical branching device K ₁ , which is a directional coupler for taking out the optical output signals L ₁ , L ₂ , L ₃ , L ₄ of each optical D flip-flop stage,
It is composed of K ₂ , K ₃ , and K ₄ .

Before describing the operation of the optical shift register circuit, the configuration and operation of the optical D flip-flop circuit will be described.

FIG. 2 shows an optical D flip-flop circuit which is a basic block of an optical shift register circuit according to the present invention, in which a directional coupler type optical switch 8 and an optical bistable element 9 are connected in series. The directional coupler type optical switch 8 is composed of a substrate (LiNbO ₃ , GaA
s, InP, etc.) and control electrodes 5 and 6. By applying a voltage signal to the control electrodes 5 and 6, two states can be created in the switch 8. That is, the optical signal from the input end 1 is transferred to the output end 4
And a state in which the optical signal from the input end 2 is conducted to the output end 3 (this is called a bar state) and the optical signal from the input end 1 is output to the output end 3 and the optical signal from the input end 2 is output. This is a state of conducting to the end 4 (this is called a cross state). In the optical bistable element 9, as shown in FIG. 7, the optical output Pout is the optical input.
A history is shown with respect to changes in Pin, and two stable output intensities P _H and P _L are taken in a certain input intensity range (a range of threshold P _th1 and threshold P _th2 ).

As an example of an element having such an optical bistable characteristic, an optical bistable semiconductor laser shown in FIG. 8 has been announced (National Congress of the Institute of Electronics and Communication Engineers, NO.937 (1983)).

The optical bistable semiconductor laser has Fabry-Perot cavity surfaces 37 and 38.
2 has P-side electrodes 31 and 32 electrically insulated by a slit 33 provided in parallel with each other. Each electrode 31,32
With appropriate bias currents I ₁ and I ₂ to the optical input Pin
The optical output Pout with respect to can have an optical bistable characteristic as shown in FIG.

Now, the logical operation of the optical D flip-flop circuit used in the present invention will be described with reference to FIG. The optical digital data L _D is input to the input end 1 and the bias light L _B is input to the input end 2. As shown in FIG. 5, the optical amplitude value of the optical digital data L _D is zero in the logic “0” state and P _D in the logic “1” state.

On the other hand, as shown in FIG. 5, the bias light L _B is DC light whose light amplitude value has a DC amplitude value P _B. An optical clock E _C is applied to the electrodes 5 and 6 to control the optical switch 8. When the electric clock E _C is in the logic “1” state, the optical switch 8 is set to the cross state, and in the state of the logic “0”, it is set to the bar state.

Here, the optical switch 8 is designed so that the degree of coupling is α (≦ 1) in the cross state. Accordingly, the optical switch 8 in response to the logic state of the electrical clock E _C
The optical output signal L _SW to the output terminal 3 of is obtained as follows.
When the electric clock E _C is in the logic “0” state, the optical switch 8 is in the bar state, so that the optical output signal L _SW becomes the bias light L _B itself and its optical amplitude value becomes P _B. On the other hand, when the electric clock E _C is the logic “1”, the optical switch 8 is in the cross state, so that the optical digital data L _D
The optical output signal L _SW depending on the logic state of is obtained. That is, when the optical digital data L _D is in the logic “1” state, a part αP _B of the optical amplitude value P _B of the bias light L _B is coupled to the output end 4 and the optical amplitude value of the optical digital data L _D is obtained. Since part of P _D αP _D is coupled to the output end 3, the optical amplitude value of the optical output signal L _SW is P _B −αP _B + αP _d . On the other hand, when the optical digital data L _D is a logic "0" state, the light amplitude of the optical digital data L _D is zero, coupling from the optical digital data L _D to the output terminal 3 is no, bias light L Only a part αP _B of the light amplitude value P _B of _B is coupled to the output 4. Therefore, the optical output signal L
The optical amplitude value of _SW is P _B −αP _B.

The relationship between the truth value and the light amplitude value is shown in FIG. When the coupling degree α and the optical amplitude value P _D are selected so that the optical amplitude value P _B −αP _B + αP _D is larger than the DC amplitude value P _B ,
The optical output signal _{L SW,} as shown in FIG. 5, the baseline B and the light amplitude value with a DC amplitude value _{P B P B -αP B} +
A positive pulse P having αP _D and a negative pulse N having a light amplitude value P _B −αP _B are obtained. After all, in the optical output signal L _SW , the baseline B is generated when the electric clock E _C is in the logic “0” state, the electric clock E _C is in the logic “1” state, and the optical digital data L _D is in the logic “0” state. A positive pulse P is generated in the 1 "state, and a negative pulse N is generated when the electric clock E _C is in the logical" 1 "state and the optical digital data L _D is in the logical" 0 "state.

Next, returning to FIG. 2, the optical output signal L _SW is input to the optical bistable element 9.

The relationship between the characteristics of the optical bistable element 9 and the optical amplitude value of the optical output signal L _SW is as shown in FIG. Satisfies the optical bistable device 9 is set to a high value in the positive pulse P, is reset to a low value P _L in the negative pulse N, and baseline B (bias light L _B), the stable point Q ₁ or Q Biased to either of the _two , low value P _L
Or it is held to a high value P _H. As a result, output optical digital data L _O is obtained as shown in FIG. After all, as shown in FIG. 5, in the output optical digital data L _O , the optical digital data L _D is Cr ₁ , C when the electric clock E _C rises.
An optical signal synchronized with r ₂ , ... Is obtained. Therefore, the second
The circuit shown in the figure realizes an optical D flip-flop operation.

Now, returning to FIG. 1, the operation of the optical shift register circuit of the present invention will be described.

The optical D flip-flop circuits described above are connected in series via the optical branching devices K ₁ , K ₂ , K ₃ , and K ₄ each including a directional coupler, and the electric clock E _C is commonly applied to each optical D flip-flop circuit. By doing so, the 4-bit optical shift register circuit shown in FIG. 1 is realized.

The optical output signal L _{01 of} each optical D flip-flop stage,
As described above, L ₀₂ and L ₀₃ are synchronized by the optical D flip-flops 102, 103 and 104 at the next stage when the electric clock E _C rises.

Therefore, the optical output signals L ₁ , L ₂ , L ₃ , and L ₄ from the optical branchers K ₁ , K ₂ , K ₃ , and K _{4 correspond} to the optical digital data L _{D as} shown in FIG. 1bit delay, 2bit
Optical output signals of delay, 3-bit delay and 4-bit delay are obtained respectively.

The above is an example in which the optical flip-flop circuit is connected via the optical branching device, but the flip-flop circuit may be directly connected without the optical branching device. However, in this case, the output can be obtained only from the final stage. The same can be said for the second embodiment described below.

Next, a second embodiment will be described.

FIG. 3 is an optical shift register circuit showing a second embodiment of the present invention. Similar to the first embodiment, the optical D flip-flop circuits 102, 103 and 104 are connected to the branching devices K ₁ , K ₂ , K ₃ and K _{4 respectively.}
Are connected in series via. The difference from the first embodiment is that a crossed waveguide type optical switch 8'is used as an optical switch forming an optical D flip-flop circuit as shown in FIG.

Therefore, here, only the operation of the optical D flip-flop circuit using the crossed waveguide type optical switch 8'will be described with reference to FIG. Cross waveguide type optical switch 8 'substrate (LiNbO _3, GaAs, InP, etc.) cross waveguide 10 formed in
And control electrodes 5 and 6. When the electric clock E _C applied to the control electrodes 5 and 6 is in the logic “0” state,
The optical digital data L _D at the input end 1 is connected to the output end 4, and the bias light L _B at the input end 2 is connected to the output end 3. Therefore,
The light output signal L _SW becomes the bias light L _B itself.

On the other hand, when the electric clock E _C applied to the control electrodes 5 and 6 is in the logic “1” state, the refractive index of the waveguide between the control electrodes 5 and 6 becomes small, and the optical amplitude value P of the bias light L _B becomes small. some of _B is .alpha.P _B is coupled to the output 4, the remaining light amplitude value P _B
-ΑP _B is output to the output terminal 3. Furthermore, at the output terminal 3,
Light in the digital data L _D is a logic "1" state, a part .alpha.P _D of the light amplitude value P _D is output, optical digital data L
_{When D} is in the logic "0" state, nothing is output. here,
The degree of coupling of the optical switch 8 is designed to be α (≦ 1).

As described above, the optical output signal L _SW having the positive pulse P and the negative pulse N with the baseline B as an intermediate value is obtained as in the first embodiment. By inputting the optical output signal L _SW to the optical bistable element 9, it is possible to obtain output optical digital data L _{O in} which the optical digital data L _D is synchronized with the electric clock E _C.

Therefore, it became clear that FIG. 4 can operate as an optical D flip-flop. If the optical D flip-flop circuits are connected in cascade, as in the first embodiment, FIG. 3 operates as an optical shift register circuit.

Above, in the description of the first embodiment and the second embodiment,
The optical switch, the optical bistable element, and the optical branching device were handled as separate parts, but it is obvious that a compact and economical optical shift register circuit can be realized by integrating these functions on one board. is there.

Further, in the above description, the directional coupling type optical switch and the crossed waveguide type optical switch are used as the optical switch, the optical bistable semiconductor laser is used as the optical bistable element, and the directional coupler is used as the optical branching device. However, without being limited to these, it is obvious that the optical shift register circuit of the present invention can be realized as long as the functions described above are satisfied.

Furthermore, in the above embodiment, the 4-bit optical shift register circuit is described as an example, but the present invention is not limited to this.
It is also clear that a multi-bit optical shift register circuit can be realized by connecting an arbitrary number of the optical D flip-flop circuits in cascade.

<Effects of the Invention> As described above, a practical optical shift register circuit suitable for integration is realized by using the optical D flip-flop composed of the optical switch and the optical bistable element as a basic circuit. The digital optical data that has been received can be digitally processed as it is, which makes a great contribution to the construction of high-speed optical information processing systems, optical switching systems, and optical computers.

[Brief description of drawings]

FIG. 1 is an optical shift register circuit diagram of the first embodiment of the present invention. FIG. 2 is an optical D flip-flop circuit diagram of the optical shift register circuit of the first embodiment. FIG. FIG. 4 is an optical shift register circuit diagram of the second embodiment, FIG. 4 is an optical D flip-flop circuit diagram which constitutes the optical shift register circuit of the second embodiment, and FIG. 5 is a logical waveform diagram of each part of the optical D flip-flop circuit. , FIG. 6 is a truth table of an optical switch, and FIG. 7 is a characteristic of an optical bistable element and an optical input signal L to it.
FIG. 8 is a relationship diagram between _SW and output optical digital data L _O , FIG. 8 is a schematic diagram of an optical bistable semiconductor laser, and FIG. 9 is a timing chart of an optical shift register circuit. 101, 102, 103, 104 ...... optical D flip-flop circuit 8 ...... light switch, 9 ...... light bistable element L _D ...... optical digital data, _{E C} ...... electric clock, _{L B} ...... bias light, _{L 1, L} 2, L ₃ , L ₄ ... Optical output signal of each stage.

Claims (1)

[Claims] 1. An optical switch having a first input end, a second input end, and an output end, and an optical bistable element that receives the output light from the output end as an optical input, and the first input end is connected to the optical switch. Optical digital data is input, bias light having a DC amplitude value is input to the second input end, and in the first state of the optical switch obtained corresponding to the first state of the clock, from the output end In the second state of the optical switch obtained by outputting the bias light, biasing the optical bistable element to any one stable point, and obtaining the optical digital data in the second state of the clock. Is a logic "1" state, a positive optical pulse having a positive amplitude value from the direct current amplitude value is output from the output end, the optical bistable element is set by the positive optical pulse, and the optical digital data is set. Is a logic "0" state, a negative polarity optical pulse having a negative amplitude value from the DC amplitude value An optical output which is output from the output terminal and is driven so as to reset the optical bistable element by the negative optical pulse, thereby inputting the optical digital data and obtaining an optical output signal synchronized with a clock. The D flip-flop circuit outputs the optical output from the optical bistable element to the first stage of the next stage.
An optical shift register circuit, wherein a plurality of cascaded connections are made so that they are input to an input terminal.