JPH0645357A - Thin film transistor and its manufacture - Google Patents

Abstract

PURPOSE:To improve off-current characteristic of a thin film transistor (TFT). CONSTITUTION:The title device has a transparent insulating substrate 1, a source electrode 4a and a drain electrode 4b laminated on the transparent insulating substrate one by one, an operational semiconductor layer 6 formed including a space between the source electrode 4a and the drain electrode 4b, a gate insulating film 7 and a gate electrode 8, and is constituted to have a vacant space between an edge face of the source electrode 4a and/or the drain electrode 4b and the operational semiconductor layer 6.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a thin film transistor (TFT).
And a manufacturing method thereof. In recent years, in TFT driven liquid crystal displays, in order to obtain clear and stable images, improvement of TFT characteristics has been desired.

[0002]

2. Description of the Related Art FIG. 3 is a sectional view of a staggered TFT according to a conventional example. The structure will be described below in the order of manufacturing steps.

A light-shielding film 2 is formed by depositing a chromium (Cr) film on a transparent insulating substrate 1 made of glass or the like and patterning it.
To form. Next, a silicon dioxide (SiO ₂ ) film 3 is deposited as an insulating film on the entire surface of the substrate, and an IT that becomes a transparent electrode is formed on the film.
An O (InSnO) film and an n ⁺ type semiconductor layer to be a contact layer are deposited, and these films are collectively patterned to expose the surface of the SiO ₂ film 3 to be a channel region, and the drain electrode 4a
And the source electrode 4b is formed.

Then, a semiconductor layer to be an operating semiconductor layer (channel forming layer) is deposited on the entire surface of the substrate, and this and the n ⁺ type semiconductor film are collectively patterned to form contact layers 5a and 5b and an operating semiconductor layer 6. .

Next, silicon nitride (SiN) is formed on the entire surface of the substrate.
A transparent insulating film such as a film is deposited to form the gate insulating film 7,
Further, a metal such as aluminum (Al) is deposited on the entire surface of the substrate and patterned to form a gate electrode 8 to complete the TFT.

[0006]

In the conventional TFT device, since the end faces of the source and drain electrodes are in direct contact with the operating semiconductor layer, a leak current is likely to occur between the source and drain electrodes, and the off-current characteristics deteriorate. There was a problem of doing.

An object of the present invention is to improve the off current characteristic of TFT.

[0008]

[Means for Solving the Problems] 1)
A transparent insulating substrate 1, a source electrode 4a and a drain electrode 4b sequentially stacked on the transparent insulating substrate, an operating semiconductor layer 6 formed between the source electrode and the drain electrode, and a gate insulating film 7 And a gate electrode 8, and a thin film transistor in which a space is formed between the end surface of the source electrode and / or the drain electrode and the operating semiconductor layer, or 2) transparent on the transparent insulating substrate 1. A step of sequentially depositing a conductor film 4 and a high-concentration semiconductor layer 5 having a concentration higher than that of an operating semiconductor layer, and then, over-etching the transparent conductor film with respect to the high-concentration semiconductor layer, thereby transparentizing the transparent region The conductive film and the high-concentration semiconductor layer are removed by etching, and the source electrode 4a and the drain electrode 4b made of the transparent conductive film are formed on both sides of the channel region. Forming an operating semiconductor layer 6 that is connected to the high-concentration semiconductor layer with a space between the electrode and the drain electrode and with an end face of the source electrode and / or the drain electrode; ,
A gate insulating film 7 and a gate electrode 8 are formed on the operating semiconductor layer.
Is sequentially formed.

[0009]

According to the present invention, since a space is formed between the end surfaces of the source electrode and the drain electrode and the operating semiconductor layer so that they do not come into direct contact with each other, it occurs between the source electrode and the drain electrode through the operating semiconductor layer. Leakage current is prevented,
The off-current characteristics of the TFT characteristics are improved.

[0010]

1 (A) to 1 (D) are sectional views for explaining an embodiment of the present invention. The structure of the embodiment will be described below in the order of manufacturing steps.

In FIG. 1 (A), a chromium (Cr) film having a thickness of about 1000 Å is deposited on a transparent insulating substrate 1 made of glass or the like by a sputtering method and patterned to form a light-shielding film 2.
To form. Next, a plasma CVD method is used to deposit a SiO ₂ film 3 having a thickness of about 6000Å as a transparent insulating film on the entire surface of the substrate.
A transparent conductor film with a thickness of 500 is then formed by sputtering.
Å ITO (InSnO) film 4, and a plasma CVD method as a high-concentration semiconductor layer to be a contact layer with a thickness of about 200 Å
The n ⁺ type semiconductor layer 5 is deposited.

Next, resist films 9a and 9b are formed to cover the source and drain electrode regions. In FIG. 1B, using the resist films 9a and 9b as etching masks, the n ⁺ type semiconductor layer 5 is etched using a CCl ₄ -based etching gas,
5a 'and 5b' are formed on both sides of the channel formation region.

Next, the ITO film 4 is over-etched by about 100 Å with respect to the n ⁺ type semiconductor layer 5 by using a chlorine-based etchant to form a source electrode 4a and a drain electrode 4b having an overhang structure.

Next, the resist films 9a and 9b are removed. In Fig. 1 (C), 600 Å-thick amorphous silicon (aS
i) Deposit layers. At this time, a-Si is not deposited below the protruding portions of the n ⁺ type semiconductor layers 5a ′ and 5b ′, and the space portion A,
B is formed.

Next, using a CCl ₄ -based etching gas,
^{The +} type semiconductor layers 5a ', 5b' and the a-Si layer are patterned to form the operating semiconductor layer 6 and the contact layers 5a, 5b.
In Fig. 1 (D), a plasma CVD method is used to deposit a SiN film 7 having a thickness of about 2500Å as a transparent gate insulating film on the entire surface of the substrate, and an Al film having a thickness of about 6000Å is deposited thereon by a sputtering method. Patterning to form the gate electrode 8
Complete the TFT.

In the embodiment, the width of the space is set to about 100 Å, but it is not limited to this size as long as the space is formed without contact between the end faces of the source and drain electrodes and the operating semiconductor layer. Also, only one space may be formed on either side of the source or drain electrode.

FIG. 2 is a diagram for explaining the effect of the embodiment.
The figure shows the relationship between the gate voltage and the drain current when the source / drain voltage is 5 V. The solid line represents the example and the dotted line represents the conventional example. As can be seen from the figure, the off-current characteristic is improved by about one digit.

[0018]

According to the present invention, the off-current characteristics of the TFT can be improved. As a result, a clear and stable image can be obtained on the TFT drive display.

[Brief description of drawings]

FIG. 1 is a sectional view illustrating an embodiment of the present invention.

FIG. 2 is a diagram for explaining the effect of the embodiment.

FIG. 3 is a sectional view of a staggered TFT according to a conventional example.

[Explanation of symbols]

1 is a transparent insulating substrate 2 Light-shielding film 3 Insulating film is SiO ₂ film 4 Transparent conductor film is ITO (InSnO) film 5 High concentration semiconductor layer is n ⁺ type semiconductor layer 9a, 9b Resist film 6 Operating semiconductor layer is a- Si layer 7 Gate insulating film and SiN film 8 Gate electrode

Claims (2)

[Claims] 1. A transparent insulating substrate (1), a source electrode (4a) and a drain electrode (4b) sequentially laminated on the transparent insulating substrate, and a space between the source electrode and the drain electrode. Operating semiconductor layer (6), gate insulating film (7),
A thin film transistor having a gate electrode (8), wherein a space is formed between an end face of the source electrode and / or the drain electrode and the operating semiconductor layer. 2. A transparent conductor film on a transparent insulating substrate (1).
(4) and a step of sequentially depositing a high-concentration semiconductor layer (5) having a higher concentration than the operation semiconductor layer (6), and then, by overetching the transparent conductor film with respect to the high-concentration semiconductor layer, a channel is formed. A step of etching away the transparent conductor film and the high-concentration semiconductor layer in the region to form a source electrode (4a) and a drain electrode (4b) made of the transparent conductor film on both sides of the channel region; An operating semiconductor layer (6) is formed which extends between the source electrode and the drain electrode and is connected to the high-concentration semiconductor layer with a space between the source electrode and / or the end surface of the drain electrode. A method of manufacturing a thin film transistor, comprising: a step of forming a gate insulating film (7) and a gate electrode 8 in order on the operating semiconductor layer.