JPH0644209B2 - Bus converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to a bus converter connected between systems, and prevents a function setting of a connected system from becoming undefined at the time of power-on reset or system reset to prevent the operation. A bus conversion device that is connected between system buses and that sets the system control function of the connected system by software, based on the setting instruction sent from the central processing unit. Setting means that propagates reset operations such as resets to the connected system and performs various settings such as bus use arbitration and time monitoring, and maintains the reset state of the connected system even when the reset operation of the own system ends after power is turned on. The reset holding means and the reset release signal at the end of various settings by the setting means It is composed of reset releasing means for sending to the reset holding means and releasing the reset state of the connection system.

[Industrial application field]

The present invention relates to a bus converter for connecting systems, and more particularly to a bus converter for setting system control functions such as arbitration of bus usage of connected systems and time monitoring of bus usage by software.

[Problems to be Solved by Prior Art and Invention]

FIG. 4 shows an example of the configuration of a data processing system connected by a bus converter. The system A is configured by connecting a central processing unit (CPU), a memory (MEM), an adapter (ADP), a bus converter (BC), etc. to the system bus A, and the system B connected to the system A is also configured similarly. To be done. The bus conversion device BC is connected between the system bus A and the system bus B to connect the system A and the system B,
The system B has system control functions, such as bus use arbitration, bus use time monitoring, and other system control-specific functions, such as memory, registers, and interrupt handler functions. The function can be enabled / disabled.

In such a configuration, when the system power is turned on, a reset signal is issued and the system is initialized while the reset signal continues. After the reset is completed, the system A initializes various functions in the system B. However, before the initialization, the system B may start operating immediately after the reset is completed.

FIG. 5 is a timing chart for explaining the above-mentioned problems. When the reset state after power-on ends at time t, the CPU of the system A should normally set the bus conversion device, and then the bus conversion is performed. The device uses the bus arbitration to enable the bus arbitration. However, the system B may start operating before the system A completes the initialization of the system B.

Conventionally, in order to solve such a malfunction, one method is to provide a mechanical switching means or a setting post. However, this method may cause contact failures and setting mistakes, which lowers reliability.When changing settings, turn off the system power → remove the printed circuit board → change the setting → insert the printed circuit board → change the system. It requires extremely complicated work such as turning on the power. As another method, as a countermeasure for the above, a method in which a setting register writable from the system A side is provided in the bus conversion device or a command such as a setting command is prepared and setting is performed by software is used. However, even with this method,
For example, there is a problem in that the operation is not guaranteed for a device that has to function immediately after the reset state of the system is released, such as a bus use arbitration enable / disable setting.

An object of the present invention is to provide reset state holding means for preventing a malfunction of the connected system due to an indefinite state of function setting at power-on reset or system reset.

[Means for Solving the Problems]

FIG. 1 is a principle configuration diagram of the present invention, a bus conversion device BC
Is a software-based setting means (1) which replaces the conventional mechanical switching means or setting posts, and a reset holding means (2) and a reset releasing means (3) for ensuring the operation by the software setting. To have. C
PU performs a setting instruction S _o with respect to the set by software means (1) and reset release means (2), the former performs various settings of the system B, the latter outputs a reset release signal S to the reset holding means To do. A reset signal is input from the system bus A to the reset holding means (3) and sent to the system bus B.

[Action]

FIG. 2 is a timing chart for explaining the operation of the configuration shown in FIG. First, the reset holding means (3) is the system A
When it receives the reset A signal from the device, it is sent to the system B as the reset B signal, but the reset B is held until the reset cancellation signal S from the reset cancellation means (2) is input. When reset A is released at time t ₁ ,
System A including the bus conversion device starts a series of processing,
Performs various settings such as bus arbitration and time monitoring. At this point, the reset A is reset holding means (3)
Propagated to the system B, the reset state is held, and no device can operate. Then, when various settings of the bus conversion device are completed at time t ₂ , the reset release means (2) starts to operate and the reset holding means (3).
A reset release signal S is issued to the CPU to instruct to release the reset B. When the reset B is released, the system B makes a bus access to the bus and starts its processing. At this point, all the initial settings relating to the system B are completed, and a proper operation is guaranteed. The method of the reset releasing means may be a method of detecting the completion of setting by hardware, writing to the reset control register, issuing a reset control command, or the like, but is not particularly specified.

〔Example〕

FIG. 3 is a block diagram of an embodiment of the bus conversion device according to the present invention. In the figure, 11 is a control circuit of the system bus A, 12 is a setting register, 13 is an OR gate, 14
Is a reset control register, and 15 is a bus arbitration unit of the system bus B. In such a configuration, when the reset A signal of the system A is turned on, the reset control bit Y of the reset control register 14 is passed through the OR gate 13.
Bit turns on. The state of the Y bit directly becomes the reset B signal of the system B, which causes the system A,
Both B are reset. The Y bit can be easily realized by using a flip-flop element and using its preset terminal or the like. In this case, the reset A sets the flip-flop and holds the bit.

When the reset A signal of the system A is released at the time t ₁ , the system A including the bus conversion device becomes operable. Since the Y bit of the reset control register 14 is held in the ON state, the system B holds the reset state and does not start any operation.

The CPU of system A uses the setting register 1 in a series of processes.
The X bit, which is a bit for setting valid / invalid of the bus arbitration of No. 2, is turned on. The X bit is an enable signal E that activates the bus arbitration unit 15. For example, when the X bit is "1", the bus arbitration is valid. At this point, system B is still in the reset state. Like the Y bit, the X bit can be easily realized by using a memory element such as a flip-flop element.

The CPU of system A finishes setting the X bit, that is, X
When the bit turns on, the Y bit of the reset control register 14 is set to, for example, "0" and turned off. As a result, the system B signal is turned off and the system B can operate. The bus arbitration unit 1 when the system B device starts operating
5 is enabled and normal operation is guaranteed. In the present embodiment, in addition to the above-described operation, if the Y bit of the reset control register 14 is always turned on / off, the reset operation of the system B can be freely realized by software without providing a mechanical reset switch or the like. Becomes

〔The invention's effect〕

As described above, according to the present invention, the setting related to the system control of the connection system, which can be set only by the mechanical switch and the setting post in the related art, can be set by the software, and the hardware setting described above can be performed. Not only can the problems associated therewith be resolved, but the reset operation of the connection system can be performed by software depending on the method of the reset release means.

[Brief description of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a signal timing chart for explaining the operation of the configuration of FIG. 1, FIG. 3 is a block diagram of a bus converter of one embodiment of the present invention, and FIG. An example of a system configuration provided with a converter and FIG. 5 are signal timing charts for explaining the problems of the conventional method. (Explanation of symbols) CPU ... Central processing unit, BC ... Bus converter, 1 ... Software setting means, 2 ... Reset releasing means, 3 ... Reset holding means, 11 ... Control circuit, 12 ... Setting register, 13 ... OR gate, 14 ... Reset control register, 15 ... Bus arbitration unit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-62-150414 (JP, A) SAIKAI Sho-62-169831 (JP, U)

Claims (1)

[Claims] 1. A bus conversion device which is connected between the system buses of a local system and a connection system, and which sets the system control function of the connection system by software, the setting being sent from the central processing unit of the local system. Upon receiving an instruction (S _o ), software setting means (1) for setting the system control of the connection system by software, and when receiving a reset signal from the own system, sends the reset signal to the connection system. Reset holding means (3) for holding the reset state of the connection system even after the reset signal of the own system is invalidated.
Go If, during the reset state holding of the connection system according to the reset holding means, when receiving the setting instruction (S _o), the setting of the reset holding means (3) is related to the system control in accordance with the setting command After that, a reset release signal (S) is sent to the reset holding means (3),
A bus conversion device comprising: a reset release means (2) for releasing the holding of the reset state by the reset holding means.