JPH0641427Y2 - High-speed video signal transmission device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to video in a system for displaying a video signal such as data on a video signal display unit installed at a long distance from a video signal generation unit. The present invention relates to a signal transmission device.

[Conventional technology and its problems]

Conventionally, as shown in FIG. 5, the video signal generated in the video signal generation unit 1 is directly transmitted to the video signal display unit 3 using the coaxial cable 2 or the like. In this conventional example, when trying to transmit a high-speed video signal over a long distance (about 100 m), a loss due to the coaxial cable 2 and a frequency characteristic thereof cause phase inversion, synchronization deviation, etc. There is a problem in that it is difficult to reproduce an image and the cost is high because a long distance is transmitted by the coaxial cable 2.

[Means for Solving the Problems]

In order to solve the above-mentioned problems, the device of the present invention is shown in FIGS.
As shown in the figure, a video signal generator 1 and a modulator 4 which inputs and modulates a video signal output from the generator 1 and outputs the modulated signal to a transmission line 5, and a signal transmitted from the transmission line 5 are input. And a video signal display unit 3 for displaying a video signal by inputting the signal demodulated by the demodulation unit 6, and the modulation unit 4 includes a dot clock signal indicating one dot. A double dot clock signal generator 7 for generating a double dot clock signal having a double frequency, and a dot clock signal converter 8 for converting an output signal of the generator 7 into a dot clock signal having a frequency of 1/2.
An exclusive OR unit 9 for inputting the output signal of the conversion unit 8 and the video signal and modulating the video signal with the dot clock signal; and an output signal of the OR unit 9 and the double dot clock signal generation unit 7. A delay unit 10 for inputting an output signal, sampling the output signal of the logical sum unit 9 with a double dot clock signal and delaying it by a double dot clock signal, and inputting the output of the delay unit 10 and outputting a current differential signal And a current differential type driver 11 for inputting the current differential signal, and the demodulation unit 6 receives the current differential signal and outputs a signal having the same phase as the output signal of the logical sum unit 9, and a current differential receiver 12, A double dot clock signal generator 19 for generating a double dot clock signal,
A first sampling unit 13 for inputting the output signal of the receiver 12 and the output signal of the generating unit 19 and sampling the output signal of the receiver 12 with the output signal of the generating unit 19, and an output signal of the double dot clock signal generating unit 19 And a conversion unit 14 for converting the dot clock signal of 1/2 frequency
A second sampling unit 15 for inputting the output signal of 12 and the output signal of the conversion unit 14 and sampling the output signal of the receiver 12 with the output signal of the conversion unit 14, and the output signal of the receiver 12,
A third sampling unit 16 for sampling with a signal having a polarity opposite to that of the second sampling unit 15, and second and third sampling units 1
An exclusive OR unit 17 for inputting the output signals of 5, 16 and the output signal of the first sampling unit 13 and the output signal of this OR unit 17 are input, and the output signal of the first sampling unit 13 is ORed. A fourth inputting the output signal of the section 17, sampling the output signal of the first sampling section 13 with the output signal of the logical sum section 17, and outputting a video signal similar to the video signal of the modulating section 4.
It is composed of the sampling unit 18.

[Action]

A double-frequency dot clock signal is generated by the double-dot clock signal generation unit 7, and this signal is
Converted to a 2-frequency dot clock signal. A video signal is generated from the video signal generation unit 1, and the video signal and the dot clock signal are input to the exclusive OR unit 9 to modulate the video signal with the dot clock signal. The output signal of the exclusive OR unit 9 and the double dot clock signal are the delay unit.
The output signal of the exclusive OR unit 9 input to 10 is sampled by the double dot clock signal and becomes a signal delayed by the double dot clock signal. The output signal of the delay unit 10 is input to the current differential type driver 11 to output the current differential signal.

This current differential signal is sent from the transmission line 5 and input to the current differential receiver 12, which outputs a signal in phase with the output signal of the logical sum unit 9. Double dot clock signal generator that generates this output signal and double dot clock signal
The output signal of 19 is input to the first sampling unit 13, and the output signal of the receiver 12 is sampled by the output signal of the generating unit 19.

The output signal of the double dot clock signal generator 19 is the converter 14
To the dot clock signal of 1/2 frequency. The output signal of this converter 14 and the receiver 12
Is output to the second sampling unit 15, and the output signal of the receiver 12 is sampled by the output signal of the conversion unit 14. The output signal of the receiver 12 is input to the third sampling section 16 and sampled with a signal having a polarity opposite to that of the second sampling section 15. The output signals of the second and third sampling units 15 and 16 are input to the exclusive OR unit 17, and the exclusive OR output is obtained from this.

The output signal of the first sampling unit 13 and the output signal of the exclusive OR unit 17 are input to the fourth sampling unit 18, the output signal of the first sampling unit 13 is sampled by the output of the OR unit 17, and the modulation unit A video signal similar to the video signal of No. 4 is output to the video display unit 3 and the video signal is displayed.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a signal transmission system diagram showing the basic configuration of the device of the present invention,
FIG. 2 is a connection diagram showing a configuration of an example of a modulation unit in the present invention, and FIG. 3 is a connection diagram showing a configuration of an example of a demodulation unit in the present invention.

1 to 3, 1 is a video signal generator, 4 is a modulator for modulating the video signal output from the generator 1, 5 is a transmission line for transmitting the signal modulated by the converter 4, Reference numeral 6 is a demodulation section for demodulating a modulated signal sent via the transmission path 5, and 3 is a video signal display section for displaying the demodulated video signal.

Reference numeral 7 is a double dot clock signal generator that generates a double dot clock signal that is twice the frequency of the dot clock signal indicating 1 dot, and 8 is 1/2 the output signal of this generator 7.
It is a dot clock signal conversion unit for converting into a dot clock signal of the frequency. Reference numeral 9 is an exclusive OR unit for inputting the video signal and the output signal of the conversion unit 8 and modulating the video signal with the dot clock signal, and 10 is an output signal of the OR unit 9 and the double dot clock signal generation unit 7. A delay unit for inputting the output signal, sampling the output of the logical sum unit 9 with the double dot clock signal, and delaying by the double dot clock signal, 11 inputs the output signal of the delay unit 10 and outputs a current differential signal. It is a current differential driver.

The modulator 4 includes a double dot clock signal generator 7, a dot clock signal converter 8, an exclusive OR unit 9, and a delay unit.
10 and a current differential driver 11.

Reference numeral 12 is a receiver for current differential that inputs the output signal of the current differential driver 11 and outputs a signal in phase with the output signal of the logical sum unit 9, and 19 is a double dot clock that generates a double dot clock signal. A signal generator (the same as the double dot clock signal generator 7 of the modulator 4), 13 inputs the output signal of this generator 19 and the output signal of the receiver 12 and outputs the output signal of the receiver 12 to the output of the generator 19. A first sampling unit for sampling with a signal. 14 is a double dot clock signal generator
A conversion unit for inputting the output signal of 19 and converting it to a dot clock signal with a frequency of 1/2, and 15 for inputting the output signal of this conversion unit 14 and the output signal of the receiver 12 and converting the output signal of the receiver 12 for the conversion unit 14 Is a second sampling unit for sampling with the output signal of.

Reference numeral 16 is a third sampling unit for sampling the output signal of the receiver 12 with a signal having a polarity opposite to that of the second sampling unit 15, and 17
Is an exclusive OR section that inputs the output signals of the second and third sampling sections 15 and 16, and 18 is the first sampling section 13 that receives the output signal of the first sampling section 13 and the output signal of this OR section 17. Is a fourth sampling section for sampling the output signal of the above with the output signal of the logical sum section 17 and outputting a video signal similar to the video signal of the modulation section 4.

The demodulation unit 6 includes a current differential receiver 12, a double dot clock signal generation unit 19, a first sampling unit 13, and a conversion unit 14.
And the second and third sampling units 15 and 16 and the exclusive OR unit 1
7 and a fourth sampling section 18.

In the above configuration, the video signal generator 1 generates a video signal with the timing shown in FIG. 4 (c). At the same time, 2 of the dot clock signal indicating 1 dot
Double the frequency. A double dot clock signal (see FIG. 4 (a)) is generated by the double dot clock signal generator 7, and this signal is generated by the dot clock signal converter 8 (see FIG. 4 (b)). Is converted to.

The output signal of the conversion unit 8 and the video signal are input to the exclusive OR unit 9 and the video signal is modulated by the dot clock signal (see FIG. 4 (d)). In order to reduce spike noise generated when the signal changes, the exclusive OR unit 9
Output signal and the double dot clock signal are input to the delay unit 10 and the output signal of the exclusive OR unit 9 is sampled by the double dot clock signal and becomes a signal delayed by the double dot clock. The output signal of the delay unit 10 is input to the current differential type driver 11 to output the current differential signal.

This current differential signal is sent from the transmission line 5 and input to the current differential receiver 12, which outputs a signal in phase with the output of the logical sum unit 9 (see FIG. 4 (e)). This output signal and the output signal of the double dot clock signal generator 19 (see FIG. 4 (f)) are input to the first sampling unit 13,
The output signal of the receiver 12 is sampled by the output signal of the generator 19, and the first sampling unit 13 outputs a signal as shown in FIG. 4 (h).

The output signal of the double dot clock signal generator 19 is the converter 14
To a dot clock signal having a frequency of 1/2 (see FIG. 4 (g)). The output signal of the conversion unit 14 and the output signal of the receiver 12 are the second sampling unit.
It is input to 15, and the output signal of the receiver 12 is sampled by the output signal of the conversion unit 14 (see FIG. 4 (i)). The output signal of the receiver 12 is input to the third sampling section 16 and sampled with a signal having a polarity opposite to that of the second sampling 15 (see FIG. 4 (j)). Second and third sampling units 15,1
The output signal of 6 is input to the exclusive OR unit 17, and the exclusive OR output (see FIG. 4 (k)) is obtained from this.

The output signal of the first sampling unit 13 and the output signal of the exclusive OR unit 17 are input to the fourth sampling unit 18, and the output signal of the first sampling unit 13 is the output signal of the OR unit 17 (phase change point). A video signal similar to the video signal of the modulation unit 4 (refer to FIG. 4 (l)) is sampled at (1) and is output to the video display unit 3 to display the video signal.

[Effect of device]

As described above, according to the present invention, the video signal is modulated by the modulator 4 and sent to the transmission line 5, and the signal transmitted from the transmission line 5 is demodulated by the demodulator 6 to display the video signal display unit 3 Since it is configured to display, the frequency component of the actually transmitted video signal becomes constant, and the video signal can be transmitted without being affected by the frequency characteristic of the transmission path 5.
High-quality signals can be transmitted without the inversion of the phase of the video signal and the deviation of synchronization.

Further, since it is not affected by the frequency characteristic of the transmission line 5, an inexpensive twisted pair cable can be used for the transmission line, and a system for long-distance transmission can be constructed at low cost.

[Brief description of drawings]

FIG. 1 is a signal transmission system diagram showing the basic configuration of the device of the present invention,
FIG. 2 is a connection diagram showing an example of the structure of the modulator of the present invention, FIG. 3 is a connection diagram showing an example of the structure of the demodulator of the present invention, and FIG. 4 is a time chart for explaining the operation of the device of the present invention. FIG. 5 is a signal transmission system diagram showing an example of a conventional device. 1 ... video signal generation section, 3 ... video signal display section, 4
...... Modulator, 5 ...... Transmission line, 6 ...... Demodulator, 7 ...... Double dot clock signal generator, 8 ...... Dot clock signal converter, 9 ...... Exclusive OR unit, 10 ...... Delay Department, 11 ……
Current differential driver, 12 ... Current differential receiver, 13 ...
… First sampling section, 14 …… Conversion section, 15,16 …… Second,
Third sampling unit, 17 ... Exclusive OR unit, 18 ... Fourth sampling unit, 19 ... Double dot clock signal generation unit.

Claims (1)

[Scope of utility model registration request] 1. A video signal generator 1, a modulator 4 which inputs and modulates a video signal output from the generator 1, and outputs the modulated signal to a transmission line 5, and a signal transmitted from the transmission line 5. It is composed of a demodulation unit 6 for inputting and demodulating, and a video signal display unit 3 for displaying a video signal by inputting the signal demodulated by the demodulation unit 6, and the modulating unit 4 is a dot clock signal indicating one dot. A double dot clock signal generator 7 for generating a double dot clock signal having a frequency twice that of, and a dot clock signal converter for converting the output signal of the generator 7 into a dot clock signal having a frequency of 1/2. 8
An exclusive OR unit 9 for inputting the output signal of the conversion unit 8 and the video signal and modulating the video signal with the dot clock signal; and an output signal of the OR unit 9 and the double dot clock signal generation unit 7. A delay unit 10 for inputting an output signal, sampling the output signal of the logical sum unit 9 with a double dot clock signal and delaying it by a double dot clock signal, and inputting the output of the delay unit 10 and outputting a current differential signal And a current differential type driver 11 for inputting the current differential signal, and the demodulation unit 6 receives the current differential signal and outputs a signal having the same phase as the output signal of the logical sum unit 9, and a current differential receiver 12, A double dot clock signal generator 19 for generating a double dot clock signal,
A first sampling unit 13 for inputting the output signal of the receiver 12 and the output signal of the generating unit 19 and sampling the output signal of the receiver 12 with the output signal of the generating unit 19, and an output signal of the double dot clock signal generating unit 19 And a conversion unit 14 for converting the dot clock signal of 1/2 frequency
A second sampling unit 15 for inputting the output signal of 12 and the output signal of the conversion unit 14 and sampling the output signal of the receiver 12 with the output signal of the conversion unit 14, and the output signal of the receiver 12,
A third sampling unit 16 for sampling with a signal having a polarity opposite to that of the second sampling unit 15, and second and third sampling units 1
The exclusive OR section 17 for inputting the output signals of 5, 16 and the output signal of the first sampling section 13 and the output signal of the OR section 17 are inputted and the output signal of the first sampling section 13 is set to this logical A video signal transmission device configured with a fourth sampling section 18 that samples the output signal of the summing section 17 and outputs a video signal similar to the video signal of the modulating section 4.